Linux Kernel
3.7.1
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Go to the source code of this file.
Functions | |
int | nlm_irq_to_irt (int irq) |
int | nlm_irt_to_irq (int irt) |
Variables | |
uint64_t | nlm_pic_base |
#define nlm_get_pic_pcibase | ( | node | ) | nlm_pcicfg_base(XLP_IO_PIC_OFFSET(node)) |
#define nlm_get_pic_regbase | ( | node | ) | (nlm_get_pic_pcibase(node) + XLP_IO_PCI_HDRSZ) |
#define PIC_IRQ_IS_IRT | ( | irq | ) | ((irq) >= PIC_IRT_FIRST_IRQ) |
#define PIC_IRT_CLOCK_INDEX PIC_IRT_TIMER_7_INDEX |
#define PIC_IRT_COMP_INDEX | ( | num | ) | ((num) + PIC_IRT_COMP_0_INDEX) |
#define PIC_IRT_FIRST_IRQ (PIC_IRQ_BASE) |
#define PIC_IRT_GPIO_INDEX | ( | num | ) | ((num) + PIC_IRT_GPIO_0_INDEX) |
#define PIC_IRT_ICC_0_INDEX 129 /* ICC - Inter Chip Coherency */ |
#define PIC_IRT_MSG_Q_INDEX | ( | qid | ) | ((qid) + PIC_IRT_MSG_Q0_INDEX) |
#define PIC_IRT_NA_INDEX | ( | num | ) | ((num) + PIC_IRT_NA_0_INDEX) |
#define PIC_IRT_PCIE_LINK_INDEX | ( | num | ) | ((num) + PIC_IRT_PCIE_LINK_0_INDEX) |
#define PIC_IRT_PCIE_MSIX_INDEX | ( | num | ) | ((num) + PIC_IRT_PCIE_MSIX_0_INDEX) |
#define PIC_IRT_TIMER_INDEX | ( | num | ) | ((num) + PIC_IRT_TIMER_0_INDEX) |
#define PIC_IRT_USB_INDEX | ( | num | ) | ((num) + PIC_IRT_USB_0_INDEX) |
#define PIC_ITE_N0_N1 | ( | i | ) | (PIC_ITE0_N0_N1 + ((i) * 4)) |
#define PIC_ITE_N2_N3 | ( | i | ) | (PIC_ITE0_N2_N3 + ((i) * 4)) |
#define PIC_TIMER_COUNT | ( | i | ) | (PIC_TIMER0_COUNT + ((i) * 2)) |
#define PIC_TIMER_MAXVAL | ( | i | ) | (PIC_TIMER0_MAXVAL + ((i) * 2)) |
#define PIC_WDOG_BEAT0 | ( | i | ) | (PIC_WDOG0_BEAT0 + ((i) ? 7 : 0)) |
#define PIC_WDOG_BEAT1 | ( | i | ) | (PIC_WDOG0_BEAT1 + ((i) ? 7 : 0)) |
#define PIC_WDOG_BEATCMD | ( | i | ) | (PIC_WDOG0_BEATCMD + ((i) ? 7 : 0)) |
#define PIC_WDOG_COUNT | ( | i | ) | (PIC_WDOG0_COUNT + ((i) ? 7 : 0)) |
#define PIC_WDOG_ENABLE0 | ( | i | ) | (PIC_WDOG0_ENABLE0 + ((i) ? 7 : 0)) |
#define PIC_WDOG_ENABLE1 | ( | i | ) | (PIC_WDOG0_ENABLE1 + ((i) ? 7 : 0)) |
#define PIC_WDOG_MAXVAL | ( | i | ) | (PIC_WDOG0_MAXVAL + ((i) ? 7 : 0)) |