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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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Go to the source code of this file.
| #define OMAP1610_RESET_CONTROL 0xfffe1140 |
Definition at line 116 of file omap16xx.h.
| #define OMAP16XX_ARM_IDLECT3 (CLKGEN_REG_BASE + 0x24) |
Definition at line 98 of file omap16xx.h.
| #define OMAP16XX_CONF_VOLTAGE_VDDSHV6 (1 << 8) |
Definition at line 105 of file omap16xx.h.
| #define OMAP16XX_CONF_VOLTAGE_VDDSHV7 (1 << 9) |
Definition at line 106 of file omap16xx.h.
| #define OMAP16XX_CONF_VOLTAGE_VDDSHV8 (1 << 10) |
Definition at line 107 of file omap16xx.h.
| #define OMAP16XX_CONF_VOLTAGE_VDDSHV9 (1 << 11) |
Definition at line 108 of file omap16xx.h.
| #define OMAP16XX_DSP_BASE 0xE0000000 |
Definition at line 38 of file omap16xx.h.
| #define OMAP16XX_DSP_MMU_BASE (0xfffed200) |
Definition at line 197 of file omap16xx.h.
| #define OMAP16XX_DSP_SIZE 0x28000 |
Definition at line 39 of file omap16xx.h.
| #define OMAP16XX_DSP_START 0xE0000000 |
Definition at line 40 of file omap16xx.h.
| #define OMAP16XX_DSPREG_BASE 0xE1000000 |
Definition at line 42 of file omap16xx.h.
| #define OMAP16XX_DSPREG_SIZE SZ_128K |
Definition at line 43 of file omap16xx.h.
| #define OMAP16XX_DSPREG_START 0xE1000000 |
Definition at line 44 of file omap16xx.h.
| #define OMAP16XX_MAILBOX_BASE (0xfffcf000) |
Definition at line 198 of file omap16xx.h.
| #define OMAP16XX_MMCSD2_SSW_MPU_CONF (TIPB_SWITCH_BASE + 0x160) |
Definition at line 124 of file omap16xx.h.
| #define OMAP16XX_SEC_BASE 0xFFFE4000 |
Definition at line 46 of file omap16xx.h.
| #define OMAP16XX_SEC_DES (OMAP16XX_SEC_BASE + 0x0000) |
Definition at line 47 of file omap16xx.h.
| #define OMAP16XX_SEC_RNG (OMAP16XX_SEC_BASE + 0x1000) |
Definition at line 49 of file omap16xx.h.
| #define OMAP16XX_SEC_SHA1MD5 (OMAP16XX_SEC_BASE + 0x0800) |
Definition at line 48 of file omap16xx.h.
| #define OMAP16XX_SUBLVDS_CONF_VALID (1 << 13) |
Definition at line 109 of file omap16xx.h.
| #define OMAP_16XX_WATCHDOG_BASE (0xfffeb000) |
Definition at line 172 of file omap16xx.h.
| #define OMAP_16XX_WCLR (OMAP_16XX_WATCHDOG_BASE + 0x24) |
Definition at line 176 of file omap16xx.h.
| #define OMAP_16XX_WCRR (OMAP_16XX_WATCHDOG_BASE + 0x28) |
Definition at line 177 of file omap16xx.h.
| #define OMAP_16XX_WD_SYSCONFIG (OMAP_16XX_WATCHDOG_BASE + 0x10) |
Definition at line 174 of file omap16xx.h.
| #define OMAP_16XX_WD_SYSSTATUS (OMAP_16XX_WATCHDOG_BASE + 0x14) |
Definition at line 175 of file omap16xx.h.
| #define OMAP_16XX_WIDR (OMAP_16XX_WATCHDOG_BASE + 0x00) |
Definition at line 173 of file omap16xx.h.
| #define OMAP_16XX_WLDR (OMAP_16XX_WATCHDOG_BASE + 0x2c) |
Definition at line 178 of file omap16xx.h.
| #define OMAP_16XX_WSPR (OMAP_16XX_WATCHDOG_BASE + 0x48) |
Definition at line 181 of file omap16xx.h.
| #define OMAP_16XX_WTGR (OMAP_16XX_WATCHDOG_BASE + 0x30) |
Definition at line 179 of file omap16xx.h.
| #define OMAP_16XX_WWPS (OMAP_16XX_WATCHDOG_BASE + 0x34) |
Definition at line 180 of file omap16xx.h.
| #define OMAP_IH2_0_BASE (0xfffe0000) |
Definition at line 56 of file omap16xx.h.
| #define OMAP_IH2_0_CONTROL (OMAP_IH2_0_BASE + 0x18) |
Definition at line 65 of file omap16xx.h.
| #define OMAP_IH2_0_ILR0 (OMAP_IH2_0_BASE + 0x1c) |
Definition at line 66 of file omap16xx.h.
| #define OMAP_IH2_0_ISR (OMAP_IH2_0_BASE + 0x9c) |
Definition at line 67 of file omap16xx.h.
| #define OMAP_IH2_0_ITR (OMAP_IH2_0_BASE + 0x00) |
Definition at line 61 of file omap16xx.h.
| #define OMAP_IH2_0_MIR (OMAP_IH2_0_BASE + 0x04) |
Definition at line 62 of file omap16xx.h.
| #define OMAP_IH2_0_SIR_FIQ (OMAP_IH2_0_BASE + 0x14) |
Definition at line 64 of file omap16xx.h.
| #define OMAP_IH2_0_SIR_IRQ (OMAP_IH2_0_BASE + 0x10) |
Definition at line 63 of file omap16xx.h.
| #define OMAP_IH2_1_BASE (0xfffe0100) |
Definition at line 57 of file omap16xx.h.
| #define OMAP_IH2_1_CONTROL (OMAP_IH2_1_BASE + 0x18) |
Definition at line 73 of file omap16xx.h.
| #define OMAP_IH2_1_ILR1 (OMAP_IH2_1_BASE + 0x1c) |
Definition at line 74 of file omap16xx.h.
| #define OMAP_IH2_1_ISR (OMAP_IH2_1_BASE + 0x9c) |
Definition at line 75 of file omap16xx.h.
| #define OMAP_IH2_1_ITR (OMAP_IH2_1_BASE + 0x00) |
Definition at line 69 of file omap16xx.h.
| #define OMAP_IH2_1_MIR (OMAP_IH2_1_BASE + 0x04) |
Definition at line 70 of file omap16xx.h.
| #define OMAP_IH2_1_SIR_FIQ (OMAP_IH2_1_BASE + 0x14) |
Definition at line 72 of file omap16xx.h.
| #define OMAP_IH2_1_SIR_IRQ (OMAP_IH2_1_BASE + 0x10) |
Definition at line 71 of file omap16xx.h.
| #define OMAP_IH2_2_BASE (0xfffe0200) |
Definition at line 58 of file omap16xx.h.
| #define OMAP_IH2_2_CONTROL (OMAP_IH2_2_BASE + 0x18) |
Definition at line 81 of file omap16xx.h.
| #define OMAP_IH2_2_ILR2 (OMAP_IH2_2_BASE + 0x1c) |
Definition at line 82 of file omap16xx.h.
| #define OMAP_IH2_2_ISR (OMAP_IH2_2_BASE + 0x9c) |
Definition at line 83 of file omap16xx.h.
| #define OMAP_IH2_2_ITR (OMAP_IH2_2_BASE + 0x00) |
Definition at line 77 of file omap16xx.h.
| #define OMAP_IH2_2_MIR (OMAP_IH2_2_BASE + 0x04) |
Definition at line 78 of file omap16xx.h.
| #define OMAP_IH2_2_SIR_FIQ (OMAP_IH2_2_BASE + 0x14) |
Definition at line 80 of file omap16xx.h.
| #define OMAP_IH2_2_SIR_IRQ (OMAP_IH2_2_BASE + 0x10) |
Definition at line 79 of file omap16xx.h.
| #define OMAP_IH2_3_BASE (0xfffe0300) |
Definition at line 59 of file omap16xx.h.
| #define OMAP_IH2_3_CONTROL (OMAP_IH2_3_BASE + 0x18) |
Definition at line 89 of file omap16xx.h.
| #define OMAP_IH2_3_ILR3 (OMAP_IH2_3_BASE + 0x1c) |
Definition at line 90 of file omap16xx.h.
| #define OMAP_IH2_3_ISR (OMAP_IH2_3_BASE + 0x9c) |
Definition at line 91 of file omap16xx.h.
| #define OMAP_IH2_3_ITR (OMAP_IH2_3_BASE + 0x00) |
Definition at line 85 of file omap16xx.h.
| #define OMAP_IH2_3_MIR (OMAP_IH2_3_BASE + 0x04) |
Definition at line 86 of file omap16xx.h.
| #define OMAP_IH2_3_SIR_FIQ (OMAP_IH2_3_BASE + 0x14) |
Definition at line 88 of file omap16xx.h.
| #define OMAP_IH2_3_SIR_IRQ (OMAP_IH2_3_BASE + 0x10) |
Definition at line 87 of file omap16xx.h.
| #define TIPB_SWITCH_BASE (0xfffbc800) |
Definition at line 123 of file omap16xx.h.
| #define UART3_ACREG (OMAP1_UART3_BASE + 0x3C) |
Definition at line 157 of file omap16xx.h.
| #define UART3_BLR (OMAP1_UART3_BASE + 0x38) |
Definition at line 156 of file omap16xx.h.
| #define UART3_DIV16 (OMAP1_UART3_BASE + 0x3C) |
Definition at line 158 of file omap16xx.h.
| #define UART3_DLH (OMAP1_UART3_BASE + 4) |
Definition at line 131 of file omap16xx.h.
| #define UART3_DLL (OMAP1_UART3_BASE + 0) |
Definition at line 129 of file omap16xx.h.
| #define UART3_EBLR (OMAP1_UART3_BASE + 0x48) |
Definition at line 161 of file omap16xx.h.
| #define UART3_EFR (OMAP1_UART3_BASE + 8) |
Definition at line 134 of file omap16xx.h.
| #define UART3_FCR (OMAP1_UART3_BASE + 8) |
Definition at line 133 of file omap16xx.h.
| #define UART3_IER (OMAP1_UART3_BASE + 4) |
Definition at line 130 of file omap16xx.h.
| #define UART3_IIR (OMAP1_UART3_BASE + 8) |
Definition at line 132 of file omap16xx.h.
| #define UART3_LCR (OMAP1_UART3_BASE + 0x0C) |
Definition at line 135 of file omap16xx.h.
| #define UART3_LSR (OMAP1_UART3_BASE + 0x14) |
Definition at line 139 of file omap16xx.h.
| #define UART3_MCR (OMAP1_UART3_BASE + 0x10) |
Definition at line 136 of file omap16xx.h.
| #define UART3_MDR1 (OMAP1_UART3_BASE + 0x20) |
Definition at line 146 of file omap16xx.h.
| #define UART3_MDR2 (OMAP1_UART3_BASE + 0x24) |
Definition at line 147 of file omap16xx.h.
| #define UART3_MSR (OMAP1_UART3_BASE + 0x18) |
Definition at line 141 of file omap16xx.h.
| #define UART3_MVR (OMAP1_UART3_BASE + 0x50) |
Definition at line 163 of file omap16xx.h.
| #define UART3_OSC_12M_SEL (OMAP1_UART3_BASE + 0x4C) |
Definition at line 162 of file omap16xx.h.
| #define UART3_RESUME (OMAP1_UART3_BASE + 0x2C) |
Definition at line 150 of file omap16xx.h.
| #define UART3_RHR (OMAP1_UART3_BASE + 0) |
Definition at line 127 of file omap16xx.h.
| #define UART3_RXFLH (OMAP1_UART3_BASE + 0x34) |
Definition at line 155 of file omap16xx.h.
| #define UART3_RXFLL (OMAP1_UART3_BASE + 0x30) |
Definition at line 153 of file omap16xx.h.
| #define UART3_SCR (OMAP1_UART3_BASE + 0x40) |
Definition at line 159 of file omap16xx.h.
| #define UART3_SFLSR (OMAP1_UART3_BASE + 0x28) |
Definition at line 148 of file omap16xx.h.
| #define UART3_SFREGH (OMAP1_UART3_BASE + 0x34) |
Definition at line 154 of file omap16xx.h.
| #define UART3_SFREGL (OMAP1_UART3_BASE + 0x30) |
Definition at line 152 of file omap16xx.h.
| #define UART3_SPR (OMAP1_UART3_BASE + 0x1C) |
Definition at line 144 of file omap16xx.h.
| #define UART3_SSR (OMAP1_UART3_BASE + 0x44) |
Definition at line 160 of file omap16xx.h.
| #define UART3_TCR (OMAP1_UART3_BASE + 0x18) |
Definition at line 140 of file omap16xx.h.
| #define UART3_THR (OMAP1_UART3_BASE + 0) |
Definition at line 128 of file omap16xx.h.
| #define UART3_TLR (OMAP1_UART3_BASE + 0x1C) |
Definition at line 145 of file omap16xx.h.
| #define UART3_TXFLH (OMAP1_UART3_BASE + 0x2C) |
Definition at line 151 of file omap16xx.h.
| #define UART3_TXFLL (OMAP1_UART3_BASE + 0x28) |
Definition at line 149 of file omap16xx.h.
| #define UART3_XOFF1 (OMAP1_UART3_BASE + 0x18) |
Definition at line 142 of file omap16xx.h.
| #define UART3_XOFF2 (OMAP1_UART3_BASE + 0x1C) |
Definition at line 143 of file omap16xx.h.
| #define UART3_XON1_ADDR1 (OMAP1_UART3_BASE + 0x10) |
Definition at line 137 of file omap16xx.h.
| #define UART3_XON2_ADDR2 (OMAP1_UART3_BASE + 0x14) |
Definition at line 138 of file omap16xx.h.
| #define WCLR_PRE_SHIFT 5 |
Definition at line 183 of file omap16xx.h.
| #define WCLR_PTV_SHIFT 2 |
Definition at line 184 of file omap16xx.h.
| #define WSPR_DISABLE_0 (0x0000aaaa) |
Definition at line 194 of file omap16xx.h.
| #define WSPR_DISABLE_1 (0x00005555) |
Definition at line 195 of file omap16xx.h.
| #define WSPR_ENABLE_0 (0x0000bbbb) |
Definition at line 192 of file omap16xx.h.
| #define WSPR_ENABLE_1 (0x00004444) |
Definition at line 193 of file omap16xx.h.
| #define WWPS_W_PEND_WCLR (1 << 0) |
Definition at line 190 of file omap16xx.h.
| #define WWPS_W_PEND_WCRR (1 << 1) |
Definition at line 189 of file omap16xx.h.
| #define WWPS_W_PEND_WLDR (1 << 2) |
Definition at line 188 of file omap16xx.h.
| #define WWPS_W_PEND_WSPR (1 << 4) |
Definition at line 186 of file omap16xx.h.
| #define WWPS_W_PEND_WTGR (1 << 3) |
Definition at line 187 of file omap16xx.h.
1.8.2