omap_l3_smx.h File Reference

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Data Structures
struct	omap3_l3

Macros
#define	L3_COMPONENT   0x000
#define	L3_CORE   0x018
#define	L3_AGENT_CONTROL   0x020
#define	L3_AGENT_STATUS   0x028
#define	L3_ERROR_LOG   0x058
#define	L3_ERROR_LOG_MULTI   (1 << 31)
#define	L3_ERROR_LOG_SECONDARY   (1 << 30)
#define	L3_ERROR_LOG_ADDR   0x060
#define	L3_SI_CONTROL   0x020
#define	L3_SI_FLAG_STATUS_0   0x510
#define	L3_STATUS_0_MPUIA_BRST   (shift << 0)
#define	L3_STATUS_0_MPUIA_RSP   (shift << 1)
#define	L3_STATUS_0_MPUIA_INBAND   (shift << 2)
#define	L3_STATUS_0_IVAIA_BRST   (shift << 6)
#define	L3_STATUS_0_IVAIA_RSP   (shift << 7)
#define	L3_STATUS_0_IVAIA_INBAND   (shift << 8)
#define	L3_STATUS_0_SGXIA_BRST   (shift << 9)
#define	L3_STATUS_0_SGXIA_RSP   (shift << 10)
#define	L3_STATUS_0_SGXIA_MERROR   (shift << 11)
#define	L3_STATUS_0_CAMIA_BRST   (shift << 12)
#define	L3_STATUS_0_CAMIA_RSP   (shift << 13)
#define	L3_STATUS_0_CAMIA_INBAND   (shift << 14)
#define	L3_STATUS_0_DISPIA_BRST   (shift << 15)
#define	L3_STATUS_0_DISPIA_RSP   (shift << 16)
#define	L3_STATUS_0_DMARDIA_BRST   (shift << 18)
#define	L3_STATUS_0_DMARDIA_RSP   (shift << 19)
#define	L3_STATUS_0_DMAWRIA_BRST   (shift << 21)
#define	L3_STATUS_0_DMAWRIA_RSP   (shift << 22)
#define	L3_STATUS_0_USBOTGIA_BRST   (shift << 24)
#define	L3_STATUS_0_USBOTGIA_RSP   (shift << 25)
#define	L3_STATUS_0_USBOTGIA_INBAND   (shift << 26)
#define	L3_STATUS_0_USBHOSTIA_BRST   (shift << 27)
#define	L3_STATUS_0_USBHOSTIA_INBAND   (shift << 28)
#define	L3_STATUS_0_SMSTA_REQ   (shift << 48)
#define	L3_STATUS_0_GPMCTA_REQ   (shift << 49)
#define	L3_STATUS_0_OCMRAMTA_REQ   (shift << 50)
#define	L3_STATUS_0_OCMROMTA_REQ   (shift << 51)
#define	L3_STATUS_0_IVATA_REQ   (shift << 54)
#define	L3_STATUS_0_SGXTA_REQ   (shift << 55)
#define	L3_STATUS_0_SGXTA_SERROR   (shift << 56)
#define	L3_STATUS_0_GPMCTA_SERROR   (shift << 57)
#define	L3_STATUS_0_L4CORETA_REQ   (shift << 58)
#define	L3_STATUS_0_L4PERTA_REQ   (shift << 59)
#define	L3_STATUS_0_L4EMUTA_REQ   (shift << 60)
#define	L3_STATUS_0_MAD2DTA_REQ   (shift << 61)
#define	L3_STATUS_0_TIMEOUT_MASK
#define	L3_SI_FLAG_STATUS_1   0x530
#define	L3_STATUS_1_MPU_DATAIA   (1 << 0)
#define	L3_STATUS_1_DAPIA0   (1 << 3)
#define	L3_STATUS_1_DAPIA1   (1 << 4)
#define	L3_STATUS_1_IVAIA   (1 << 6)
#define	L3_PM_ERROR_LOG   0x020
#define	L3_PM_CONTROL   0x028
#define	L3_PM_ERROR_CLEAR_SINGLE   0x030
#define	L3_PM_ERROR_CLEAR_MULTI   0x038
#define	L3_PM_REQ_INFO_PERMISSION(n)   (0x048 + (0x020 * n))
#define	L3_PM_READ_PERMISSION(n)   (0x050 + (0x020 * n))
#define	L3_PM_WRITE_PERMISSION(n)   (0x058 + (0x020 * n))
#define	L3_PM_ADDR_MATCH(n)   (0x060 + (0x020 * n))
#define	L3_ERROR_LOG_CODE   24
#define	L3_ERROR_LOG_INITID   8
#define	L3_ERROR_LOG_CMD   0
#define	L3_AGENT_STATUS_CLEAR_IA   0x10000000
#define	L3_AGENT_STATUS_CLEAR_TA   0x01000000
#define	OMAP34xx_IRQ_L3_APP   10
#define	L3_APPLICATION_ERROR   0x0
#define	L3_DEBUG_ERROR   0x1
#define	__raw_writell(v, a)
#define	__raw_readll(a)

Enumerations
enum	omap3_l3_initiator_id {   OMAP_L3_LCD = 29, OMAP_L3_SAD2D = 28, OMAP_L3_IA_MPU_SS_1 = 27, OMAP_L3_IA_MPU_SS_2 = 26,   OMAP_L3_IA_MPU_SS_3 = 25, OMAP_L3_IA_MPU_SS_4 = 24, OMAP_L3_IA_MPU_SS_5 = 23, OMAP_L3_IA_IVA_SS_1 = 22,   OMAP_L3_IA_IVA_SS_2 = 21, OMAP_L3_IA_IVA_SS_3 = 20, OMAP_L3_IA_IVA_SS_DMA_1 = 19, OMAP_L3_IA_IVA_SS_DMA_2 = 18,   OMAP_L3_IA_IVA_SS_DMA_3 = 17, OMAP_L3_IA_IVA_SS_DMA_4 = 16, OMAP_L3_IA_IVA_SS_DMA_5 = 15, OMAP_L3_IA_IVA_SS_DMA_6 = 14,   OMAP_L3_IA_SGX = 13, OMAP_L3_IA_CAM_1 = 12, OMAP_L3_IA_CAM_2 = 11, OMAP_L3_IA_CAM_3 = 10,   OMAP_L3_IA_DAP = 9, OMAP_L3_SDMA_WR_1 = 8, OMAP_L3_SDMA_WR_2 = 7, OMAP_L3_SDMA_RD_1 = 6,   OMAP_L3_SDMA_RD_2 = 5, OMAP_L3_SDMA_RD_3 = 4, OMAP_L3_SDMA_RD_4 = 3, OMAP_L3_USBOTG = 2,   OMAP_L3_USBHOST = 1 }
enum	omap3_l3_code {   OMAP_L3_CODE_NOERROR = 0, OMAP_L3_CODE_UNSUP_CMD = 1, OMAP_L3_CODE_ADDR_HOLE = 2, OMAP_L3_CODE_PROTECT_VIOLATION = 3,   OMAP_L3_CODE_IN_BAND_ERR = 4, OMAP_L3_CODE_REQ_TOUT_NOT_ACCEPT = 7, OMAP_L3_CODE_REQ_TOUT_NO_RESP = 8 }

Macro Definition Documentation

#define __raw_readll

(

a

)

Value:

(__chk_io_ptr(a), \
                *(volatile u64 __force *)(a))

Definition at line 335 of file omap_l3_smx.h.

#define __raw_writell	(		v,
			a
	)

Value:

(__chk_io_ptr(a), \
                *(volatile u64 __force *)(a) = (v))

Definition at line 333 of file omap_l3_smx.h.

#define L3_AGENT_CONTROL   0x020

Definition at line 30 of file omap_l3_smx.h.

#define L3_AGENT_STATUS   0x028

Definition at line 31 of file omap_l3_smx.h.

#define L3_AGENT_STATUS_CLEAR_IA   0x10000000

Definition at line 131 of file omap_l3_smx.h.

#define L3_AGENT_STATUS_CLEAR_TA   0x01000000

Definition at line 132 of file omap_l3_smx.h.

#define L3_APPLICATION_ERROR   0x0

Definition at line 135 of file omap_l3_smx.h.

#define L3_COMPONENT   0x000

Definition at line 28 of file omap_l3_smx.h.

#define L3_CORE   0x018

Definition at line 29 of file omap_l3_smx.h.

#define L3_DEBUG_ERROR   0x1

Definition at line 136 of file omap_l3_smx.h.

#define L3_ERROR_LOG   0x058

Definition at line 32 of file omap_l3_smx.h.

#define L3_ERROR_LOG_ADDR   0x060

Definition at line 37 of file omap_l3_smx.h.

#define L3_ERROR_LOG_CMD   0

Definition at line 128 of file omap_l3_smx.h.

#define L3_ERROR_LOG_CODE   24

Definition at line 126 of file omap_l3_smx.h.

#define L3_ERROR_LOG_INITID   8

Definition at line 127 of file omap_l3_smx.h.

#define L3_ERROR_LOG_MULTI   (1 << 31)

Definition at line 34 of file omap_l3_smx.h.

#define L3_ERROR_LOG_SECONDARY   (1 << 30)

Definition at line 35 of file omap_l3_smx.h.

#define L3_PM_ADDR_MATCH

(

n

)

(0x060 + (0x020 * n))

Definition at line 123 of file omap_l3_smx.h.

#define L3_PM_CONTROL   0x028

Definition at line 117 of file omap_l3_smx.h.

#define L3_PM_ERROR_CLEAR_MULTI   0x038

Definition at line 119 of file omap_l3_smx.h.

#define L3_PM_ERROR_CLEAR_SINGLE   0x030

Definition at line 118 of file omap_l3_smx.h.

#define L3_PM_ERROR_LOG   0x020

Definition at line 116 of file omap_l3_smx.h.

#define L3_PM_READ_PERMISSION

(

n

)

(0x050 + (0x020 * n))

Definition at line 121 of file omap_l3_smx.h.

#define L3_PM_REQ_INFO_PERMISSION

(

n

)

(0x048 + (0x020 * n))

Definition at line 120 of file omap_l3_smx.h.

#define L3_PM_WRITE_PERMISSION

(

n

)

(0x058 + (0x020 * n))

Definition at line 122 of file omap_l3_smx.h.

#define L3_SI_CONTROL   0x020

Definition at line 40 of file omap_l3_smx.h.

#define L3_SI_FLAG_STATUS_0   0x510

Definition at line 41 of file omap_l3_smx.h.

#define L3_SI_FLAG_STATUS_1   0x530

Definition at line 109 of file omap_l3_smx.h.

#define L3_STATUS_0_CAMIA_BRST   (shift << 12)

Definition at line 54 of file omap_l3_smx.h.

#define L3_STATUS_0_CAMIA_INBAND   (shift << 14)

Definition at line 56 of file omap_l3_smx.h.

#define L3_STATUS_0_CAMIA_RSP   (shift << 13)

Definition at line 55 of file omap_l3_smx.h.

#define L3_STATUS_0_DISPIA_BRST   (shift << 15)

Definition at line 57 of file omap_l3_smx.h.

#define L3_STATUS_0_DISPIA_RSP   (shift << 16)

Definition at line 58 of file omap_l3_smx.h.

#define L3_STATUS_0_DMARDIA_BRST   (shift << 18)

Definition at line 59 of file omap_l3_smx.h.

#define L3_STATUS_0_DMARDIA_RSP   (shift << 19)

Definition at line 60 of file omap_l3_smx.h.

#define L3_STATUS_0_DMAWRIA_BRST   (shift << 21)

Definition at line 61 of file omap_l3_smx.h.

#define L3_STATUS_0_DMAWRIA_RSP   (shift << 22)

Definition at line 62 of file omap_l3_smx.h.

#define L3_STATUS_0_GPMCTA_REQ   (shift << 49)

Definition at line 69 of file omap_l3_smx.h.

#define L3_STATUS_0_GPMCTA_SERROR   (shift << 57)

Definition at line 75 of file omap_l3_smx.h.

#define L3_STATUS_0_IVAIA_BRST   (shift << 6)

Definition at line 48 of file omap_l3_smx.h.

#define L3_STATUS_0_IVAIA_INBAND   (shift << 8)

Definition at line 50 of file omap_l3_smx.h.

#define L3_STATUS_0_IVAIA_RSP   (shift << 7)

Definition at line 49 of file omap_l3_smx.h.

#define L3_STATUS_0_IVATA_REQ   (shift << 54)

Definition at line 72 of file omap_l3_smx.h.

#define L3_STATUS_0_L4CORETA_REQ   (shift << 58)

Definition at line 76 of file omap_l3_smx.h.

#define L3_STATUS_0_L4EMUTA_REQ   (shift << 60)

Definition at line 78 of file omap_l3_smx.h.

#define L3_STATUS_0_L4PERTA_REQ   (shift << 59)

Definition at line 77 of file omap_l3_smx.h.

#define L3_STATUS_0_MAD2DTA_REQ   (shift << 61)

Definition at line 79 of file omap_l3_smx.h.

#define L3_STATUS_0_MPUIA_BRST   (shift << 0)

Definition at line 45 of file omap_l3_smx.h.

#define L3_STATUS_0_MPUIA_INBAND   (shift << 2)

Definition at line 47 of file omap_l3_smx.h.

#define L3_STATUS_0_MPUIA_RSP   (shift << 1)

Definition at line 46 of file omap_l3_smx.h.

#define L3_STATUS_0_OCMRAMTA_REQ   (shift << 50)

Definition at line 70 of file omap_l3_smx.h.

#define L3_STATUS_0_OCMROMTA_REQ   (shift << 51)

Definition at line 71 of file omap_l3_smx.h.

#define L3_STATUS_0_SGXIA_BRST   (shift << 9)

Definition at line 51 of file omap_l3_smx.h.

#define L3_STATUS_0_SGXIA_MERROR   (shift << 11)

Definition at line 53 of file omap_l3_smx.h.

#define L3_STATUS_0_SGXIA_RSP   (shift << 10)

Definition at line 52 of file omap_l3_smx.h.

#define L3_STATUS_0_SGXTA_REQ   (shift << 55)

Definition at line 73 of file omap_l3_smx.h.

#define L3_STATUS_0_SGXTA_SERROR   (shift << 56)

Definition at line 74 of file omap_l3_smx.h.

#define L3_STATUS_0_SMSTA_REQ   (shift << 48)

Definition at line 68 of file omap_l3_smx.h.

#define L3_STATUS_0_TIMEOUT_MASK

Value:

(L3_STATUS_0_MPUIA_BRST     \
                    | L3_STATUS_0_MPUIA_RSP     \
                    | L3_STATUS_0_IVAIA_BRST    \
                    | L3_STATUS_0_IVAIA_RSP     \
                    | L3_STATUS_0_SGXIA_BRST    \
                    | L3_STATUS_0_SGXIA_RSP     \
                    | L3_STATUS_0_CAMIA_BRST    \
                    | L3_STATUS_0_CAMIA_RSP     \
                    | L3_STATUS_0_DISPIA_BRST   \
                    | L3_STATUS_0_DISPIA_RSP    \
                    | L3_STATUS_0_DMARDIA_BRST  \
                    | L3_STATUS_0_DMARDIA_RSP   \
                    | L3_STATUS_0_DMAWRIA_BRST  \
                    | L3_STATUS_0_DMAWRIA_RSP   \
                    | L3_STATUS_0_USBOTGIA_BRST \
                    | L3_STATUS_0_USBOTGIA_RSP  \
                    | L3_STATUS_0_USBHOSTIA_BRST    \
                    | L3_STATUS_0_SMSTA_REQ     \
                    | L3_STATUS_0_GPMCTA_REQ    \
                    | L3_STATUS_0_OCMRAMTA_REQ  \
                    | L3_STATUS_0_OCMROMTA_REQ  \
                    | L3_STATUS_0_IVATA_REQ     \
                    | L3_STATUS_0_SGXTA_REQ     \
                    | L3_STATUS_0_L4CORETA_REQ  \
                    | L3_STATUS_0_L4PERTA_REQ   \
                    | L3_STATUS_0_L4EMUTA_REQ   \
                    | L3_STATUS_0_MAD2DTA_REQ)

Definition at line 81 of file omap_l3_smx.h.

#define L3_STATUS_0_USBHOSTIA_BRST   (shift << 27)

Definition at line 66 of file omap_l3_smx.h.

#define L3_STATUS_0_USBHOSTIA_INBAND   (shift << 28)

Definition at line 67 of file omap_l3_smx.h.

#define L3_STATUS_0_USBOTGIA_BRST   (shift << 24)

Definition at line 63 of file omap_l3_smx.h.

#define L3_STATUS_0_USBOTGIA_INBAND   (shift << 26)

Definition at line 65 of file omap_l3_smx.h.

#define L3_STATUS_0_USBOTGIA_RSP   (shift << 25)

Definition at line 64 of file omap_l3_smx.h.

#define L3_STATUS_1_DAPIA0   (1 << 3)

Definition at line 112 of file omap_l3_smx.h.

#define L3_STATUS_1_DAPIA1   (1 << 4)

Definition at line 113 of file omap_l3_smx.h.

#define L3_STATUS_1_IVAIA   (1 << 6)

Definition at line 114 of file omap_l3_smx.h.

#define L3_STATUS_1_MPU_DATAIA   (1 << 0)

Definition at line 111 of file omap_l3_smx.h.

#define OMAP34xx_IRQ_L3_APP   10

Definition at line 134 of file omap_l3_smx.h.

Enumeration Type Documentation

enum omap3_l3_code

Enumerator:

OMAP_L3_CODE_NOERROR
OMAP_L3_CODE_UNSUP_CMD
OMAP_L3_CODE_ADDR_HOLE
OMAP_L3_CODE_PROTECT_VIOLATION
OMAP_L3_CODE_IN_BAND_ERR
OMAP_L3_CODE_REQ_TOUT_NOT_ACCEPT
OMAP_L3_CODE_REQ_TOUT_NO_RESP

Definition at line 182 of file omap_l3_smx.h.

enum omap3_l3_initiator_id

Enumerator:

OMAP_L3_LCD
OMAP_L3_SAD2D
OMAP_L3_IA_MPU_SS_1
OMAP_L3_IA_MPU_SS_2
OMAP_L3_IA_MPU_SS_3
OMAP_L3_IA_MPU_SS_4
OMAP_L3_IA_MPU_SS_5
OMAP_L3_IA_IVA_SS_1
OMAP_L3_IA_IVA_SS_2
OMAP_L3_IA_IVA_SS_3
OMAP_L3_IA_IVA_SS_DMA_1
OMAP_L3_IA_IVA_SS_DMA_2
OMAP_L3_IA_IVA_SS_DMA_3
OMAP_L3_IA_IVA_SS_DMA_4
OMAP_L3_IA_IVA_SS_DMA_5
OMAP_L3_IA_IVA_SS_DMA_6
OMAP_L3_IA_SGX
OMAP_L3_IA_CAM_1
OMAP_L3_IA_CAM_2
OMAP_L3_IA_CAM_3
OMAP_L3_IA_DAP
OMAP_L3_SDMA_WR_1
OMAP_L3_SDMA_WR_2
OMAP_L3_SDMA_RD_1
OMAP_L3_SDMA_RD_2
OMAP_L3_SDMA_RD_3
OMAP_L3_SDMA_RD_4
OMAP_L3_USBOTG
OMAP_L3_USBHOST

Definition at line 138 of file omap_l3_smx.h.