#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/netdevice.h>
#include <linux/skbuff.h>
#include <linux/can.h>
#include <linux/can/dev.h>
#include <linux/can/error.h>
Go to the source code of this file.
|
| enum | pch_ifreg { PCH_RX_IFREG,
PCH_TX_IFREG
} |
| |
| enum | pch_can_err {
PCH_STUF_ERR = 1,
PCH_FORM_ERR,
PCH_ACK_ERR,
PCH_BIT1_ERR,
PCH_BIT0_ERR,
PCH_CRC_ERR,
PCH_LEC_ALL
} |
| |
| enum | pch_can_mode {
PCH_CAN_ENABLE,
PCH_CAN_DISABLE,
PCH_CAN_ALL,
PCH_CAN_NONE,
PCH_CAN_STOP,
PCH_CAN_RUN
} |
| |
| #define PCH_BIT_BRP_SHIFT 0 |
| #define PCH_BIT_BRPE_BRPE_SHIFT 6 |
| #define PCH_BIT_SJW_SHIFT 6 |
| #define PCH_BIT_TSEG1_SHIFT 8 |
| #define PCH_BIT_TSEG2_SHIFT 12 |
| #define PCH_BUS_OFF BIT(7) |
| #define PCH_CAN_CLK 50000000 /* 50MHz */ |
| #define pch_can_resume NULL |
| #define pch_can_suspend NULL |
| #define PCH_CMASK_ALL 0xff |
| #define PCH_CMASK_ARB BIT(5) |
| #define PCH_CMASK_CLRINTPND BIT(3) |
| #define PCH_CMASK_CTRL BIT(4) |
| #define PCH_CMASK_MASK BIT(6) |
| #define PCH_CMASK_NEWDAT BIT(2) |
| #define PCH_CMASK_RDWR BIT(7) |
| #define PCH_CMASK_RX_TX_GET 0x0073 |
| #define PCH_CMASK_RX_TX_SET 0x00f3 |
| #define PCH_COUNTER_LIMIT 10 |
| #define PCH_CTRL_CCE BIT(6) |
| #define PCH_CTRL_IE_SIE_EIE (BIT(3) | BIT(2) | BIT(1)) |
| #define PCH_CTRL_INIT BIT(0) /* The INIT bit of CANCONT register. */ |
| #define PCH_CTRL_OPT BIT(7) /* The OPT bit of CANCONT register. */ |
| #define PCH_EPASSIV BIT(5) |
| #define PCH_FIFO_THRESH 16 |
| #define PCH_ID2_DIR BIT(13) |
| #define PCH_ID2_XTD BIT(14) |
| #define PCH_ID_MSGVAL BIT(15) |
| #define PCH_IF_CREQ_BUSY BIT(15) |
| #define PCH_IF_MCONT_DLC (BIT(0) | BIT(1) | BIT(2) | BIT(3)) |
| #define PCH_IF_MCONT_EOB BIT(7) |
| #define PCH_IF_MCONT_INTPND BIT(13) |
| #define PCH_IF_MCONT_MSGLOST BIT(14) |
| #define PCH_IF_MCONT_NEWDAT BIT(15) |
| #define PCH_IF_MCONT_RMTEN BIT(9) |
| #define PCH_IF_MCONT_RXIE BIT(10) |
| #define PCH_IF_MCONT_TXIE BIT(11) |
| #define PCH_IF_MCONT_TXRQXT BIT(8) |
| #define PCH_IF_MCONT_UMASK BIT(12) |
| #define PCH_MASK2_MDIR_MXTD (BIT(14) | BIT(15)) |
| #define PCH_MSK_BITT_BRP 0x3f |
| #define PCH_MSK_BRPE_BRPE 0x3c0 |
| #define PCH_MSK_CTRL_IE_SIE_EIE 0x07 |
| #define PCH_OPT_LBACK BIT(4) /* The LoopBack bit of CANOPT reg. */ |
| #define PCH_OPT_SILENT BIT(3) /* The Silent bit of CANOPT reg. */ |
| #define PCH_REC 0x00007f00 |
| #define PCH_RP 0x00008000 |
| #define PCH_RX_OBJ_NUM 26 |
| #define PCH_RX_OBJ_START 1 |
| #define PCH_STATUS_INT 0x8000 |
| #define PCH_TEC 0x000000ff |
| #define PCH_TREQ2_TX_MASK |
- Enumerator:
| PCH_STUF_ERR |
|
| PCH_FORM_ERR |
|
| PCH_ACK_ERR |
|
| PCH_BIT1_ERR |
|
| PCH_BIT0_ERR |
|
| PCH_CRC_ERR |
|
| PCH_LEC_ALL |
|
Definition at line 116 of file pch_can.c.
- Enumerator:
| PCH_CAN_ENABLE |
|
| PCH_CAN_DISABLE |
|
| PCH_CAN_ALL |
|
| PCH_CAN_NONE |
|
| PCH_CAN_STOP |
|
| PCH_CAN_RUN |
|
Definition at line 126 of file pch_can.c.
- Enumerator:
| PCH_RX_IFREG |
|
| PCH_TX_IFREG |
|
Definition at line 111 of file pch_can.c.
| MODULE_DEVICE_TABLE |
( |
pci |
, |
|
|
pch_pci_tbl |
|
|
) |
| |
| MODULE_LICENSE |
( |
"GPL v2" |
| ) |
|
| module_pci_driver |
( |
pch_can_pci_driver |
| ) |
|
| MODULE_VERSION |
( |
"0.94" |
| ) |
|
1.8.2