pci-calgary_64.c File Reference

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/slab.h>
#include <linux/mm.h>
#include <linux/spinlock.h>
#include <linux/string.h>
#include <linux/crash_dump.h>
#include <linux/dma-mapping.h>
#include <linux/bitmap.h>
#include <linux/pci_ids.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/scatterlist.h>
#include <linux/iommu-helper.h>
#include <asm/iommu.h>
#include <asm/calgary.h>
#include <asm/tce.h>
#include <asm/pci-direct.h>
#include <asm/dma.h>
#include <asm/rio.h>
#include <asm/bios_ebda.h>
#include <asm/x86_init.h>
#include <asm/iommu_table.h>

Go to the source code of this file.

Data Structures
struct	calgary_bus_info

Macros
#define	pr_fmt(fmt)   "Calgary: " fmt
#define	PCI_DEVICE_ID_IBM_CALGARY   0x02a1
#define	PCI_DEVICE_ID_IBM_CALIOC2   0x0308
#define	CALGARY_CONFIG_REG   0x0108
#define	PHB_CSR_OFFSET   0x0110 /* Channel Status */
#define	PHB_PLSSR_OFFSET   0x0120
#define	PHB_CONFIG_RW_OFFSET   0x0160
#define	PHB_IOBASE_BAR_LOW   0x0170
#define	PHB_IOBASE_BAR_HIGH   0x0180
#define	PHB_MEM_1_LOW   0x0190
#define	PHB_MEM_1_HIGH   0x01A0
#define	PHB_IO_ADDR_SIZE   0x01B0
#define	PHB_MEM_1_SIZE   0x01C0
#define	PHB_MEM_ST_OFFSET   0x01D0
#define	PHB_AER_OFFSET   0x0200
#define	PHB_CONFIG_0_HIGH   0x0220
#define	PHB_CONFIG_0_LOW   0x0230
#define	PHB_CONFIG_0_END   0x0240
#define	PHB_MEM_2_LOW   0x02B0
#define	PHB_MEM_2_HIGH   0x02C0
#define	PHB_MEM_2_SIZE_HIGH   0x02D0
#define	PHB_MEM_2_SIZE_LOW   0x02E0
#define	PHB_DOSHOLE_OFFSET   0x08E0
#define	PHB_SAVIOR_L2   0x0DB0
#define	PHB_PAGE_MIG_CTRL   0x0DA8
#define	PHB_PAGE_MIG_DEBUG   0x0DA0
#define	PHB_ROOT_COMPLEX_STATUS   0x0CB0
#define	PHB_TCE_ENABLE   0x20000000
#define	PHB_SLOT_DISABLE   0x1C000000
#define	PHB_DAC_DISABLE   0x01000000
#define	PHB_MEM2_ENABLE   0x00400000
#define	PHB_MCSR_ENABLE   0x00100000
#define	TAR_SW_BITS   0x0000ffffffff800fUL
#define	TAR_VALID   0x0000000000000008UL
#define	CSR_AGENT_MASK   0xffe0ffff
#define	CCR_2SEC_TIMEOUT   0x000000000000000EUL
#define	PMR_SOFTSTOP   0x80000000
#define	PMR_SOFTSTOPFAULT   0x40000000
#define	PMR_HARDSTOP   0x20000000
#define	MAX_PHB_BUS_NUM   256
#define	PHBS_PER_CALGARY   4
#define	PHB_DEBUG_STUFF_OFFSET   0x0020
#define	EMERGENCY_PAGES   32 /* = 128KB */

Functions
int __init	detect_calgary (void)
	__setup ("calgary=", calgary_parse_options)
	rootfs_initcall (calgary_fixup_tce_spaces)
	IOMMU_INIT_POST (detect_calgary)

Variables
int use_calgary	__read_mostly = 0
unsigned int	specified_table_size = TCE_TABLE_SIZE_UNSPECIFIED
struct calgary_bus_info	__attribute__

Macro Definition Documentation

#define CALGARY_CONFIG_REG   0x0108

Definition at line 63 of file pci-calgary_64.c.

#define CCR_2SEC_TIMEOUT   0x000000000000000EUL

Definition at line 102 of file pci-calgary_64.c.

#define CSR_AGENT_MASK   0xffe0ffff

Definition at line 100 of file pci-calgary_64.c.

#define EMERGENCY_PAGES   32 /* = 128KB */

Definition at line 157 of file pci-calgary_64.c.

#define MAX_PHB_BUS_NUM   256

Definition at line 115 of file pci-calgary_64.c.

#define PCI_DEVICE_ID_IBM_CALGARY   0x02a1

Definition at line 59 of file pci-calgary_64.c.

#define PCI_DEVICE_ID_IBM_CALIOC2   0x0308

Definition at line 60 of file pci-calgary_64.c.

#define PHB_AER_OFFSET   0x0200

Definition at line 74 of file pci-calgary_64.c.

#define PHB_CONFIG_0_END   0x0240

Definition at line 77 of file pci-calgary_64.c.

#define PHB_CONFIG_0_HIGH   0x0220

Definition at line 75 of file pci-calgary_64.c.

#define PHB_CONFIG_0_LOW   0x0230

Definition at line 76 of file pci-calgary_64.c.

#define PHB_CONFIG_RW_OFFSET   0x0160

Definition at line 66 of file pci-calgary_64.c.

#define PHB_CSR_OFFSET   0x0110 /* Channel Status */

Definition at line 64 of file pci-calgary_64.c.

#define PHB_DAC_DISABLE   0x01000000

Definition at line 93 of file pci-calgary_64.c.

#define PHB_DEBUG_STUFF_OFFSET   0x0020

Definition at line 155 of file pci-calgary_64.c.

#define PHB_DOSHOLE_OFFSET   0x08E0

Definition at line 82 of file pci-calgary_64.c.

#define PHB_IO_ADDR_SIZE   0x01B0

Definition at line 71 of file pci-calgary_64.c.

#define PHB_IOBASE_BAR_HIGH   0x0180

Definition at line 68 of file pci-calgary_64.c.

#define PHB_IOBASE_BAR_LOW   0x0170

Definition at line 67 of file pci-calgary_64.c.

#define PHB_MCSR_ENABLE   0x00100000

Definition at line 95 of file pci-calgary_64.c.

#define PHB_MEM2_ENABLE   0x00400000

Definition at line 94 of file pci-calgary_64.c.

#define PHB_MEM_1_HIGH   0x01A0

Definition at line 70 of file pci-calgary_64.c.

#define PHB_MEM_1_LOW   0x0190

Definition at line 69 of file pci-calgary_64.c.

#define PHB_MEM_1_SIZE   0x01C0

Definition at line 72 of file pci-calgary_64.c.

#define PHB_MEM_2_HIGH   0x02C0

Definition at line 79 of file pci-calgary_64.c.

#define PHB_MEM_2_LOW   0x02B0

Definition at line 78 of file pci-calgary_64.c.

#define PHB_MEM_2_SIZE_HIGH   0x02D0

Definition at line 80 of file pci-calgary_64.c.

#define PHB_MEM_2_SIZE_LOW   0x02E0

Definition at line 81 of file pci-calgary_64.c.

#define PHB_MEM_ST_OFFSET   0x01D0

Definition at line 73 of file pci-calgary_64.c.

#define PHB_PAGE_MIG_CTRL   0x0DA8

Definition at line 86 of file pci-calgary_64.c.

#define PHB_PAGE_MIG_DEBUG   0x0DA0

Definition at line 87 of file pci-calgary_64.c.

#define PHB_PLSSR_OFFSET   0x0120

Definition at line 65 of file pci-calgary_64.c.

#define PHB_ROOT_COMPLEX_STATUS   0x0CB0

Definition at line 88 of file pci-calgary_64.c.

#define PHB_SAVIOR_L2   0x0DB0

Definition at line 85 of file pci-calgary_64.c.

#define PHB_SLOT_DISABLE   0x1C000000

Definition at line 92 of file pci-calgary_64.c.

#define PHB_TCE_ENABLE   0x20000000

Definition at line 91 of file pci-calgary_64.c.

#define PHBS_PER_CALGARY   4

Definition at line 117 of file pci-calgary_64.c.

#define PMR_HARDSTOP   0x20000000

Definition at line 106 of file pci-calgary_64.c.

#define PMR_SOFTSTOP   0x80000000

Definition at line 104 of file pci-calgary_64.c.

#define PMR_SOFTSTOPFAULT   0x40000000

Definition at line 105 of file pci-calgary_64.c.

#define pr_fmt

(

fmt

)

"Calgary: " fmt

Definition at line 25 of file pci-calgary_64.c.

#define TAR_SW_BITS   0x0000ffffffff800fUL

Definition at line 97 of file pci-calgary_64.c.

#define TAR_VALID   0x0000000000000008UL

Definition at line 98 of file pci-calgary_64.c.

Function Documentation

__setup

(

)

int __init detect_calgary

(

void

)

Definition at line 1366 of file pci-calgary_64.c.

IOMMU_INIT_POST

(

detect_calgary

)

rootfs_initcall

(

calgary_fixup_tce_spaces

)

Variable Documentation

struct calgary_bus_info __attribute__

int calgary_detected __read_mostly = 0

Definition at line 56 of file pci-calgary_64.c.

unsigned int specified_table_size = TCE_TABLE_SIZE_UNSPECIFIED

Definition at line 159 of file pci-calgary_64.c.