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arch
mips
pci
pci-tx4939.c
Go to the documentation of this file.
1
/*
2
* Based on linux/arch/mips/txx9/rbtx4939/setup.c,
3
* and RBTX49xx patch from CELF patch archive.
4
*
5
* Copyright 2001, 2003-2005 MontaVista Software Inc.
6
* Copyright (C) 2004 by Ralf Baechle (
[email protected]
)
7
* (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
8
*
9
* This file is subject to the terms and conditions of the GNU General Public
10
* License. See the file "COPYING" in the main directory of this archive
11
* for more details.
12
*/
13
#include <
linux/init.h
>
14
#include <linux/pci.h>
15
#include <linux/kernel.h>
16
#include <
linux/interrupt.h
>
17
#include <
asm/txx9/generic.h
>
18
#include <
asm/txx9/tx4939.h
>
19
20
int
__init
tx4939_report_pciclk
(
void
)
21
{
22
int
pciclk = 0;
23
24
pr_info
(
"PCIC --%s PCICLK:"
,
25
(
__raw_readq
(&
tx4939_ccfgptr
->ccfg) &
TX4939_CCFG_PCI66
) ?
26
" PCI66"
:
""
);
27
if
(
__raw_readq
(&
tx4939_ccfgptr
->pcfg) &
TX4939_PCFG_PCICLKEN_ALL
) {
28
pciclk =
txx9_master_clock
* 20 / 6;
29
if
(!(
__raw_readq
(&
tx4939_ccfgptr
->ccfg) &
TX4939_CCFG_PCI66
))
30
pciclk /= 2;
31
printk
(
KERN_CONT
"Internal(%u.%uMHz)"
,
32
(pciclk + 50000) / 1000000,
33
((pciclk + 50000) / 100000) % 10);
34
}
else
{
35
printk
(
KERN_CONT
"External"
);
36
pciclk = -1;
37
}
38
printk
(
KERN_CONT
"\n"
);
39
return
pciclk;
40
}
41
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void
__init
tx4939_report_pci1clk
(
void
)
43
{
44
unsigned
int
pciclk =
txx9_master_clock
* 20 / 6;
45
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pr_info
(
"PCIC1 -- PCICLK:%u.%uMHz\n"
,
47
(pciclk + 50000) / 1000000,
48
((pciclk + 50000) / 100000) % 10);
49
}
50
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int
__init
tx4939_pcic1_map_irq
(
const
struct
pci_dev
*
dev
,
u8
slot
)
52
{
53
if
(
get_tx4927_pcicptr
(dev->
bus
->sysdata) ==
tx4939_pcic1ptr
) {
54
switch
(slot) {
55
case
TX4927_PCIC_IDSEL_AD_TO_SLOT
(31):
56
if
(
__raw_readq
(&
tx4939_ccfgptr
->pcfg) &
57
TX4939_PCFG_ET0MODE
)
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return
TXX9_IRQ_BASE
+
TX4939_IR_ETH
(0);
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break
;
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case
TX4927_PCIC_IDSEL_AD_TO_SLOT
(30):
61
if
(
__raw_readq
(&
tx4939_ccfgptr
->pcfg) &
62
TX4939_PCFG_ET1MODE
)
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return
TXX9_IRQ_BASE
+
TX4939_IR_ETH
(1);
64
break
;
65
}
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return
0;
67
}
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return
-1;
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}
70
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int
__init
tx4939_pci_map_irq
(
const
struct
pci_dev
*
dev
,
u8
slot
,
u8
pin
)
72
{
73
int
irq
=
tx4939_pcic1_map_irq
(dev, slot);
74
75
if
(irq >= 0)
76
return
irq;
77
irq =
pin
;
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/* IRQ rotation */
79
irq--;
/* 0-3 */
80
irq = (irq + 33 -
slot
) % 4;
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irq++;
/* 1-4 */
82
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switch
(irq) {
84
case
1:
85
irq =
TXX9_IRQ_BASE
+
TX4939_IR_INTA
;
86
break
;
87
case
2:
88
irq =
TXX9_IRQ_BASE
+
TX4939_IR_INTB
;
89
break
;
90
case
3:
91
irq =
TXX9_IRQ_BASE
+
TX4939_IR_INTC
;
92
break
;
93
case
4:
94
irq =
TXX9_IRQ_BASE
+
TX4939_IR_INTD
;
95
break
;
96
}
97
return
irq;
98
}
99
100
void
__init
tx4939_setup_pcierr_irq
(
void
)
101
{
102
if
(
request_irq
(
TXX9_IRQ_BASE
+
TX4939_IR_PCIERR
,
103
tx4927_pcierr_interrupt
,
104
0,
"PCI error"
,
105
(
void
*)
TX4939_PCIC_REG
))
106
pr_warning
(
"Failed to request irq for PCIERR\n"
);
107
}
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