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Linux Kernel
3.7.1
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All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
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Linux Kernel
3.7.1
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#include <linux/module.h>#include <linux/kernel.h>#include <linux/string.h>#include <linux/interrupt.h>#include <linux/ptrace.h>#include <linux/errno.h>#include <linux/ioport.h>#include <linux/pci.h>#include <linux/eisa.h>#include <linux/delay.h>#include <linux/init.h>#include <linux/spinlock.h>#include <linux/crc32.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/skbuff.h>#include <linux/time.h>#include <linux/types.h>#include <linux/unistd.h>#include <linux/ctype.h>#include <linux/dma-mapping.h>#include <linux/moduleparam.h>#include <linux/bitops.h>#include <linux/gfp.h>#include <asm/io.h>#include <asm/dma.h>#include <asm/byteorder.h>#include <asm/unaligned.h>#include <asm/uaccess.h>#include "de4x5.h"Go to the source code of this file.
Data Structures | |
| struct | phy_table |
| struct | mii_phy |
| struct | sia_phy |
| struct | parameters |
| struct | de4x5_srom |
| struct | de4x5_desc |
| struct | pkt_stats |
| struct | de4x5_private |
| struct | InfoLeaf |
Macros | |
| #define | c_char const char |
| #define | DE4X5_MAX_PHY 8 /* Allow up to 8 attached PHY devices per board */ |
| #define | GENERIC_REG 0x05 /* Autoneg. Link Partner Advertisement Reg. */ |
| #define | GENERIC_MASK MII_ANLPA_100M /* All 100Mb/s Technologies */ |
| #define | GENERIC_VALUE MII_ANLPA_100M /* 100B-TX, 100B-TX FDX, 100B-T4 */ |
| #define | SMC 1 |
| #define | ACCTON 2 |
| #define | DE4X5_AUTOSENSE_MS 250 /* msec autosense tick (DE500) */ |
| #define | DE4X5_NDA 0xffe0 /* No Device (I/O) Address */ |
| #define | PROBE_LENGTH 32 |
| #define | ETH_PROM_SIG 0xAA5500FFUL |
| #define | PKT_BUF_SZ 1536 /* Buffer size for each Tx/Rx buffer */ |
| #define | IEEE802_3_SZ 1518 /* Packet + CRC */ |
| #define | MAX_PKT_SZ 1514 /* Maximum ethernet packet length */ |
| #define | MAX_DAT_SZ 1500 /* Maximum ethernet data length */ |
| #define | MIN_DAT_SZ 1 /* Minimum ethernet data length */ |
| #define | PKT_HDR_LEN 14 /* Addresses and data length info */ |
| #define | FAKE_FRAME_LEN (MAX_PKT_SZ + 1) |
| #define | QUEUE_PKT_TIMEOUT (3*HZ) /* 3 second timeout */ |
| #define | DE4X5_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */ |
| #define | DE4X5_EISA_TOTAL_SIZE 0x100 /* I/O address extent */ |
| #define | EISA_ALLOWED_IRQ_LIST {5, 9, 10, 11} |
| #define | DE4X5_SIGNATURE {"DE425","DE434","DE435","DE450","DE500"} |
| #define | DE4X5_NAME_LENGTH 8 |
| #define | PROBE_LENGTH 32 |
| #define | ETH_PROM_SIG 0xAA5500FFUL |
| #define | PCI_MAX_BUS_NUM 8 |
| #define | DE4X5_PCI_TOTAL_SIZE 0x80 /* I/O address extent */ |
| #define | DE4X5_CLASS_CODE 0x00020000 /* Network controller, Ethernet */ |
| #define | DE4X5_ALIGN4 ((u_long)4 - 1) /* 1 longword align */ |
| #define | DE4X5_ALIGN8 ((u_long)8 - 1) /* 2 longword align */ |
| #define | DE4X5_ALIGN16 ((u_long)16 - 1) /* 4 longword align */ |
| #define | DE4X5_ALIGN32 ((u_long)32 - 1) /* 8 longword align */ |
| #define | DE4X5_ALIGN64 ((u_long)64 - 1) /* 16 longword align */ |
| #define | DE4X5_ALIGN128 ((u_long)128 - 1) /* 32 longword align */ |
| #define | DE4X5_ALIGN DE4X5_ALIGN32 /* Keep the DC21040 happy... */ |
| #define | DE4X5_CACHE_ALIGN CAL_16LONG |
| #define | DESC_SKIP_LEN DSL_0 /* Must agree with DESC_ALIGN */ |
| #define | DESC_ALIGN |
| #define | ENABLE_IRQs |
| #define | DISABLE_IRQs |
| #define | UNMASK_IRQs |
| #define | MASK_IRQs |
| #define | START_DE4X5 |
| #define | STOP_DE4X5 |
| #define | RESET_SIA outl(0, DE4X5_SICR); /* Reset SIA connectivity regs */ |
| #define | DE4X5_AUTOSENSE_MS 250 |
| #define | SUB_VENDOR_ID 0x500a |
| #define | NUM_RX_DESC 8 /* Number of RX descriptors */ |
| #define | NUM_TX_DESC 32 /* Number of TX descriptors */ |
| #define | RX_BUFF_SZ 1536 /* Power of 2 for kmalloc and */ |
| #define | DE4X5_PKT_STAT_SZ 16 |
| #define | DE4X5_PKT_BIN_SZ |
| #define | TX_BUFFS_AVAIL |
| #define | TX_PKT_PENDING (lp->tx_old != lp->tx_new) |
| #define | INFOLEAF_SIZE ARRAY_SIZE(infoleaf_array) |
| #define | COMPACT (ARRAY_SIZE(dc_infoblock) - 1) |
| #define | RESET_DE4X5 |
| #define | PHY_HARD_RESET |
| #define | SAMPLE_INTERVAL 500 /* ms */ |
| #define | SAMPLE_DELAY 2000 /* ms */ |
| #define | DE4X5_DUMP 0x0f /* Dump the DE4X5 Status */ |
Functions | |
| module_param (io, int, 0) | |
| module_param (de4x5_debug, int, 0) | |
| module_param (dec_only, int, 0) | |
| module_param (args, charp, 0) | |
| MODULE_PARM_DESC (io,"de4x5 I/O base address") | |
| MODULE_PARM_DESC (de4x5_debug,"de4x5 debug mask") | |
| MODULE_PARM_DESC (dec_only,"de4x5 probe only for Digital boards (0-1)") | |
| MODULE_PARM_DESC (args,"de4x5 full duplex and media type settings; see de4x5.c for details") | |
| MODULE_LICENSE ("GPL") | |
| module_init (de4x5_module_init) | |
| module_exit (de4x5_module_exit) | |
| #define COMPACT (ARRAY_SIZE(dc_infoblock) - 1) |
| #define DE4X5_ALIGN DE4X5_ALIGN32 /* Keep the DC21040 happy... */ |
| #define DE4X5_CACHE_ALIGN CAL_16LONG |
| #define DE4X5_CLASS_CODE 0x00020000 /* Network controller, Ethernet */ |
| #define DE4X5_DUMP 0x0f /* Dump the DE4X5 Status */ |
| #define DE4X5_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */ |
| #define DE4X5_EISA_TOTAL_SIZE 0x100 /* I/O address extent */ |
| #define DE4X5_PKT_BIN_SZ |
| #define DE4X5_SIGNATURE {"DE425","DE434","DE435","DE450","DE500"} |
| #define DESC_SKIP_LEN DSL_0 /* Must agree with DESC_ALIGN */ |
| #define DISABLE_IRQs |
| #define ENABLE_IRQs |
| #define FAKE_FRAME_LEN (MAX_PKT_SZ + 1) |
| #define GENERIC_MASK MII_ANLPA_100M /* All 100Mb/s Technologies */ |
| #define GENERIC_REG 0x05 /* Autoneg. Link Partner Advertisement Reg. */ |
| #define GENERIC_VALUE MII_ANLPA_100M /* 100B-TX, 100B-TX FDX, 100B-T4 */ |
| #define INFOLEAF_SIZE ARRAY_SIZE(infoleaf_array) |
| #define MASK_IRQs |
| #define NUM_RX_DESC 8 /* Number of RX descriptors */ |
| #define NUM_TX_DESC 32 /* Number of TX descriptors */ |
| #define PHY_HARD_RESET |
| #define RESET_DE4X5 |
| #define RESET_SIA outl(0, DE4X5_SICR); /* Reset SIA connectivity regs */ |
| #define START_DE4X5 |
| #define STOP_DE4X5 |
| #define TX_BUFFS_AVAIL |
| #define UNMASK_IRQs |
| module_exit | ( | de4x5_module_exit | ) |
| module_init | ( | de4x5_module_init | ) |
| MODULE_LICENSE | ( | "GPL" | ) |
| module_param | ( | de4x5_debug | , |
| int | , | ||
| 0 | |||
| ) |
| module_param | ( | dec_only | , |
| int | , | ||
| 0 | |||
| ) |
| module_param | ( | args | , |
| charp | , | ||
| 0 | |||
| ) |
| MODULE_PARM_DESC | ( | dec_only | , |
| "de4x5 probe only for Digital boards (0-1)" | |||
| ) |
1.8.2