#include <linux/device.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include "pinctrl-pxa3xx.h"
Go to the source code of this file.
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#define | PXA910_DS_MASK 0x1800 |
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#define | PXA910_DS_SHIFT 11 |
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#define | PXA910_SLEEP_MASK 0x38 |
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#define | PXA910_SLEEP_SELECT (1 << 9) |
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#define | PXA910_SLEEP_DATA (1 << 8) |
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#define | PXA910_SLEEP_DIR (1 << 7) |
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#define | MFPR_910(a, r, f0, f1, f2, f3, f4, f5, f6, f7) |
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#define | GRP_910(a, m, p) { .name = a, .mux = PXA910_MUX_##m, .pins = p, .npins = ARRAY_SIZE(p), } |
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enum | pxa910_pin_list {
ND_IO15 = 128,
ND_IO14,
ND_IO13,
ND_IO12,
ND_IO11,
ND_IO10,
ND_IO9,
ND_IO8,
ND_IO7,
ND_IO6,
ND_IO5,
ND_IO4,
ND_IO3,
ND_IO2,
ND_IO1,
ND_IO0,
ND_NCS0,
ND_NCS1,
SM_NCS0,
SM_NCS1,
ND_NWE,
ND_NRE,
ND_CLE,
ND_ALE,
SM_SCLK,
ND_RDY0,
SM_ADV,
ND_RDY1,
SM_ADVMUX,
SM_RDY,
MMC1_DAT7,
MMC1_DAT6,
MMC1_DAT5,
MMC1_DAT4,
MMC1_DAT3,
MMC1_DAT2,
MMC1_DAT1,
MMC1_DAT0,
MMC1_CMD,
MMC1_CLK,
MMC1_CD,
VCXO_OUT
} |
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enum | pxa910_mux {
PXA910_MUX_GPIO = 0,
PXA910_MUX_NAND,
PXA910_MUX_USIM2,
PXA910_MUX_EXT_DMA,
PXA910_MUX_EXT_INT,
PXA910_MUX_MMC1,
PXA910_MUX_MMC2,
PXA910_MUX_MMC3,
PXA910_MUX_SM_INT,
PXA910_MUX_PRI_JTAG,
PXA910_MUX_SEC1_JTAG,
PXA910_MUX_SEC2_JTAG,
PXA910_MUX_RESET,
PXA910_MUX_CLK_REQ,
PXA910_MUX_VCXO_REQ,
PXA910_MUX_VCXO_OUT,
PXA910_MUX_VCXO_REQ2,
PXA910_MUX_VCXO_OUT2,
PXA910_MUX_SPI,
PXA910_MUX_SPI2,
PXA910_MUX_GSSP,
PXA910_MUX_SSP0,
PXA910_MUX_SSP1,
PXA910_MUX_SSP2,
PXA910_MUX_DSSP2,
PXA910_MUX_DSSP3,
PXA910_MUX_UART0,
PXA910_MUX_UART1,
PXA910_MUX_UART2,
PXA910_MUX_TWSI,
PXA910_MUX_CCIC,
PXA910_MUX_PWM0,
PXA910_MUX_PWM1,
PXA910_MUX_PWM2,
PXA910_MUX_PWM3,
PXA910_MUX_HSL,
PXA910_MUX_ONE_WIRE,
PXA910_MUX_LCD,
PXA910_MUX_DAC_ST23,
PXA910_MUX_ULPI,
PXA910_MUX_TB,
PXA910_MUX_KP_MK,
PXA910_MUX_KP_DK,
PXA910_MUX_TCU_GPOA,
PXA910_MUX_TCU_GPOB,
PXA910_MUX_ROT,
PXA910_MUX_TDS,
PXA910_MUX_32K_CLK,
PXA910_MUX_MN_CLK,
PXA910_MUX_SMC,
PXA910_MUX_SM_ADDR18,
PXA910_MUX_SM_ADDR19,
PXA910_MUX_SM_ADDR20,
PXA910_MUX_NONE = 0xffff
} |
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#define PXA910_DS_MASK 0x1800 |
#define PXA910_DS_SHIFT 11 |
#define PXA910_SLEEP_DATA (1 << 8) |
#define PXA910_SLEEP_DIR (1 << 7) |
#define PXA910_SLEEP_MASK 0x38 |
#define PXA910_SLEEP_SELECT (1 << 9) |
- Enumerator:
PXA910_MUX_GPIO |
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PXA910_MUX_NAND |
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PXA910_MUX_USIM2 |
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PXA910_MUX_EXT_DMA |
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PXA910_MUX_EXT_INT |
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PXA910_MUX_MMC1 |
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PXA910_MUX_MMC2 |
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PXA910_MUX_MMC3 |
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PXA910_MUX_SM_INT |
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PXA910_MUX_PRI_JTAG |
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PXA910_MUX_SEC1_JTAG |
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PXA910_MUX_SEC2_JTAG |
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PXA910_MUX_RESET |
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PXA910_MUX_CLK_REQ |
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PXA910_MUX_VCXO_REQ |
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PXA910_MUX_VCXO_OUT |
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PXA910_MUX_VCXO_REQ2 |
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PXA910_MUX_VCXO_OUT2 |
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PXA910_MUX_SPI |
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PXA910_MUX_SPI2 |
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PXA910_MUX_GSSP |
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PXA910_MUX_SSP0 |
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PXA910_MUX_SSP1 |
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PXA910_MUX_SSP2 |
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PXA910_MUX_DSSP2 |
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PXA910_MUX_DSSP3 |
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PXA910_MUX_UART0 |
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PXA910_MUX_UART1 |
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PXA910_MUX_UART2 |
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PXA910_MUX_TWSI |
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PXA910_MUX_CCIC |
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PXA910_MUX_PWM0 |
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PXA910_MUX_PWM1 |
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PXA910_MUX_PWM2 |
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PXA910_MUX_PWM3 |
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PXA910_MUX_HSL |
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PXA910_MUX_ONE_WIRE |
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PXA910_MUX_LCD |
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PXA910_MUX_DAC_ST23 |
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PXA910_MUX_ULPI |
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PXA910_MUX_TB |
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PXA910_MUX_KP_MK |
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PXA910_MUX_KP_DK |
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PXA910_MUX_TCU_GPOA |
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PXA910_MUX_TCU_GPOB |
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PXA910_MUX_ROT |
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PXA910_MUX_TDS |
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PXA910_MUX_32K_CLK |
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PXA910_MUX_MN_CLK |
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PXA910_MUX_SMC |
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PXA910_MUX_SM_ADDR18 |
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PXA910_MUX_SM_ADDR19 |
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PXA910_MUX_SM_ADDR20 |
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PXA910_MUX_NONE |
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Definition at line 94 of file pinctrl-pxa910.c.
- Enumerator:
ND_IO15 |
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ND_IO14 |
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ND_IO13 |
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ND_IO12 |
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ND_IO11 |
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ND_IO10 |
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ND_IO9 |
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ND_IO8 |
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ND_IO7 |
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ND_IO6 |
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ND_IO5 |
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ND_IO4 |
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ND_IO3 |
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ND_IO2 |
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ND_IO1 |
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ND_IO0 |
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ND_NCS0 |
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ND_NCS1 |
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SM_NCS0 |
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SM_NCS1 |
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ND_NWE |
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ND_NRE |
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ND_CLE |
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ND_ALE |
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SM_SCLK |
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ND_RDY0 |
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SM_ADV |
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ND_RDY1 |
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SM_ADVMUX |
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SM_RDY |
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MMC1_DAT7 |
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MMC1_DAT6 |
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MMC1_DAT5 |
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MMC1_DAT4 |
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MMC1_DAT3 |
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MMC1_DAT2 |
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MMC1_DAT1 |
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MMC1_DAT0 |
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MMC1_CMD |
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MMC1_CLK |
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MMC1_CD |
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VCXO_OUT |
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Definition at line 48 of file pinctrl-pxa910.c.
core_initcall_sync |
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pxa910_pinmux_init |
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module_exit |
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pxa910_pinmux_exit |
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MODULE_LICENSE |
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"GPL v2" |
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