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pinctrl-pxa910.c File Reference
#include <linux/device.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include "pinctrl-pxa3xx.h"

Go to the source code of this file.

Macros

#define PXA910_DS_MASK   0x1800
 
#define PXA910_DS_SHIFT   11
 
#define PXA910_SLEEP_MASK   0x38
 
#define PXA910_SLEEP_SELECT   (1 << 9)
 
#define PXA910_SLEEP_DATA   (1 << 8)
 
#define PXA910_SLEEP_DIR   (1 << 7)
 
#define MFPR_910(a, r, f0, f1, f2, f3, f4, f5, f6, f7)
 
#define GRP_910(a, m, p)   { .name = a, .mux = PXA910_MUX_##m, .pins = p, .npins = ARRAY_SIZE(p), }
 

Enumerations

enum  pxa910_pin_list {
  ND_IO15 = 128, ND_IO14, ND_IO13, ND_IO12,
  ND_IO11, ND_IO10, ND_IO9, ND_IO8,
  ND_IO7, ND_IO6, ND_IO5, ND_IO4,
  ND_IO3, ND_IO2, ND_IO1, ND_IO0,
  ND_NCS0, ND_NCS1, SM_NCS0, SM_NCS1,
  ND_NWE, ND_NRE, ND_CLE, ND_ALE,
  SM_SCLK, ND_RDY0, SM_ADV, ND_RDY1,
  SM_ADVMUX, SM_RDY, MMC1_DAT7, MMC1_DAT6,
  MMC1_DAT5, MMC1_DAT4, MMC1_DAT3, MMC1_DAT2,
  MMC1_DAT1, MMC1_DAT0, MMC1_CMD, MMC1_CLK,
  MMC1_CD, VCXO_OUT
}
 
enum  pxa910_mux {
  PXA910_MUX_GPIO = 0, PXA910_MUX_NAND, PXA910_MUX_USIM2, PXA910_MUX_EXT_DMA,
  PXA910_MUX_EXT_INT, PXA910_MUX_MMC1, PXA910_MUX_MMC2, PXA910_MUX_MMC3,
  PXA910_MUX_SM_INT, PXA910_MUX_PRI_JTAG, PXA910_MUX_SEC1_JTAG, PXA910_MUX_SEC2_JTAG,
  PXA910_MUX_RESET, PXA910_MUX_CLK_REQ, PXA910_MUX_VCXO_REQ, PXA910_MUX_VCXO_OUT,
  PXA910_MUX_VCXO_REQ2, PXA910_MUX_VCXO_OUT2, PXA910_MUX_SPI, PXA910_MUX_SPI2,
  PXA910_MUX_GSSP, PXA910_MUX_SSP0, PXA910_MUX_SSP1, PXA910_MUX_SSP2,
  PXA910_MUX_DSSP2, PXA910_MUX_DSSP3, PXA910_MUX_UART0, PXA910_MUX_UART1,
  PXA910_MUX_UART2, PXA910_MUX_TWSI, PXA910_MUX_CCIC, PXA910_MUX_PWM0,
  PXA910_MUX_PWM1, PXA910_MUX_PWM2, PXA910_MUX_PWM3, PXA910_MUX_HSL,
  PXA910_MUX_ONE_WIRE, PXA910_MUX_LCD, PXA910_MUX_DAC_ST23, PXA910_MUX_ULPI,
  PXA910_MUX_TB, PXA910_MUX_KP_MK, PXA910_MUX_KP_DK, PXA910_MUX_TCU_GPOA,
  PXA910_MUX_TCU_GPOB, PXA910_MUX_ROT, PXA910_MUX_TDS, PXA910_MUX_32K_CLK,
  PXA910_MUX_MN_CLK, PXA910_MUX_SMC, PXA910_MUX_SM_ADDR18, PXA910_MUX_SM_ADDR19,
  PXA910_MUX_SM_ADDR20, PXA910_MUX_NONE = 0xffff
}
 

Functions

 core_initcall_sync (pxa910_pinmux_init)
 
 module_exit (pxa910_pinmux_exit)
 
 MODULE_AUTHOR ("Haojian Zhuang <[email protected]>")
 
 MODULE_DESCRIPTION ("PXA3xx pin control driver")
 
 MODULE_LICENSE ("GPL v2")
 

Variables

struct pxa3xx_mfp_pin pxa910_mfp []
 

Macro Definition Documentation

#define GRP_910 (   a,
  m,
  p 
)    { .name = a, .mux = PXA910_MUX_##m, .pins = p, .npins = ARRAY_SIZE(p), }

Definition at line 44 of file pinctrl-pxa910.c.

#define MFPR_910 (   a,
  r,
  f0,
  f1,
  f2,
  f3,
  f4,
  f5,
  f6,
  f7 
)
Value:
{ \
.name = #a, \
.pin = a, \
.mfpr = r, \
.func = { \
PXA910_MUX_##f0, \
PXA910_MUX_##f1, \
PXA910_MUX_##f2, \
PXA910_MUX_##f3, \
PXA910_MUX_##f4, \
PXA910_MUX_##f5, \
PXA910_MUX_##f6, \
PXA910_MUX_##f7, \
}, \
}

Definition at line 27 of file pinctrl-pxa910.c.

#define PXA910_DS_MASK   0x1800

Definition at line 20 of file pinctrl-pxa910.c.

#define PXA910_DS_SHIFT   11

Definition at line 21 of file pinctrl-pxa910.c.

#define PXA910_SLEEP_DATA   (1 << 8)

Definition at line 24 of file pinctrl-pxa910.c.

#define PXA910_SLEEP_DIR   (1 << 7)

Definition at line 25 of file pinctrl-pxa910.c.

#define PXA910_SLEEP_MASK   0x38

Definition at line 22 of file pinctrl-pxa910.c.

#define PXA910_SLEEP_SELECT   (1 << 9)

Definition at line 23 of file pinctrl-pxa910.c.

Enumeration Type Documentation

enum pxa910_mux
Enumerator:
PXA910_MUX_GPIO 
PXA910_MUX_NAND 
PXA910_MUX_USIM2 
PXA910_MUX_EXT_DMA 
PXA910_MUX_EXT_INT 
PXA910_MUX_MMC1 
PXA910_MUX_MMC2 
PXA910_MUX_MMC3 
PXA910_MUX_SM_INT 
PXA910_MUX_PRI_JTAG 
PXA910_MUX_SEC1_JTAG 
PXA910_MUX_SEC2_JTAG 
PXA910_MUX_RESET 
PXA910_MUX_CLK_REQ 
PXA910_MUX_VCXO_REQ 
PXA910_MUX_VCXO_OUT 
PXA910_MUX_VCXO_REQ2 
PXA910_MUX_VCXO_OUT2 
PXA910_MUX_SPI 
PXA910_MUX_SPI2 
PXA910_MUX_GSSP 
PXA910_MUX_SSP0 
PXA910_MUX_SSP1 
PXA910_MUX_SSP2 
PXA910_MUX_DSSP2 
PXA910_MUX_DSSP3 
PXA910_MUX_UART0 
PXA910_MUX_UART1 
PXA910_MUX_UART2 
PXA910_MUX_TWSI 
PXA910_MUX_CCIC 
PXA910_MUX_PWM0 
PXA910_MUX_PWM1 
PXA910_MUX_PWM2 
PXA910_MUX_PWM3 
PXA910_MUX_HSL 
PXA910_MUX_ONE_WIRE 
PXA910_MUX_LCD 
PXA910_MUX_DAC_ST23 
PXA910_MUX_ULPI 
PXA910_MUX_TB 
PXA910_MUX_KP_MK 
PXA910_MUX_KP_DK 
PXA910_MUX_TCU_GPOA 
PXA910_MUX_TCU_GPOB 
PXA910_MUX_ROT 
PXA910_MUX_TDS 
PXA910_MUX_32K_CLK 
PXA910_MUX_MN_CLK 
PXA910_MUX_SMC 
PXA910_MUX_SM_ADDR18 
PXA910_MUX_SM_ADDR19 
PXA910_MUX_SM_ADDR20 
PXA910_MUX_NONE 

Definition at line 94 of file pinctrl-pxa910.c.

Enumerator:
ND_IO15 
ND_IO14 
ND_IO13 
ND_IO12 
ND_IO11 
ND_IO10 
ND_IO9 
ND_IO8 
ND_IO7 
ND_IO6 
ND_IO5 
ND_IO4 
ND_IO3 
ND_IO2 
ND_IO1 
ND_IO0 
ND_NCS0 
ND_NCS1 
SM_NCS0 
SM_NCS1 
ND_NWE 
ND_NRE 
ND_CLE 
ND_ALE 
SM_SCLK 
ND_RDY0 
SM_ADV 
ND_RDY1 
SM_ADVMUX 
SM_RDY 
MMC1_DAT7 
MMC1_DAT6 
MMC1_DAT5 
MMC1_DAT4 
MMC1_DAT3 
MMC1_DAT2 
MMC1_DAT1 
MMC1_DAT0 
MMC1_CMD 
MMC1_CLK 
MMC1_CD 
VCXO_OUT 

Definition at line 48 of file pinctrl-pxa910.c.

Function Documentation

core_initcall_sync ( pxa910_pinmux_init  )
MODULE_AUTHOR ( "Haojian Zhuang <[email protected]>"  )
MODULE_DESCRIPTION ( "PXA3xx pin control driver )
module_exit ( pxa910_pinmux_exit  )
MODULE_LICENSE ( "GPL v2 )

Variable Documentation

struct pxa3xx_mfp_pin pxa910_mfp[]

Definition at line 325 of file pinctrl-pxa910.c.