Linux Kernel  3.7.1
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pm-imx6q.c
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1 /*
2  * Copyright 2011 Freescale Semiconductor, Inc.
3  * Copyright 2011 Linaro Ltd.
4  *
5  * The code contained herein is licensed under the GNU General Public
6  * License. You may obtain a copy of the GNU General Public License
7  * Version 2 or later at the following locations:
8  *
9  * http://www.opensource.org/licenses/gpl-license.html
10  * http://www.gnu.org/copyleft/gpl.html
11  */
12 
13 #include <linux/init.h>
14 #include <linux/io.h>
15 #include <linux/of.h>
16 #include <linux/suspend.h>
17 #include <asm/cacheflush.h>
18 #include <asm/proc-fns.h>
19 #include <asm/suspend.h>
21 #include <mach/common.h>
22 #include <mach/hardware.h>
23 
24 extern unsigned long phys_l2x0_saved_regs;
25 
26 static int imx6q_suspend_finish(unsigned long val)
27 {
28  cpu_do_idle();
29  return 0;
30 }
31 
32 static int imx6q_pm_enter(suspend_state_t state)
33 {
34  switch (state) {
35  case PM_SUSPEND_MEM:
39  /* Zzz ... */
40  cpu_suspend(0, imx6q_suspend_finish);
43  break;
44  default:
45  return -EINVAL;
46  }
47 
48  return 0;
49 }
50 
51 static const struct platform_suspend_ops imx6q_pm_ops = {
52  .enter = imx6q_pm_enter,
53  .valid = suspend_valid_only_mem,
54 };
55 
57 {
58  /*
59  * The l2x0 core code provides an infrastucture to save and restore
60  * l2x0 registers across suspend/resume cycle. But because imx6q
61  * retains L2 content during suspend and needs to resume L2 before
62  * MMU is enabled, it can only utilize register saving support and
63  * have to take care of restoring on its own. So we save physical
64  * address of the data structure used by l2x0 core to save registers,
65  * and later restore the necessary ones in imx6q resume entry.
66  */
67 #ifdef CONFIG_CACHE_L2X0
69 #endif
70 
71  suspend_set_ops(&imx6q_pm_ops);
72 }