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portdrv_core.c
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1 /*
2  * File: portdrv_core.c
3  * Purpose: PCI Express Port Bus Driver's Core Functions
4  *
5  * Copyright (C) 2004 Intel
6  * Copyright (C) Tom Long Nguyen ([email protected])
7  */
8 
9 #include <linux/module.h>
10 #include <linux/pci.h>
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/pm.h>
14 #include <linux/string.h>
15 #include <linux/slab.h>
16 #include <linux/pcieport_if.h>
17 #include <linux/aer.h>
18 
19 #include "../pci.h"
20 #include "portdrv.h"
21 
23 
24 static int __init pciehp_setup(char *str)
25 {
26  if (!strncmp(str, "nomsi", 5))
27  pciehp_msi_disabled = true;
28 
29  return 1;
30 }
31 __setup("pcie_hp=", pciehp_setup);
32 
40 static void release_pcie_device(struct device *dev)
41 {
42  kfree(to_pcie_device(dev));
43 }
44 
53 static int pcie_port_msix_add_entry(
54  struct msix_entry *entries, int new_entry, int nr_entries)
55 {
56  int j;
57 
58  for (j = 0; j < nr_entries; j++)
59  if (entries[j].entry == new_entry)
60  return j;
61 
62  entries[j].entry = new_entry;
63  return j;
64 }
65 
74 static int pcie_port_enable_msix(struct pci_dev *dev, int *vectors, int mask)
75 {
76  struct msix_entry *msix_entries;
78  int nr_entries, status, pos, i, nvec;
79  u16 reg16;
80  u32 reg32;
81 
82  nr_entries = pci_msix_table_size(dev);
83  if (!nr_entries)
84  return -EINVAL;
85  if (nr_entries > PCIE_PORT_MAX_MSIX_ENTRIES)
86  nr_entries = PCIE_PORT_MAX_MSIX_ENTRIES;
87 
88  msix_entries = kzalloc(sizeof(*msix_entries) * nr_entries, GFP_KERNEL);
89  if (!msix_entries)
90  return -ENOMEM;
91 
92  /*
93  * Allocate as many entries as the port wants, so that we can check
94  * which of them will be useful. Moreover, if nr_entries is correctly
95  * equal to the number of entries this port actually uses, we'll happily
96  * go through without any tricks.
97  */
98  for (i = 0; i < nr_entries; i++)
99  msix_entries[i].entry = i;
100 
101  status = pci_enable_msix(dev, msix_entries, nr_entries);
102  if (status)
103  goto Exit;
104 
105  for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
106  idx[i] = -1;
107  status = -EIO;
108  nvec = 0;
109 
111  int entry;
112 
113  /*
114  * The code below follows the PCI Express Base Specification 2.0
115  * stating in Section 6.1.6 that "PME and Hot-Plug Event
116  * interrupts (when both are implemented) always share the same
117  * MSI or MSI-X vector, as indicated by the Interrupt Message
118  * Number field in the PCI Express Capabilities register", where
119  * according to Section 7.8.2 of the specification "For MSI-X,
120  * the value in this field indicates which MSI-X Table entry is
121  * used to generate the interrupt message."
122  */
123  pos = pci_pcie_cap(dev);
124  pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
125  entry = (reg16 & PCI_EXP_FLAGS_IRQ) >> 9;
126  if (entry >= nr_entries)
127  goto Error;
128 
129  i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
130  if (i == nvec)
131  nvec++;
132 
135  }
136 
137  if (mask & PCIE_PORT_SERVICE_AER) {
138  int entry;
139 
140  /*
141  * The code below follows Section 7.10.10 of the PCI Express
142  * Base Specification 2.0 stating that bits 31-27 of the Root
143  * Error Status Register contain a value indicating which of the
144  * MSI/MSI-X vectors assigned to the port is going to be used
145  * for AER, where "For MSI-X, the value in this register
146  * indicates which MSI-X Table entry is used to generate the
147  * interrupt message."
148  */
150  pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
151  entry = reg32 >> 27;
152  if (entry >= nr_entries)
153  goto Error;
154 
155  i = pcie_port_msix_add_entry(msix_entries, entry, nvec);
156  if (i == nvec)
157  nvec++;
158 
160  }
161 
162  /*
163  * If nvec is equal to the allocated number of entries, we can just use
164  * what we have. Otherwise, the port has some extra entries not for the
165  * services we know and we need to work around that.
166  */
167  if (nvec == nr_entries) {
168  status = 0;
169  } else {
170  /* Drop the temporary MSI-X setup */
171  pci_disable_msix(dev);
172 
173  /* Now allocate the MSI-X vectors for real */
174  status = pci_enable_msix(dev, msix_entries, nvec);
175  if (status)
176  goto Exit;
177  }
178 
179  for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
180  vectors[i] = idx[i] >= 0 ? msix_entries[idx[i]].vector : -1;
181 
182  Exit:
183  kfree(msix_entries);
184  return status;
185 
186  Error:
187  pci_disable_msix(dev);
188  goto Exit;
189 }
190 
199 static int init_service_irqs(struct pci_dev *dev, int *irqs, int mask)
200 {
201  int i, irq = -1;
202 
203  /*
204  * If MSI cannot be used for PCIe PME or hotplug, we have to use
205  * INTx or other interrupts, e.g. system shared interrupt.
206  */
207  if (((mask & PCIE_PORT_SERVICE_PME) && pcie_pme_no_msi()) ||
208  ((mask & PCIE_PORT_SERVICE_HP) && pciehp_no_msi())) {
209  if (dev->irq)
210  irq = dev->irq;
211  goto no_msi;
212  }
213 
214  /* Try to use MSI-X if supported */
215  if (!pcie_port_enable_msix(dev, irqs, mask))
216  return 0;
217 
218  /*
219  * We're not going to use MSI-X, so try MSI and fall back to INTx.
220  * If neither MSI/MSI-X nor INTx available, try other interrupt. On
221  * some platforms, root port doesn't support MSI/MSI-X/INTx in RC mode.
222  */
223  if (!pci_enable_msi(dev) || dev->irq)
224  irq = dev->irq;
225 
226  no_msi:
227  for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++)
228  irqs[i] = irq;
229  irqs[PCIE_PORT_SERVICE_VC_SHIFT] = -1;
230 
231  if (irq < 0)
232  return -ENODEV;
233  return 0;
234 }
235 
236 static void cleanup_service_irqs(struct pci_dev *dev)
237 {
238  if (dev->msix_enabled)
239  pci_disable_msix(dev);
240  else if (dev->msi_enabled)
241  pci_disable_msi(dev);
242 }
243 
254 static int get_port_device_capability(struct pci_dev *dev)
255 {
256  int services = 0;
257  u32 reg32;
258  int cap_mask = 0;
259  int err;
260 
262  return 0;
263 
264  err = pcie_port_platform_notify(dev, &cap_mask);
265  if (!pcie_ports_auto) {
266  cap_mask = PCIE_PORT_SERVICE_PME | PCIE_PORT_SERVICE_HP
268  if (pci_aer_available())
269  cap_mask |= PCIE_PORT_SERVICE_AER;
270  } else if (err) {
271  return 0;
272  }
273 
274  /* Hot-Plug Capable */
275  if ((cap_mask & PCIE_PORT_SERVICE_HP) &&
278  if (reg32 & PCI_EXP_SLTCAP_HPC) {
279  services |= PCIE_PORT_SERVICE_HP;
280  /*
281  * Disable hot-plug interrupts in case they have been
282  * enabled by the BIOS and the hot-plug service driver
283  * is not loaded.
284  */
285  pcie_capability_clear_word(dev, PCI_EXP_SLTCTL,
287  }
288  }
289  /* AER capable */
290  if ((cap_mask & PCIE_PORT_SERVICE_AER)
292  services |= PCIE_PORT_SERVICE_AER;
293  /*
294  * Disable AER on this port in case it's been enabled by the
295  * BIOS (the AER service driver will enable it when necessary).
296  */
298  }
299  /* VC support */
301  services |= PCIE_PORT_SERVICE_VC;
302  /* Root ports are capable of generating PME too */
303  if ((cap_mask & PCIE_PORT_SERVICE_PME)
304  && pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) {
305  services |= PCIE_PORT_SERVICE_PME;
306  /*
307  * Disable PME interrupt on this port in case it's been enabled
308  * by the BIOS (the PME service driver will enable it when
309  * necessary).
310  */
311  pcie_pme_interrupt_enable(dev, false);
312  }
313 
314  return services;
315 }
316 
323 static int pcie_device_init(struct pci_dev *pdev, int service, int irq)
324 {
325  int retval;
326  struct pcie_device *pcie;
327  struct device *device;
328 
329  pcie = kzalloc(sizeof(*pcie), GFP_KERNEL);
330  if (!pcie)
331  return -ENOMEM;
332  pcie->port = pdev;
333  pcie->irq = irq;
334  pcie->service = service;
335 
336  /* Initialize generic device interface */
337  device = &pcie->device;
338  device->bus = &pcie_port_bus_type;
339  device->release = release_pcie_device; /* callback to free pcie dev */
340  dev_set_name(device, "%s:pcie%02x",
341  pci_name(pdev),
342  get_descriptor_id(pci_pcie_type(pdev), service));
343  device->parent = &pdev->dev;
344  device_enable_async_suspend(device);
345 
346  retval = device_register(device);
347  if (retval)
348  kfree(pcie);
349  else
350  get_device(device);
351  return retval;
352 }
353 
362 {
363  int status, capabilities, i, nr_service;
365 
366  /* Enable PCI Express port device */
367  status = pci_enable_device(dev);
368  if (status)
369  return status;
370 
371  /* Get and check PCI Express port services */
372  capabilities = get_port_device_capability(dev);
373  if (!capabilities)
374  return 0;
375 
376  pci_set_master(dev);
377  /*
378  * Initialize service irqs. Don't use service devices that
379  * require interrupts if there is no way to generate them.
380  */
381  status = init_service_irqs(dev, irqs, capabilities);
382  if (status) {
383  capabilities &= PCIE_PORT_SERVICE_VC;
384  if (!capabilities)
385  goto error_disable;
386  }
387 
388  /* Allocate child services if any */
389  status = -ENODEV;
390  nr_service = 0;
391  for (i = 0; i < PCIE_PORT_DEVICE_MAXSERVICES; i++) {
392  int service = 1 << i;
393  if (!(capabilities & service))
394  continue;
395  if (!pcie_device_init(dev, service, irqs[i]))
396  nr_service++;
397  }
398  if (!nr_service)
399  goto error_cleanup_irqs;
400 
401  return 0;
402 
403 error_cleanup_irqs:
404  cleanup_service_irqs(dev);
405 error_disable:
406  pci_disable_device(dev);
407  return status;
408 }
409 
410 #ifdef CONFIG_PM
411 static int suspend_iter(struct device *dev, void *data)
412 {
413  struct pcie_port_service_driver *service_driver;
414 
415  if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
416  service_driver = to_service_driver(dev->driver);
417  if (service_driver->suspend)
418  service_driver->suspend(to_pcie_device(dev));
419  }
420  return 0;
421 }
422 
427 int pcie_port_device_suspend(struct device *dev)
428 {
429  return device_for_each_child(dev, NULL, suspend_iter);
430 }
431 
432 static int resume_iter(struct device *dev, void *data)
433 {
434  struct pcie_port_service_driver *service_driver;
435 
436  if ((dev->bus == &pcie_port_bus_type) &&
437  (dev->driver)) {
438  service_driver = to_service_driver(dev->driver);
439  if (service_driver->resume)
440  service_driver->resume(to_pcie_device(dev));
441  }
442  return 0;
443 }
444 
449 int pcie_port_device_resume(struct device *dev)
450 {
451  return device_for_each_child(dev, NULL, resume_iter);
452 }
453 #endif /* PM */
454 
455 static int remove_iter(struct device *dev, void *data)
456 {
457  if (dev->bus == &pcie_port_bus_type) {
458  put_device(dev);
459  device_unregister(dev);
460  }
461  return 0;
462 }
463 
472 {
473  device_for_each_child(&dev->dev, NULL, remove_iter);
474  cleanup_service_irqs(dev);
475  pci_disable_device(dev);
476 }
477 
486 static int pcie_port_probe_service(struct device *dev)
487 {
488  struct pcie_device *pciedev;
490  int status;
491 
492  if (!dev || !dev->driver)
493  return -ENODEV;
494 
495  driver = to_service_driver(dev->driver);
496  if (!driver || !driver->probe)
497  return -ENODEV;
498 
499  pciedev = to_pcie_device(dev);
500  status = driver->probe(pciedev);
501  if (!status) {
502  dev_printk(KERN_DEBUG, dev, "service driver %s loaded\n",
503  driver->name);
504  get_device(dev);
505  }
506  return status;
507 }
508 
518 static int pcie_port_remove_service(struct device *dev)
519 {
520  struct pcie_device *pciedev;
522 
523  if (!dev || !dev->driver)
524  return 0;
525 
526  pciedev = to_pcie_device(dev);
527  driver = to_service_driver(dev->driver);
528  if (driver && driver->remove) {
529  dev_printk(KERN_DEBUG, dev, "unloading service driver %s\n",
530  driver->name);
531  driver->remove(pciedev);
532  put_device(dev);
533  }
534  return 0;
535 }
536 
546 static void pcie_port_shutdown_service(struct device *dev) {}
547 
553 {
555  return -ENODEV;
556 
557  new->driver.name = (char *)new->name;
558  new->driver.bus = &pcie_port_bus_type;
559  new->driver.probe = pcie_port_probe_service;
560  new->driver.remove = pcie_port_remove_service;
561  new->driver.shutdown = pcie_port_shutdown_service;
562 
563  return driver_register(&new->driver);
564 }
566 
572 {
573  driver_unregister(&drv->driver);
574 }