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Data Structures | Macros | Functions
pxaficp_ir.c File Reference
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/gpio.h>
#include <linux/slab.h>
#include <net/irda/irda.h>
#include <net/irda/irmod.h>
#include <net/irda/wrapper.h>
#include <net/irda/irda_device.h>
#include <mach/dma.h>
#include <linux/platform_data/irda-pxaficp.h>
#include <mach/regs-ost.h>
#include <mach/regs-uart.h>

Go to the source code of this file.

Data Structures

struct  pxa_irda
 

Macros

#define FICP   __REG(0x40800000) /* Start of FICP area */
 
#define ICCR0   __REG(0x40800000) /* ICP Control Register 0 */
 
#define ICCR1   __REG(0x40800004) /* ICP Control Register 1 */
 
#define ICCR2   __REG(0x40800008) /* ICP Control Register 2 */
 
#define ICDR   __REG(0x4080000c) /* ICP Data Register */
 
#define ICSR0   __REG(0x40800014) /* ICP Status Register 0 */
 
#define ICSR1   __REG(0x40800018) /* ICP Status Register 1 */
 
#define ICCR0_AME   (1 << 7) /* Address match enable */
 
#define ICCR0_TIE   (1 << 6) /* Transmit FIFO interrupt enable */
 
#define ICCR0_RIE   (1 << 5) /* Receive FIFO interrupt enable */
 
#define ICCR0_RXE   (1 << 4) /* Receive enable */
 
#define ICCR0_TXE   (1 << 3) /* Transmit enable */
 
#define ICCR0_TUS   (1 << 2) /* Transmit FIFO underrun select */
 
#define ICCR0_LBM   (1 << 1) /* Loopback mode */
 
#define ICCR0_ITR   (1 << 0) /* IrDA transmission */
 
#define ICCR2_RXP   (1 << 3) /* Receive Pin Polarity select */
 
#define ICCR2_TXP   (1 << 2) /* Transmit Pin Polarity select */
 
#define ICCR2_TRIG   (3 << 0) /* Receive FIFO Trigger threshold */
 
#define ICCR2_TRIG_8   (0 << 0) /* >= 8 bytes */
 
#define ICCR2_TRIG_16   (1 << 0) /* >= 16 bytes */
 
#define ICCR2_TRIG_32   (2 << 0) /* >= 32 bytes */
 
#define ICSR0_FRE   (1 << 5) /* Framing error */
 
#define ICSR0_RFS   (1 << 4) /* Receive FIFO service request */
 
#define ICSR0_TFS   (1 << 3) /* Transnit FIFO service request */
 
#define ICSR0_RAB   (1 << 2) /* Receiver abort */
 
#define ICSR0_TUR   (1 << 1) /* Trunsmit FIFO underun */
 
#define ICSR0_EIF   (1 << 0) /* End/Error in FIFO */
 
#define ICSR1_ROR   (1 << 6) /* Receiver FIFO underrun */
 
#define ICSR1_CRE   (1 << 5) /* CRC error */
 
#define ICSR1_EOF   (1 << 4) /* End of frame */
 
#define ICSR1_TNF   (1 << 3) /* Transmit FIFO not full */
 
#define ICSR1_RNE   (1 << 2) /* Receive FIFO not empty */
 
#define ICSR1_TBY   (1 << 1) /* Tramsmiter busy flag */
 
#define ICSR1_RSY   (1 << 0) /* Recevier synchronized flag */
 
#define IrSR_RXPL_NEG_IS_ZERO   (1<<4)
 
#define IrSR_RXPL_POS_IS_ZERO   0x0
 
#define IrSR_TXPL_NEG_IS_ZERO   (1<<3)
 
#define IrSR_TXPL_POS_IS_ZERO   0x0
 
#define IrSR_XMODE_PULSE_1_6   (1<<2)
 
#define IrSR_XMODE_PULSE_3_16   0x0
 
#define IrSR_RCVEIR_IR_MODE   (1<<1)
 
#define IrSR_RCVEIR_UART_MODE   0x0
 
#define IrSR_XMITIR_IR_MODE   (1<<0)
 
#define IrSR_XMITIR_UART_MODE   0x0
 
#define IrSR_IR_RECEIVE_ON
 
#define IrSR_IR_TRANSMIT_ON
 
#define IS_FIR(si)   ((si)->speed >= 4000000)
 
#define IRDA_FRAME_SIZE_LIMIT   2047
 

Functions

 module_platform_driver (pxa_ir_driver)
 
 MODULE_LICENSE ("GPL")
 
 MODULE_ALIAS ("platform:pxa2xx-ir")
 

Macro Definition Documentation

#define FICP   __REG(0x40800000) /* Start of FICP area */

Definition at line 35 of file pxaficp_ir.c.

#define ICCR0   __REG(0x40800000) /* ICP Control Register 0 */

Definition at line 36 of file pxaficp_ir.c.

#define ICCR0_AME   (1 << 7) /* Address match enable */

Definition at line 43 of file pxaficp_ir.c.

#define ICCR0_ITR   (1 << 0) /* IrDA transmission */

Definition at line 50 of file pxaficp_ir.c.

#define ICCR0_LBM   (1 << 1) /* Loopback mode */

Definition at line 49 of file pxaficp_ir.c.

#define ICCR0_RIE   (1 << 5) /* Receive FIFO interrupt enable */

Definition at line 45 of file pxaficp_ir.c.

#define ICCR0_RXE   (1 << 4) /* Receive enable */

Definition at line 46 of file pxaficp_ir.c.

#define ICCR0_TIE   (1 << 6) /* Transmit FIFO interrupt enable */

Definition at line 44 of file pxaficp_ir.c.

#define ICCR0_TUS   (1 << 2) /* Transmit FIFO underrun select */

Definition at line 48 of file pxaficp_ir.c.

#define ICCR0_TXE   (1 << 3) /* Transmit enable */

Definition at line 47 of file pxaficp_ir.c.

#define ICCR1   __REG(0x40800004) /* ICP Control Register 1 */

Definition at line 37 of file pxaficp_ir.c.

#define ICCR2   __REG(0x40800008) /* ICP Control Register 2 */

Definition at line 38 of file pxaficp_ir.c.

#define ICCR2_RXP   (1 << 3) /* Receive Pin Polarity select */

Definition at line 52 of file pxaficp_ir.c.

#define ICCR2_TRIG   (3 << 0) /* Receive FIFO Trigger threshold */

Definition at line 54 of file pxaficp_ir.c.

#define ICCR2_TRIG_16   (1 << 0) /* >= 16 bytes */

Definition at line 56 of file pxaficp_ir.c.

#define ICCR2_TRIG_32   (2 << 0) /* >= 32 bytes */

Definition at line 57 of file pxaficp_ir.c.

#define ICCR2_TRIG_8   (0 << 0) /* >= 8 bytes */

Definition at line 55 of file pxaficp_ir.c.

#define ICCR2_TXP   (1 << 2) /* Transmit Pin Polarity select */

Definition at line 53 of file pxaficp_ir.c.

#define ICDR   __REG(0x4080000c) /* ICP Data Register */

Definition at line 39 of file pxaficp_ir.c.

#define ICSR0   __REG(0x40800014) /* ICP Status Register 0 */

Definition at line 40 of file pxaficp_ir.c.

#define ICSR0_EIF   (1 << 0) /* End/Error in FIFO */

Definition at line 67 of file pxaficp_ir.c.

#define ICSR0_FRE   (1 << 5) /* Framing error */

Definition at line 62 of file pxaficp_ir.c.

#define ICSR0_RAB   (1 << 2) /* Receiver abort */

Definition at line 65 of file pxaficp_ir.c.

#define ICSR0_RFS   (1 << 4) /* Receive FIFO service request */

Definition at line 63 of file pxaficp_ir.c.

#define ICSR0_TFS   (1 << 3) /* Transnit FIFO service request */

Definition at line 64 of file pxaficp_ir.c.

#define ICSR0_TUR   (1 << 1) /* Trunsmit FIFO underun */

Definition at line 66 of file pxaficp_ir.c.

#define ICSR1   __REG(0x40800018) /* ICP Status Register 1 */

Definition at line 41 of file pxaficp_ir.c.

#define ICSR1_CRE   (1 << 5) /* CRC error */

Definition at line 70 of file pxaficp_ir.c.

#define ICSR1_EOF   (1 << 4) /* End of frame */

Definition at line 71 of file pxaficp_ir.c.

#define ICSR1_RNE   (1 << 2) /* Receive FIFO not empty */

Definition at line 73 of file pxaficp_ir.c.

#define ICSR1_ROR   (1 << 6) /* Receiver FIFO underrun */

Definition at line 69 of file pxaficp_ir.c.

#define ICSR1_RSY   (1 << 0) /* Recevier synchronized flag */

Definition at line 75 of file pxaficp_ir.c.

#define ICSR1_TBY   (1 << 1) /* Tramsmiter busy flag */

Definition at line 74 of file pxaficp_ir.c.

#define ICSR1_TNF   (1 << 3) /* Transmit FIFO not full */

Definition at line 72 of file pxaficp_ir.c.

#define IRDA_FRAME_SIZE_LIMIT   2047

Definition at line 152 of file pxaficp_ir.c.

#define IrSR_IR_RECEIVE_ON
Value:
(\
IrSR_RXPL_NEG_IS_ZERO | \
IrSR_TXPL_POS_IS_ZERO | \
IrSR_XMODE_PULSE_3_16 | \
IrSR_RCVEIR_IR_MODE | \
IrSR_XMITIR_UART_MODE)

Definition at line 88 of file pxaficp_ir.c.

#define IrSR_IR_TRANSMIT_ON
Value:
(\
IrSR_RXPL_NEG_IS_ZERO | \
IrSR_TXPL_POS_IS_ZERO | \
IrSR_XMODE_PULSE_3_16 | \
IrSR_RCVEIR_UART_MODE | \
IrSR_XMITIR_IR_MODE)

Definition at line 95 of file pxaficp_ir.c.

#define IrSR_RCVEIR_IR_MODE   (1<<1)

Definition at line 83 of file pxaficp_ir.c.

#define IrSR_RCVEIR_UART_MODE   0x0

Definition at line 84 of file pxaficp_ir.c.

#define IrSR_RXPL_NEG_IS_ZERO   (1<<4)

Definition at line 77 of file pxaficp_ir.c.

#define IrSR_RXPL_POS_IS_ZERO   0x0

Definition at line 78 of file pxaficp_ir.c.

#define IrSR_TXPL_NEG_IS_ZERO   (1<<3)

Definition at line 79 of file pxaficp_ir.c.

#define IrSR_TXPL_POS_IS_ZERO   0x0

Definition at line 80 of file pxaficp_ir.c.

#define IrSR_XMITIR_IR_MODE   (1<<0)

Definition at line 85 of file pxaficp_ir.c.

#define IrSR_XMITIR_UART_MODE   0x0

Definition at line 86 of file pxaficp_ir.c.

#define IrSR_XMODE_PULSE_1_6   (1<<2)

Definition at line 81 of file pxaficp_ir.c.

#define IrSR_XMODE_PULSE_3_16   0x0

Definition at line 82 of file pxaficp_ir.c.

#define IS_FIR (   si)    ((si)->speed >= 4000000)

Definition at line 151 of file pxaficp_ir.c.

Function Documentation

MODULE_ALIAS ( "platform:pxa2xx-ir )
MODULE_LICENSE ( "GPL"  )
module_platform_driver ( pxa_ir_driver  )