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Linux Kernel
3.7.1
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All Data Structures Namespaces Files Functions Variables Typedefs Enumerations Enumerator Macros Groups Pages
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Linux Kernel
3.7.1
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#include <linux/kernel.h>#include <linux/init.h>#include <linux/types.h>#include <linux/module.h>#include <linux/list.h>#include <linux/pci.h>#include <linux/dma-mapping.h>#include <linux/sched.h>#include <linux/slab.h>#include <linux/dmapool.h>#include <linux/mempool.h>#include <linux/spinlock.h>#include <linux/workqueue.h>#include <linux/delay.h>#include <linux/interrupt.h>#include <linux/mutex.h>#include <linux/aer.h>#include <linux/bsg-lib.h>#include <net/tcp.h>#include <scsi/scsi.h>#include <scsi/scsi_host.h>#include <scsi/scsi_device.h>#include <scsi/scsi_cmnd.h>#include <scsi/scsi_transport.h>#include <scsi/scsi_transport_iscsi.h>#include <scsi/scsi_bsg_iscsi.h>#include <scsi/scsi_netlink.h>#include <scsi/libiscsi.h>#include "ql4_dbg.h"#include "ql4_nx.h"#include "ql4_fw.h"#include "ql4_nvram.h"#include "ql4_83xx.h"Go to the source code of this file.
Data Structures | |
| struct | srb |
| struct | mrb |
| struct | aen |
| struct | ql4_aen_log |
| struct | ddb_entry |
| struct | qla_ddb_index |
| struct | ql4_tuple_ddb |
| struct | qla4_work_evt |
| struct | ql82xx_hw_data |
| struct | qla4_8xxx_legacy_intr_set |
| struct | ql4_msix_entry |
| struct | isp_operations |
| struct | ql4_mdump_size_table |
| struct | ipaddress_config |
| struct | ql4_chap_format |
| struct | ip_address_format |
| struct | ql4_conn_info |
| struct | ql4_boot_session_info |
| struct | ql4_boot_tgt_info |
| struct | scsi_qla_host |
| struct | ql4_task_data |
| struct | qla_endpoint |
| struct | qla_conn |
Macros | |
| #define | PCI_DEVICE_ID_QLOGIC_ISP4010 0x4010 |
| #define | PCI_DEVICE_ID_QLOGIC_ISP4022 0x4022 |
| #define | PCI_DEVICE_ID_QLOGIC_ISP4032 0x4032 |
| #define | PCI_DEVICE_ID_QLOGIC_ISP8022 0x8022 |
| #define | PCI_DEVICE_ID_QLOGIC_ISP8324 0x8032 |
| #define | ISP4XXX_PCI_FN_1 0x1 |
| #define | ISP4XXX_PCI_FN_2 0x3 |
| #define | QLA_SUCCESS 0 |
| #define | QLA_ERROR 1 |
| #define | BIT_0 0x1 |
| #define | BIT_1 0x2 |
| #define | BIT_2 0x4 |
| #define | BIT_3 0x8 |
| #define | BIT_4 0x10 |
| #define | BIT_5 0x20 |
| #define | BIT_6 0x40 |
| #define | BIT_7 0x80 |
| #define | BIT_8 0x100 |
| #define | BIT_9 0x200 |
| #define | BIT_10 0x400 |
| #define | BIT_11 0x800 |
| #define | BIT_12 0x1000 |
| #define | BIT_13 0x2000 |
| #define | BIT_14 0x4000 |
| #define | BIT_15 0x8000 |
| #define | BIT_16 0x10000 |
| #define | BIT_17 0x20000 |
| #define | BIT_18 0x40000 |
| #define | BIT_19 0x80000 |
| #define | BIT_20 0x100000 |
| #define | BIT_21 0x200000 |
| #define | BIT_22 0x400000 |
| #define | BIT_23 0x800000 |
| #define | BIT_24 0x1000000 |
| #define | BIT_25 0x2000000 |
| #define | BIT_26 0x4000000 |
| #define | BIT_27 0x8000000 |
| #define | BIT_28 0x10000000 |
| #define | BIT_29 0x20000000 |
| #define | BIT_30 0x40000000 |
| #define | BIT_31 0x80000000 |
| #define | ql4_printk(level, ha, format, arg...) dev_printk(level , &((ha)->pdev->dev) , format , ## arg) |
| #define | MAX_HBAS 16 |
| #define | MAX_BUSES 1 |
| #define | MAX_TARGETS MAX_DEV_DB_ENTRIES |
| #define | MAX_LUNS 0xffff |
| #define | MAX_AEN_ENTRIES MAX_DEV_DB_ENTRIES |
| #define | MAX_DDB_ENTRIES MAX_DEV_DB_ENTRIES |
| #define | MAX_PDU_ENTRIES 32 |
| #define | INVALID_ENTRY 0xFFFF |
| #define | MAX_CMDS_TO_RISC 1024 |
| #define | MAX_SRBS MAX_CMDS_TO_RISC |
| #define | MBOX_AEN_REG_COUNT 8 |
| #define | MAX_INIT_RETRIES 5 |
| #define | REQUEST_QUEUE_DEPTH MAX_CMDS_TO_RISC |
| #define | RESPONSE_QUEUE_DEPTH 64 |
| #define | QUEUE_SIZE 64 |
| #define | DMA_BUFFER_SIZE 512 |
| #define | MAC_ADDR_LEN 6 /* in bytes */ |
| #define | IP_ADDR_LEN 4 /* in bytes */ |
| #define | IPv6_ADDR_LEN 16 /* IPv6 address size */ |
| #define | DRIVER_NAME "qla4xxx" |
| #define | MAX_LINKED_CMDS_PER_LUN 3 |
| #define | MAX_REQS_SERVICED_PER_INTR 1 |
| #define | ISCSI_IPADDR_SIZE 4 /* IP address size */ |
| #define | ISCSI_ALIAS_SIZE 32 /* ISCSI Alias name size */ |
| #define | ISCSI_NAME_SIZE 0xE0 /* ISCSI Name size */ |
| #define | QL4_SESS_RECOVERY_TMO 120 /* iSCSI session */ |
| #define | LSDW(x) ((u32)((u64)(x))) |
| #define | MSDW(x) ((u32)((((u64)(x)) >> 16) >> 16)) |
| #define | MBOX_TOV 60 |
| #define | SOFT_RESET_TOV 30 |
| #define | RESET_INTR_TOV 3 |
| #define | SEMAPHORE_TOV 10 |
| #define | ADAPTER_INIT_TOV 30 |
| #define | ADAPTER_RESET_TOV 180 |
| #define | EXTEND_CMD_TOV 60 |
| #define | WAIT_CMD_TOV 30 |
| #define | EH_WAIT_CMD_TOV 120 |
| #define | FIRMWARE_UP_TOV 60 |
| #define | RESET_FIRMWARE_TOV 30 |
| #define | LOGOUT_TOV 10 |
| #define | IOCB_TOV_MARGIN 10 |
| #define | RELOGIN_TOV 18 |
| #define | ISNS_DEREG_TOV 5 |
| #define | HBA_ONLINE_TOV 30 |
| #define | DISABLE_ACB_TOV 30 |
| #define | IP_CONFIG_TOV 30 |
| #define | LOGIN_TOV 12 |
| #define | MAX_RESET_HA_RETRIES 2 |
| #define | FW_ALIVE_WAIT_TOV 3 |
| #define | CMD_SP(Cmnd) ((Cmnd)->SCp.ptr) |
| #define | SRB_DMA_VALID BIT_3 /* DMA Buffer mapped. */ |
| #define | SRB_GOT_SENSE BIT_4 /* sense data received. */ |
| #define | SRB_NO_QUEUE_STATE 0 /* Request is in between states */ |
| #define | SRB_FREE_STATE 1 |
| #define | SRB_ACTIVE_STATE 3 |
| #define | SRB_ACTIVE_TIMEOUT_STATE 4 |
| #define | SRB_SUSPENDED_STATE 7 /* Request in suspended state */ |
| #define | SRB_ERR_PORT 1 /* Request failed because "port down" */ |
| #define | SRB_ERR_LOOP 2 /* Request failed because "loop down" */ |
| #define | SRB_ERR_DEVICE 3 /* Request failed because "device error" */ |
| #define | SRB_ERR_OTHER 4 |
| #define | FLASH_DDB 0x01 |
| #define | DDB_IPADDR_LEN 64 |
| #define | DDB_OPT_IPV6 0x0e0e |
| #define | DDB_OPT_IPV4 0x0f0f |
| #define | DDB_STATE_DEAD |
| #define | DDB_STATE_ONLINE |
| #define | DDB_STATE_MISSING |
| #define | DF_RELOGIN 0 /* Relogin to device */ |
| #define | DF_ISNS_DISCOVERED 2 /* Device was discovered via iSNS */ |
| #define | DF_FO_MASKED 3 |
| #define | QLA_MSIX_DEFAULT 0x00 |
| #define | QLA_MSIX_RSP_Q 0x01 |
| #define | QLA_MSIX_ENTRIES 2 |
| #define | QLA_MIDX_DEFAULT 0 |
| #define | QLA_MIDX_RSP_Q 1 |
| #define | QL4_CHAP_MAX_NAME_LEN 256 |
| #define | QL4_CHAP_MAX_SECRET_LEN 100 |
| #define | LOCAL_CHAP 0 |
| #define | BIDI_CHAP 1 |
| #define | AF_ONLINE 0 /* 0x00000001 */ |
| #define | AF_INIT_DONE 1 /* 0x00000002 */ |
| #define | AF_MBOX_COMMAND 2 /* 0x00000004 */ |
| #define | AF_MBOX_COMMAND_DONE 3 /* 0x00000008 */ |
| #define | AF_INTERRUPTS_ON 6 /* 0x00000040 */ |
| #define | AF_GET_CRASH_RECORD 7 /* 0x00000080 */ |
| #define | AF_LINK_UP 8 /* 0x00000100 */ |
| #define | AF_IRQ_ATTACHED 10 /* 0x00000400 */ |
| #define | AF_DISABLE_ACB_COMPLETE 11 /* 0x00000800 */ |
| #define | AF_HA_REMOVAL 12 /* 0x00001000 */ |
| #define | AF_INTx_ENABLED 15 /* 0x00008000 */ |
| #define | AF_MSI_ENABLED 16 /* 0x00010000 */ |
| #define | AF_MSIX_ENABLED 17 /* 0x00020000 */ |
| #define | AF_MBOX_COMMAND_NOPOLL 18 /* 0x00040000 */ |
| #define | AF_FW_RECOVERY 19 /* 0x00080000 */ |
| #define | AF_EEH_BUSY 20 /* 0x00100000 */ |
| #define | AF_PCI_CHANNEL_IO_PERM_FAILURE 21 /* 0x00200000 */ |
| #define | AF_BUILD_DDB_LIST 22 /* 0x00400000 */ |
| #define | AF_82XX_FW_DUMPED 24 /* 0x01000000 */ |
| #define | AF_8XXX_RST_OWNER 25 /* 0x02000000 */ |
| #define | AF_82XX_DUMP_READING 26 /* 0x04000000 */ |
| #define | AF_83XX_NO_FW_DUMP 27 /* 0x08000000 */ |
| #define | DPC_RESET_HA 1 /* 0x00000002 */ |
| #define | DPC_RETRY_RESET_HA 2 /* 0x00000004 */ |
| #define | DPC_RELOGIN_DEVICE 3 /* 0x00000008 */ |
| #define | DPC_RESET_HA_FW_CONTEXT 4 /* 0x00000010 */ |
| #define | DPC_RESET_HA_INTR 5 /* 0x00000020 */ |
| #define | DPC_ISNS_RESTART 7 /* 0x00000080 */ |
| #define | DPC_AEN 9 /* 0x00000200 */ |
| #define | DPC_GET_DHCP_IP_ADDR 15 /* 0x00008000 */ |
| #define | DPC_LINK_CHANGED 18 /* 0x00040000 */ |
| #define | DPC_RESET_ACTIVE 20 /* 0x00040000 */ |
| #define | DPC_HA_UNRECOVERABLE 21 /* 0x00080000 ISP-82xx only*/ |
| #define | DPC_HA_NEED_QUIESCENT 22 /* 0x00100000 ISP-82xx only*/ |
| #define | DPC_POST_IDC_ACK 23 /* 0x00200000 */ |
| #define | SRB_MIN_REQ 128 |
| #define | MIN_IOBASE_LEN 0x100 |
| #define | MEM_ALIGN_VALUE |
| #define | QLFLASH_WAITING 0 |
| #define | QLFLASH_READING 1 |
| #define | QLFLASH_WRITING 2 |
| #define | CHAP_DMA_BLOCK_SIZE 512 |
| #define | SYSFS_FLAG_FW_SEL_BOOT 2 |
| #define | DDB_DMA_BLOCK_SIZE 512 |
| #define | MAX_MRB 128 |
| #define | INIT_ADAPTER 0 |
| #define | RESET_ADAPTER 1 |
| #define | PRESERVE_DDB_LIST 0 |
| #define | REBUILD_DDB_LIST 1 |
| #define | PROCESS_ALL_AENS 0 |
| #define | FLUSH_DDB_CHANGED_AENS 1 |
| #define | QL4_UEVENT_CODE_FW_DUMP 0 |
Enumerations | |
| enum | qla4_work_type { QLA4_EVENT_AEN, QLA4_EVENT_PING_STATUS } |
Functions | |
| int | ql4xxx_sem_spinlock (struct scsi_qla_host *ha, u32 sem_mask, u32 sem_bits) |
| void | ql4xxx_sem_unlock (struct scsi_qla_host *ha, u32 sem_mask) |
| int | ql4xxx_sem_lock (struct scsi_qla_host *ha, u32 sem_mask, u32 sem_bits) |
| #define AF_PCI_CHANNEL_IO_PERM_FAILURE 21 /* 0x00200000 */ |
| #define DDB_STATE_DEAD |
| #define DDB_STATE_MISSING |
| #define DDB_STATE_ONLINE |
| #define DF_ISNS_DISCOVERED 2 /* Device was discovered via iSNS */ |
| #define DPC_HA_NEED_QUIESCENT 22 /* 0x00100000 ISP-82xx only*/ |
| #define DPC_HA_UNRECOVERABLE 21 /* 0x00080000 ISP-82xx only*/ |
| #define MAX_AEN_ENTRIES MAX_DEV_DB_ENTRIES |
| #define MAX_DDB_ENTRIES MAX_DEV_DB_ENTRIES |
| #define MAX_SRBS MAX_CMDS_TO_RISC |
| #define MAX_TARGETS MAX_DEV_DB_ENTRIES |
| #define MEM_ALIGN_VALUE |
| #define REQUEST_QUEUE_DEPTH MAX_CMDS_TO_RISC |
| enum qla4_work_type |
| int ql4xxx_sem_lock | ( | struct scsi_qla_host * | ha, |
| u32 | sem_mask, | ||
| u32 | sem_bits | ||
| ) |
Definition at line 240 of file ql4_nvram.c.
| int ql4xxx_sem_spinlock | ( | struct scsi_qla_host * | ha, |
| u32 | sem_mask, | ||
| u32 | sem_bits | ||
| ) |
Definition at line 203 of file ql4_nvram.c.
| void ql4xxx_sem_unlock | ( | struct scsi_qla_host * | ha, |
| u32 | sem_mask | ||
| ) |
Definition at line 227 of file ql4_nvram.c.
1.8.2