Data Structures
struct	port_database_24xx

struct	vp_database_24xx

struct	nvram_24xx

struct	init_cb_24xx

struct	cmd_bidir

struct	cmd_type_6

struct	cmd_type_7

struct	cmd_type_crc_2

struct	sts_entry_24xx

struct	mrk_entry_24xx

struct	ct_entry_24xx

struct	els_entry_24xx

struct	els_sts_entry_24xx

struct	mbx_entry_24xx

struct	logio_entry_24xx

struct	tsk_mgmt_entry

struct	abort_entry_24xx

struct	device_reg_24xx

struct	mid_conf_entry_24xx

struct	mid_init_cb_24xx

struct	mid_db_entry_24xx

struct	vp_ctrl_entry_24xx

struct	vp_config_entry_24xx

struct	vp_rpt_id_entry_24xx

struct	vf_evfp_entry_24xx

struct	qla_fdt_layout

struct	qla_flt_location

struct	qla_flt_header

struct	qla_flt_region

struct	qla_npiv_header

struct	qla_npiv_entry

struct	verify_chip_entry_84xx

struct	verify_chip_rsp_84xx

struct	access_chip_84xx

struct	access_chip_rsp_84xx

struct	nvram_81xx

struct	init_cb_81xx

struct	mid_init_cb_81xx

struct	ex_init_cb_81xx

struct	qla_fcp_prio_entry

struct	qla_fcp_prio_cfg

Macros
#define	MBS_CHECKSUM_ERROR 0x4010

#define	MBS_INVALID_PRODUCT_KEY 0x4020

#define	FO1_ENABLE_PUREX BIT_10

#define	FO1_DISABLE_LED_CTRL BIT_6

#define	FO1_ENABLE_8016 BIT_0

#define	FO2_ENABLE_SEL_CLASS2 BIT_5

#define	FO3_NO_ABTS_ON_LINKDOWN BIT_14

#define	FO3_HOLD_STS_IOCB BIT_12

#define	PDO_FORCE_ADISC BIT_1

#define	PDO_FORCE_PLOGI BIT_0

#define	PORT_DATABASE_24XX_SIZE 64

#define	PDF_TASK_RETRY_ID BIT_14

#define	PDF_FC_TAPE BIT_7

#define	PDF_ACK0_CAPABLE BIT_6

#define	PDF_FCP2_CONF BIT_5

#define	PDF_CLASS_2 BIT_4

#define	PDF_HARD_ADDR BIT_1

#define	PDS_PLOGI_PENDING 0x03

#define	PDS_PLOGI_COMPLETE 0x04

#define	PDS_PRLI_PENDING 0x05

#define	PDS_PRLI_COMPLETE 0x06

#define	PDS_PORT_UNAVAILABLE 0x07

#define	PDS_PRLO_PENDING 0x09

#define	PDS_LOGO_PENDING 0x11

#define	PDS_PRLI2_PENDING 0x12

#define	ICB_VERSION 1

#define	COMMAND_BIDIRECTIONAL 0x75

#define	BD_WRAP_BACK BIT_3

#define	BD_READ_DATA BIT_1

#define	BD_WRITE_DATA BIT_0

#define	COMMAND_TYPE_6 0x48 /* Command Type 6 entry */

#define	CF_DIF_SEG_DESCR_ENABLE BIT_3

#define	CF_DATA_SEG_DESCR_ENABLE BIT_2

#define	CF_READ_DATA BIT_1

#define	CF_WRITE_DATA BIT_0

#define	COMMAND_TYPE_7 0x18 /* Command Type 7 entry */

#define	FW_MAX_TIMEOUT 0x1999

#define	TMF_CLEAR_ACA BIT_14

#define	TMF_TARGET_RESET BIT_13

#define	TMF_LUN_RESET BIT_12

#define	TMF_CLEAR_TASK_SET BIT_10

#define	TMF_ABORT_TASK_SET BIT_9

#define	TMF_DSD_LIST_ENABLE BIT_2

#define	TMF_READ_DATA BIT_1

#define	TMF_WRITE_DATA BIT_0

#define	TSK_SIMPLE 0

#define	TSK_HEAD_OF_QUEUE 1

#define	TSK_ORDERED 2

#define	TSK_ACA 4

#define	TSK_UNTAGGED 5

#define	COMMAND_TYPE_CRC_2

#define	STATUS_TYPE 0x03 /* Status entry. */

#define	SF_TRANSFERRED_DATA BIT_11

#define	SF_FCP_RSP_DMA BIT_0

#define	SS_CONFIRMATION_REQ BIT_12

#define	CS_DATA_REASSEMBLY_ERROR 0x11 /* Data Reassembly Error.. */

#define	CS_ABTS_BY_TARGET 0x13 /* Target send ABTS to abort IOCB. */

#define	CS_FW_RESOURCE 0x2C /* Firmware Resource Unavailable. */

#define	CS_TASK_MGMT_OVERRUN 0x30 /* Task management overrun (8+). */

#define	CS_ABORT_BY_TARGET 0x47 /* Abort By Target. */

#define	MARKER_TYPE 0x04 /* Marker entry. */

#define	MK_SYNC_ID_LUN 0 /* Synchronize ID/LUN */

#define	MK_SYNC_ID 1 /* Synchronize ID */

#define	MK_SYNC_ALL 2 /* Synchronize all ID/LUN */

#define	CT_IOCB_TYPE 0x29 /* CT Pass-Through IOCB entry */

#define	ELS_IOCB_TYPE 0x53 /* ELS Pass-Through IOCB entry */

#define	EST_SOFI3 (1 << 4)

#define	EST_SOFI2 (3 << 4)

#define	ECF_PAYLOAD_DESCR_MASK (BIT_15\|BIT_14\|BIT_13)

#define	EPD_ELS_COMMAND (0 << 13)

#define	EPD_ELS_ACC (1 << 13)

#define	EPD_ELS_RJT (2 << 13)

#define	EPD_RX_XCHG (3 << 13)

#define	ECF_CLR_PASSTHRU_PEND BIT_12

#define	ECF_INCL_FRAME_HDR BIT_11

#define	MBX_IOCB_TYPE 0x39

#define	LOGINOUT_PORT_IOCB_TYPE 0x52 /* Login/Logout Port entry. */

#define	CS_LOGIO_ERROR 0x31 /* Login/Logout IOCB error. */

#define	LCF_INCLUDE_SNS BIT_10 /* Include SNS (FFFFFC) during LOGO. */

#define	LCF_FCP2_OVERRIDE BIT_9 /* Set/Reset word 3 of PRLI. */

#define	LCF_CLASS_2 BIT_8 /* Enable class 2 during PLOGI. */

#define	LCF_FREE_NPORT BIT_7 /* Release NPORT handle after LOGO. */

#define	LCF_EXPL_LOGO BIT_6 /* Perform an explicit LOGO. */

#define	LCF_SKIP_PRLI BIT_5 /* Skip PRLI after PLOGI. */

#define	LCF_IMPL_LOGO_ALL BIT_5 /* Implicit LOGO to all ports. */

#define	LCF_COND_PLOGI BIT_4 /* PLOGI only if not logged-in. */

#define	LCF_IMPL_LOGO BIT_4 /* Perform an implicit LOGO. */

#define	LCF_IMPL_PRLO BIT_4 /* Perform an implicit PRLO. */

#define	LCF_COMMAND_PLOGI 0x00 /* PLOGI. */

#define	LCF_COMMAND_PRLI 0x01 /* PRLI. */

#define	LCF_COMMAND_PDISC 0x02 /* PDISC. */

#define	LCF_COMMAND_ADISC 0x03 /* ADISC. */

#define	LCF_COMMAND_LOGO 0x08 /* LOGO. */

#define	LCF_COMMAND_PRLO 0x09 /* PRLO. */

#define	LCF_COMMAND_TPRLO 0x0A /* TPRLO. */

#define	LSC_SCODE_NOLINK 0x01

#define	LSC_SCODE_NOIOCB 0x02

#define	LSC_SCODE_NOXCB 0x03

#define	LSC_SCODE_CMD_FAILED 0x04

#define	LSC_SCODE_NOFABRIC 0x05

#define	LSC_SCODE_FW_NOT_READY 0x07

#define	LSC_SCODE_NOT_LOGGED_IN 0x09

#define	LSC_SCODE_NOPCB 0x0A

#define	LSC_SCODE_ELS_REJECT 0x18

#define	LSC_SCODE_CMD_PARAM_ERR 0x19

#define	LSC_SCODE_PORTID_USED 0x1A

#define	LSC_SCODE_NPORT_USED 0x1B

#define	LSC_SCODE_NONPORT 0x1C

#define	LSC_SCODE_LOGGED_IN 0x1D

#define	LSC_SCODE_NOFLOGI_ACC 0x1F

#define	TSK_MGMT_IOCB_TYPE 0x14

#define	TCF_NOTMCMD_TO_TARGET BIT_31

#define	TCF_LUN_RESET BIT_4

#define	TCF_ABORT_TASK_SET BIT_3

#define	TCF_CLEAR_TASK_SET BIT_2

#define	TCF_TARGET_RESET BIT_1

#define	TCF_CLEAR_ACA BIT_0

#define	ABORT_IOCB_TYPE 0x33

#define	AOF_NO_ABTS BIT_0 /* Do not send any ABTS. */

#define	FARX_DATA_FLAG BIT_31

#define	FARX_ACCESS_FLASH_CONF 0x7FFD0000

#define	FARX_ACCESS_FLASH_DATA 0x7FF00000

#define	FARX_ACCESS_NVRAM_CONF 0x7FFF0000

#define	FARX_ACCESS_NVRAM_DATA 0x7FFE0000

#define	FA_NVRAM_FUNC0_ADDR 0x80

#define	FA_NVRAM_FUNC1_ADDR 0x180

#define	FA_NVRAM_VPD_SIZE 0x200

#define	FA_NVRAM_VPD0_ADDR 0x00

#define	FA_NVRAM_VPD1_ADDR 0x100

#define	FA_BOOT_CODE_ADDR 0x00000

#define	FA_RISC_CODE_ADDR 0x20000

#define	FA_RISC_CODE_SEGMENTS 2

#define	FA_FLASH_DESCR_ADDR_24 0x11000

#define	FA_FLASH_LAYOUT_ADDR_24 0x11400

#define	FA_NPIV_CONF0_ADDR_24 0x16000

#define	FA_NPIV_CONF1_ADDR_24 0x17000

#define	FA_FW_AREA_ADDR 0x40000

#define	FA_VPD_NVRAM_ADDR 0x48000

#define	FA_FEATURE_ADDR 0x4C000

#define	FA_FLASH_DESCR_ADDR 0x50000

#define	FA_FLASH_LAYOUT_ADDR 0x50400

#define	FA_HW_EVENT0_ADDR 0x54000

#define	FA_HW_EVENT1_ADDR 0x54400

#define	FA_HW_EVENT_SIZE 0x200

#define	FA_HW_EVENT_ENTRY_SIZE 4

#define	FA_NPIV_CONF0_ADDR 0x5C000

#define	FA_NPIV_CONF1_ADDR 0x5D000

#define	FA_FCP_PRIO0_ADDR 0x10000

#define	FA_FCP_PRIO1_ADDR 0x12000

#define	HW_EVENT_RESET_ERR 0xF00B

#define	HW_EVENT_ISP_ERR 0xF020

#define	HW_EVENT_PARITY_ERR 0xF022

#define	HW_EVENT_NVRAM_CHKSUM_ERR 0xF023

#define	HW_EVENT_FLASH_FW_ERR 0xF024

#define	CSRX_FLASH_ACCESS_ERROR BIT_18 /* Flash/NVRAM Access Error. */

#define	CSRX_DMA_ACTIVE BIT_17 /* DMA Active status. */

#define	CSRX_DMA_SHUTDOWN BIT_16 /* DMA Shutdown control status. */

#define	CSRX_FUNCTION BIT_15 /* Function number. */

#define	CSRX_PCIX_BUS_MODE_MASK (BIT_11\|BIT_10\|BIT_9\|BIT_8)

#define	PBM_PCI_33MHZ (0 << 8)

#define	PBM_PCIX_M1_66MHZ (1 << 8)

#define	PBM_PCIX_M1_100MHZ (2 << 8)

#define	PBM_PCIX_M1_133MHZ (3 << 8)

#define	PBM_PCIX_M2_66MHZ (5 << 8)

#define	PBM_PCIX_M2_100MHZ (6 << 8)

#define	PBM_PCIX_M2_133MHZ (7 << 8)

#define	PBM_PCI_66MHZ (8 << 8)

#define	CSRX_MAX_WRT_BURST_MASK (BIT_5\|BIT_4)

#define	MWB_512_BYTES (0 << 4)

#define	MWB_1024_BYTES (1 << 4)

#define	MWB_2048_BYTES (2 << 4)

#define	MWB_4096_BYTES (3 << 4)

#define	CSRX_64BIT_SLOT BIT_2 /* PCI 64-Bit Bus Slot. */

#define	CSRX_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable. */

#define	CSRX_ISP_SOFT_RESET BIT_0 /* ISP soft reset. */

#define	ICRX_EN_RISC_INT BIT_3 /* Enable RISC interrupts on PCI. */

#define	ISRX_RISC_INT BIT_3 /* RISC interrupt. */

#define	HSRX_RISC_INT BIT_15 /* RISC to Host interrupt. */

#define	HSRX_RISC_PAUSED BIT_8 /* RISC Paused. */

#define	HCCRX_HOST_INT BIT_6 /* Host to RISC interrupt bit. */

#define	HCCRX_RISC_RESET BIT_5 /* RISC Reset mode bit. */

#define	HCCRX_NOOP 0x00000000

#define	HCCRX_SET_RISC_RESET 0x10000000

#define	HCCRX_CLR_RISC_RESET 0x20000000

#define	HCCRX_SET_RISC_PAUSE 0x30000000

#define	HCCRX_REL_RISC_PAUSE 0x40000000

#define	HCCRX_SET_HOST_INT 0x50000000

#define	HCCRX_CLR_HOST_INT 0x60000000

#define	HCCRX_CLR_RISC_INT 0xA0000000

#define	GPDX_LED_UPDATE_MASK (BIT_20\|BIT_19\|BIT_18)

#define	GPDX_DATA_UPDATE_MASK (BIT_17\|BIT_16)

#define	GPDX_DATA_UPDATE_2_MASK (BIT_28\|BIT_27\|BIT_26\|BIT_17\|BIT_16)

#define	GPDX_LED_COLOR_MASK (BIT_4\|BIT_3\|BIT_2)

#define	GPDX_LED_YELLOW_ON BIT_2

#define	GPDX_LED_GREEN_ON BIT_3

#define	GPDX_LED_AMBER_ON BIT_4

#define	GPDX_DATA_INOUT (BIT_1\|BIT_0)

#define	GPEX_ENABLE_UPDATE_MASK (BIT_17\|BIT_16)

#define	GPEX_ENABLE_UPDATE_2_MASK (BIT_28\|BIT_27\|BIT_26\|BIT_17\|BIT_16)

#define	GPEX_ENABLE (BIT_1\|BIT_0)

#define	TC_AEN_DISABLE 0

#define	TC_EFT_ENABLE 4

#define	TC_EFT_DISABLE 5

#define	TC_FCE_ENABLE 8

#define	TC_FCE_OPTIONS 0

#define	TC_FCE_DEFAULT_RX_SIZE 2112

#define	TC_FCE_DEFAULT_TX_SIZE 2112

#define	TC_FCE_DISABLE 9

#define	TC_FCE_DISABLE_TRACE BIT_0

#define	MIN_MULTI_ID_FABRIC 64 /* Must be power-of-2. */

#define	MAX_MULTI_ID_FABRIC 256 /* ... */

#define	for_each_mapped_vp_idx(_ha, _idx)

#define	MDBS_NON_PARTIC BIT_3

#define	MDBS_ID_ACQUIRED BIT_1

#define	MDBS_ENABLED BIT_0

#define	VP_CTRL_IOCB_TYPE 0x30 /* Virtual Port Control entry. */

#define	CS_VCE_IOCB_ERROR 0x01 /* Error processing IOCB */

#define	CS_VCE_ACQ_ID_ERROR 0x02 /* Error while acquireing ID. */

#define	CS_VCE_BUSY 0x05 /* Firmware not ready to accept cmd. */

#define	VCE_COMMAND_ENABLE_VPS 0x00 /* Enable VPs. */

#define	VCE_COMMAND_DISABLE_VPS 0x08 /* Disable VPs. */

#define	VCE_COMMAND_DISABLE_VPS_REINIT 0x09 /* Disable VPs and reinit link. */

#define	VCE_COMMAND_DISABLE_VPS_LOGO 0x0a /* Disable VPs and LOGO ports. */

#define	VCE_COMMAND_DISABLE_VPS_LOGO_ALL 0x0b /* Disable VPs and LOGO ports. */

#define	VP_CONFIG_IOCB_TYPE 0x31 /* Virtual Port Config entry. */

#define	CS_VF_BIND_VPORTS_TO_VF BIT_0

#define	CS_VF_SET_QOS_OF_VPORTS BIT_1

#define	CS_VF_SET_HOPS_OF_VPORTS BIT_2

#define	CS_VCT_STS_ERROR 0x01 /* Specified VPs were not disabled. */

#define	CS_VCT_CNT_ERROR 0x02 /* Invalid VP count. */

#define	CS_VCT_ERROR 0x03 /* Unknown error. */

#define	CS_VCT_IDX_ERROR 0x02 /* Invalid VP index. */

#define	CS_VCT_BUSY 0x05 /* Firmware not ready to accept cmd. */

#define	VCT_COMMAND_MOD_VPS 0x00 /* Modify VP configurations. */

#define	VCT_COMMAND_MOD_ENABLE_VPS 0x01 /* Modify configuration & enable VPs. */

#define	VP_RPT_ID_IOCB_TYPE 0x32 /* Report ID Acquisition entry. */

#define	VF_EVFP_IOCB_TYPE 0x26 /* Exchange Virtual Fabric Parameters entry. */

#define	FLT_REG_FW 0x01

#define	FLT_REG_BOOT_CODE 0x07

#define	FLT_REG_VPD_0 0x14

#define	FLT_REG_NVRAM_0 0x15

#define	FLT_REG_VPD_1 0x16

#define	FLT_REG_NVRAM_1 0x17

#define	FLT_REG_FDT 0x1a

#define	FLT_REG_FLT 0x1c

#define	FLT_REG_HW_EVENT_0 0x1d

#define	FLT_REG_HW_EVENT_1 0x1f

#define	FLT_REG_NPIV_CONF_0 0x29

#define	FLT_REG_NPIV_CONF_1 0x2a

#define	FLT_REG_GOLD_FW 0x2f

#define	FLT_REG_FCP_PRIO_0 0x87

#define	FLT_REG_FCP_PRIO_1 0x88

#define	FLT_REG_FCOE_FW 0xA4

#define	FLT_REG_FCOE_VPD_0 0xA9

#define	FLT_REG_FCOE_NVRAM_0 0xAA

#define	FLT_REG_FCOE_VPD_1 0xAB

#define	FLT_REG_FCOE_NVRAM_1 0xAC

#define	MBA_ISP84XX_ALERT 0x800f /* Alert Notification. */

#define	A84_PANIC_RECOVERY 0x1

#define	A84_OP_LOGIN_COMPLETE 0x2

#define	A84_DIAG_LOGIN_COMPLETE 0x3

#define	A84_GOLD_LOGIN_COMPLETE 0x4

#define	MBC_ISP84XX_RESET 0x3a /* Reset. */

#define	FSTATE_REMOTE_FC_DOWN BIT_0

#define	FSTATE_NSL_LINK_DOWN BIT_1

#define	FSTATE_IS_DIAG_FW BIT_2

#define	FSTATE_LOGGED_IN BIT_3

#define	FSTATE_WAITING_FOR_VERIFY BIT_4

#define	VERIFY_CHIP_IOCB_TYPE 0x1B

#define	VCO_DONT_UPDATE_FW BIT_0

#define	VCO_FORCE_UPDATE BIT_1

#define	VCO_DONT_RESET_UPDATE BIT_2

#define	VCO_DIAG_FW BIT_3

#define	VCO_END_OF_DATA BIT_14

#define	VCO_ENABLE_DSD BIT_15

#define	CS_VCS_CHIP_FAILURE 0x3

#define	CS_VCS_BAD_EXCHANGE 0x8

#define	CS_VCS_SEQ_COMPLETEi 0x40

#define	VFC_CHECKSUM_ERROR 0x1

#define	VFC_INVALID_LEN 0x2

#define	VFC_ALREADY_IN_PROGRESS 0x8

#define	ACCESS_CHIP_IOCB_TYPE 0x2B

#define	ACO_DUMP_MEMORY 0x0

#define	ACO_LOAD_MEMORY 0x1

#define	ACO_CHANGE_CONFIG_PARAM 0x2

#define	ACO_REQUEST_INFO 0x3

#define	MBA_DCBX_START 0x8016

#define	MBA_DCBX_COMPLETE 0x8030

#define	MBA_FCF_CONF_ERR 0x8031

#define	MBA_DCBX_PARAM_UPDATE 0x8032

#define	MBA_IDC_COMPLETE 0x8100

#define	MBA_IDC_NOTIFY 0x8101

#define	MBA_IDC_TIME_EXT 0x8102

#define	MBC_IDC_ACK 0x101

#define	MBC_RESTART_MPI_FW 0x3d

#define	MBC_FLASH_ACCESS_CTRL 0x3e /* Control flash access. */

#define	MBC_GET_XGMAC_STATS 0x7a

#define	MBC_GET_DCBX_PARAMS 0x51

#define	MBC_WRITE_REMOTE_REG 0x0001 /* Write remote register */

#define	MBC_READ_REMOTE_REG 0x0009 /* Read remote register */

#define	MBC_RESTART_NIC_FIRMWARE 0x003d /* Restart NIC firmware */

#define	MBC_SET_ACCESS_CONTROL 0x003e /* Access control command */

#define	FAC_OPT_FORCE_SEMAPHORE BIT_15

#define	FAC_OPT_REQUESTOR_ID BIT_14

#define	FAC_OPT_CMD_SUBCODE 0xff

#define	FAC_OPT_CMD_WRITE_PROTECT 0x00

#define	FAC_OPT_CMD_WRITE_ENABLE 0x01

#define	FAC_OPT_CMD_ERASE_SECTOR 0x02

#define	FAC_OPT_CMD_LOCK_SEMAPHORE 0x03

#define	FAC_OPT_CMD_UNLOCK_SEMAPHORE 0x04

#define	FAC_OPT_CMD_GET_SECTOR_SIZE 0x05

#define	ICB_VERSION 1

#define	FARX_ACCESS_FLASH_CONF_81XX 0x7FFD0000

#define	FARX_ACCESS_FLASH_DATA_81XX 0x7F800000

#define	QLFC_FCP_PRIO_DISABLE 0x0

#define	QLFC_FCP_PRIO_ENABLE 0x1

#define	QLFC_FCP_PRIO_GET_CONFIG 0x2

#define	QLFC_FCP_PRIO_SET_CONFIG 0x3

#define	FCP_PRIO_ENTRY_VALID 0x1

#define	FCP_PRIO_ENTRY_TAG_VALID 0x2

#define	FCP_PRIO_ENTRY_SPID_VALID 0x4

#define	FCP_PRIO_ENTRY_DPID_VALID 0x8

#define	FCP_PRIO_ENTRY_LUNB_VALID 0x10

#define	FCP_PRIO_ENTRY_LUNE_VALID 0x20

#define	FCP_PRIO_ENTRY_SWWN_VALID 0x40

#define	FCP_PRIO_ENTRY_DWWN_VALID 0x80

#define	FCP_PRIO_ATTR_DISABLE 0x0

#define	FCP_PRIO_ATTR_ENABLE 0x1

#define	FCP_PRIO_ATTR_PERSIST 0x2

#define	FCP_PRIO_CFG_HDR_SIZE 0x10

#define	FCP_PRIO_CFG_ENTRY_SIZE 0x20

#define	FCP_PRIO_CFG_SIZE (321024) / fcp prio data per port*/

#define	FA_FCP_PRIO0_ADDR_25 0x3C000

#define	FA_FCP_PRIO1_ADDR_25 0x3E000

#define	FA_BOOT_CODE_ADDR_81 0x80000

#define	FA_RISC_CODE_ADDR_81 0xA0000

#define	FA_FW_AREA_ADDR_81 0xC0000

#define	FA_VPD_NVRAM_ADDR_81 0xD0000

#define	FA_VPD0_ADDR_81 0xD0000

#define	FA_VPD1_ADDR_81 0xD0400

#define	FA_NVRAM0_ADDR_81 0xD0080

#define	FA_NVRAM1_ADDR_81 0xD0180

#define	FA_FEATURE_ADDR_81 0xD4000

#define	FA_FLASH_DESCR_ADDR_81 0xD8000

#define	FA_FLASH_LAYOUT_ADDR_81 0xD8400

#define	FA_HW_EVENT0_ADDR_81 0xDC000

#define	FA_HW_EVENT1_ADDR_81 0xDC400

#define	FA_NPIV_CONF0_ADDR_81 0xD1000

#define	FA_NPIV_CONF1_ADDR_81 0xD2000

#define	FA_FLASH_LAYOUT_ADDR_83 0xFC400

Macro Definition Documentation

#define A84_DIAG_LOGIN_COMPLETE 0x3

Definition at line 1405 of file qla_fw.h.

#define A84_GOLD_LOGIN_COMPLETE 0x4

Definition at line 1406 of file qla_fw.h.

#define A84_OP_LOGIN_COMPLETE 0x2

Definition at line 1404 of file qla_fw.h.

#define A84_PANIC_RECOVERY 0x1

Definition at line 1403 of file qla_fw.h.

#define ABORT_IOCB_TYPE 0x33

Definition at line 861 of file qla_fw.h.

#define ACCESS_CHIP_IOCB_TYPE 0x2B

Definition at line 1476 of file qla_fw.h.

#define ACO_CHANGE_CONFIG_PARAM 0x2

Definition at line 1488 of file qla_fw.h.

#define ACO_DUMP_MEMORY 0x0

Definition at line 1486 of file qla_fw.h.

#define ACO_LOAD_MEMORY 0x1

Definition at line 1487 of file qla_fw.h.

#define ACO_REQUEST_INFO 0x3

Definition at line 1489 of file qla_fw.h.

#define AOF_NO_ABTS BIT_0 /* Do not send any ABTS. */

Definition at line 874 of file qla_fw.h.

#define BD_READ_DATA BIT_1

Definition at line 404 of file qla_fw.h.

#define BD_WRAP_BACK BIT_3

Definition at line 403 of file qla_fw.h.

#define BD_WRITE_DATA BIT_0

Definition at line 405 of file qla_fw.h.

#define CF_DATA_SEG_DESCR_ENABLE BIT_2

Definition at line 442 of file qla_fw.h.

#define CF_DIF_SEG_DESCR_ENABLE BIT_3

Definition at line 441 of file qla_fw.h.

#define CF_READ_DATA BIT_1

Definition at line 443 of file qla_fw.h.

#define CF_WRITE_DATA BIT_0

Definition at line 444 of file qla_fw.h.

#define COMMAND_BIDIRECTIONAL 0x75

Definition at line 384 of file qla_fw.h.

#define COMMAND_TYPE_6 0x48 /* Command Type 6 entry */

Definition at line 422 of file qla_fw.h.

#define COMMAND_TYPE_7 0x18 /* Command Type 7 entry */

Definition at line 460 of file qla_fw.h.

#define COMMAND_TYPE_CRC_2

Value:

0x6A /* Command Type CRC_2 (Type 6)

* (T10-DIF) */

Definition at line 507 of file qla_fw.h.

#define CS_ABORT_BY_TARGET 0x47 /* Abort By Target. */

Definition at line 596 of file qla_fw.h.

#define CS_ABTS_BY_TARGET 0x13 /* Target send ABTS to abort IOCB. */

Definition at line 593 of file qla_fw.h.

#define CS_DATA_REASSEMBLY_ERROR 0x11 /* Data Reassembly Error.. */

Definition at line 592 of file qla_fw.h.

#define CS_FW_RESOURCE 0x2C /* Firmware Resource Unavailable. */

Definition at line 594 of file qla_fw.h.

#define CS_LOGIO_ERROR 0x31 /* Login/Logout IOCB error. */

Definition at line 775 of file qla_fw.h.

#define CS_TASK_MGMT_OVERRUN 0x30 /* Task management overrun (8+). */

Definition at line 595 of file qla_fw.h.

#define CS_VCE_ACQ_ID_ERROR 0x02 /* Error while acquireing ID. */

Definition at line 1183 of file qla_fw.h.

#define CS_VCE_BUSY 0x05 /* Firmware not ready to accept cmd. */

Definition at line 1184 of file qla_fw.h.

#define CS_VCE_IOCB_ERROR 0x01 /* Error processing IOCB */

Definition at line 1182 of file qla_fw.h.

#define CS_VCS_BAD_EXCHANGE 0x8

Definition at line 1460 of file qla_fw.h.

#define CS_VCS_CHIP_FAILURE 0x3

Definition at line 1459 of file qla_fw.h.

#define CS_VCS_SEQ_COMPLETEi 0x40

Definition at line 1461 of file qla_fw.h.

#define CS_VCT_BUSY 0x05 /* Firmware not ready to accept cmd. */

Definition at line 1225 of file qla_fw.h.

#define CS_VCT_CNT_ERROR 0x02 /* Invalid VP count. */

Definition at line 1222 of file qla_fw.h.

#define CS_VCT_ERROR 0x03 /* Unknown error. */

Definition at line 1223 of file qla_fw.h.

#define CS_VCT_IDX_ERROR 0x02 /* Invalid VP index. */

Definition at line 1224 of file qla_fw.h.

#define CS_VCT_STS_ERROR 0x01 /* Specified VPs were not disabled. */

Definition at line 1221 of file qla_fw.h.

#define CS_VF_BIND_VPORTS_TO_VF BIT_0

Definition at line 1216 of file qla_fw.h.

#define CS_VF_SET_HOPS_OF_VPORTS BIT_2

Definition at line 1218 of file qla_fw.h.

#define CS_VF_SET_QOS_OF_VPORTS BIT_1

Definition at line 1217 of file qla_fw.h.

#define CSRX_64BIT_SLOT BIT_2 /* PCI 64-Bit Bus Slot. */

Definition at line 966 of file qla_fw.h.

#define CSRX_DMA_ACTIVE BIT_17 /* DMA Active status. */

Definition at line 946 of file qla_fw.h.

#define CSRX_DMA_SHUTDOWN BIT_16 /* DMA Shutdown control status. */

Definition at line 947 of file qla_fw.h.

#define CSRX_FLASH_ACCESS_ERROR BIT_18 /* Flash/NVRAM Access Error. */

Definition at line 945 of file qla_fw.h.

#define CSRX_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable. */

Definition at line 967 of file qla_fw.h.

#define CSRX_FUNCTION BIT_15 /* Function number. */

Definition at line 948 of file qla_fw.h.

#define CSRX_ISP_SOFT_RESET BIT_0 /* ISP soft reset. */

Definition at line 968 of file qla_fw.h.

#define CSRX_MAX_WRT_BURST_MASK (BIT_5|BIT_4)

Definition at line 960 of file qla_fw.h.

#define CSRX_PCIX_BUS_MODE_MASK (BIT_11|BIT_10|BIT_9|BIT_8)

Definition at line 950 of file qla_fw.h.

#define CT_IOCB_TYPE 0x29 /* CT Pass-Through IOCB entry */

Definition at line 630 of file qla_fw.h.

#define ECF_CLR_PASSTHRU_PEND BIT_12

Definition at line 704 of file qla_fw.h.

#define ECF_INCL_FRAME_HDR BIT_11

Definition at line 705 of file qla_fw.h.

#define ECF_PAYLOAD_DESCR_MASK (BIT_15|BIT_14|BIT_13)

Definition at line 699 of file qla_fw.h.

#define ELS_IOCB_TYPE 0x53 /* ELS Pass-Through IOCB entry */

Definition at line 667 of file qla_fw.h.

#define EPD_ELS_ACC (1 << 13)

Definition at line 701 of file qla_fw.h.

#define EPD_ELS_COMMAND (0 << 13)

Definition at line 700 of file qla_fw.h.

#define EPD_ELS_RJT (2 << 13)

Definition at line 702 of file qla_fw.h.

#define EPD_RX_XCHG (3 << 13)

Definition at line 703 of file qla_fw.h.

#define EST_SOFI2 (3 << 4)

Definition at line 685 of file qla_fw.h.

#define EST_SOFI3 (1 << 4)

Definition at line 684 of file qla_fw.h.

#define FA_BOOT_CODE_ADDR 0x00000

Definition at line 905 of file qla_fw.h.

#define FA_BOOT_CODE_ADDR_81 0x80000

Definition at line 1912 of file qla_fw.h.

#define FA_FCP_PRIO0_ADDR 0x10000

Definition at line 930 of file qla_fw.h.

#define FA_FCP_PRIO0_ADDR_25 0x3C000

Definition at line 1908 of file qla_fw.h.

#define FA_FCP_PRIO1_ADDR 0x12000

Definition at line 931 of file qla_fw.h.

#define FA_FCP_PRIO1_ADDR_25 0x3E000

Definition at line 1909 of file qla_fw.h.

#define FA_FEATURE_ADDR 0x4C000

Definition at line 921 of file qla_fw.h.

#define FA_FEATURE_ADDR_81 0xD4000

Definition at line 1920 of file qla_fw.h.

#define FA_FLASH_DESCR_ADDR 0x50000

Definition at line 922 of file qla_fw.h.

#define FA_FLASH_DESCR_ADDR_24 0x11000

Definition at line 914 of file qla_fw.h.

#define FA_FLASH_DESCR_ADDR_81 0xD8000

Definition at line 1921 of file qla_fw.h.

#define FA_FLASH_LAYOUT_ADDR 0x50400

Definition at line 923 of file qla_fw.h.

#define FA_FLASH_LAYOUT_ADDR_24 0x11400

Definition at line 915 of file qla_fw.h.

#define FA_FLASH_LAYOUT_ADDR_81 0xD8400

Definition at line 1922 of file qla_fw.h.

#define FA_FLASH_LAYOUT_ADDR_83 0xFC400

Definition at line 1929 of file qla_fw.h.

#define FA_FW_AREA_ADDR 0x40000

Definition at line 919 of file qla_fw.h.

#define FA_FW_AREA_ADDR_81 0xC0000

Definition at line 1914 of file qla_fw.h.

#define FA_HW_EVENT0_ADDR 0x54000

Definition at line 924 of file qla_fw.h.

#define FA_HW_EVENT0_ADDR_81 0xDC000

Definition at line 1923 of file qla_fw.h.

#define FA_HW_EVENT1_ADDR 0x54400

Definition at line 925 of file qla_fw.h.

#define FA_HW_EVENT1_ADDR_81 0xDC400

Definition at line 1924 of file qla_fw.h.

#define FA_HW_EVENT_ENTRY_SIZE 4

Definition at line 927 of file qla_fw.h.

#define FA_HW_EVENT_SIZE 0x200

Definition at line 926 of file qla_fw.h.

#define FA_NPIV_CONF0_ADDR 0x5C000

Definition at line 928 of file qla_fw.h.

#define FA_NPIV_CONF0_ADDR_24 0x16000

Definition at line 916 of file qla_fw.h.

#define FA_NPIV_CONF0_ADDR_81 0xD1000

Definition at line 1925 of file qla_fw.h.

#define FA_NPIV_CONF1_ADDR 0x5D000

Definition at line 929 of file qla_fw.h.

#define FA_NPIV_CONF1_ADDR_24 0x17000

Definition at line 917 of file qla_fw.h.

#define FA_NPIV_CONF1_ADDR_81 0xD2000

Definition at line 1926 of file qla_fw.h.

#define FA_NVRAM0_ADDR_81 0xD0080

Definition at line 1918 of file qla_fw.h.

#define FA_NVRAM1_ADDR_81 0xD0180

Definition at line 1919 of file qla_fw.h.

#define FA_NVRAM_FUNC0_ADDR 0x80

Definition at line 898 of file qla_fw.h.

#define FA_NVRAM_FUNC1_ADDR 0x180

Definition at line 899 of file qla_fw.h.

#define FA_NVRAM_VPD0_ADDR 0x00

Definition at line 902 of file qla_fw.h.

#define FA_NVRAM_VPD1_ADDR 0x100

Definition at line 903 of file qla_fw.h.

#define FA_NVRAM_VPD_SIZE 0x200

Definition at line 901 of file qla_fw.h.

#define FA_RISC_CODE_ADDR 0x20000

Definition at line 911 of file qla_fw.h.

#define FA_RISC_CODE_ADDR_81 0xA0000

Definition at line 1913 of file qla_fw.h.

#define FA_RISC_CODE_SEGMENTS 2

Definition at line 912 of file qla_fw.h.

#define FA_VPD0_ADDR_81 0xD0000

Definition at line 1916 of file qla_fw.h.

#define FA_VPD1_ADDR_81 0xD0400

Definition at line 1917 of file qla_fw.h.

#define FA_VPD_NVRAM_ADDR 0x48000

Definition at line 920 of file qla_fw.h.

#define FA_VPD_NVRAM_ADDR_81 0xD0000

Definition at line 1915 of file qla_fw.h.

#define FAC_OPT_CMD_ERASE_SECTOR 0x02

Definition at line 1555 of file qla_fw.h.

#define FAC_OPT_CMD_GET_SECTOR_SIZE 0x05

Definition at line 1558 of file qla_fw.h.

#define FAC_OPT_CMD_LOCK_SEMAPHORE 0x03

Definition at line 1556 of file qla_fw.h.

#define FAC_OPT_CMD_SUBCODE 0xff

Definition at line 1550 of file qla_fw.h.

#define FAC_OPT_CMD_UNLOCK_SEMAPHORE 0x04

Definition at line 1557 of file qla_fw.h.

#define FAC_OPT_CMD_WRITE_ENABLE 0x01

Definition at line 1554 of file qla_fw.h.

#define FAC_OPT_CMD_WRITE_PROTECT 0x00

Definition at line 1553 of file qla_fw.h.

#define FAC_OPT_FORCE_SEMAPHORE BIT_15

Definition at line 1548 of file qla_fw.h.

#define FAC_OPT_REQUESTOR_ID BIT_14

Definition at line 1549 of file qla_fw.h.

#define FARX_ACCESS_FLASH_CONF 0x7FFD0000

Definition at line 893 of file qla_fw.h.

#define FARX_ACCESS_FLASH_CONF_81XX 0x7FFD0000

Definition at line 1853 of file qla_fw.h.

#define FARX_ACCESS_FLASH_DATA 0x7FF00000

Definition at line 894 of file qla_fw.h.

#define FARX_ACCESS_FLASH_DATA_81XX 0x7F800000

Definition at line 1854 of file qla_fw.h.

#define FARX_ACCESS_NVRAM_CONF 0x7FFF0000

Definition at line 895 of file qla_fw.h.

#define FARX_ACCESS_NVRAM_DATA 0x7FFE0000

Definition at line 896 of file qla_fw.h.

#define FARX_DATA_FLAG BIT_31

Definition at line 892 of file qla_fw.h.

#define FCP_PRIO_ATTR_DISABLE 0x0

Definition at line 1896 of file qla_fw.h.

#define FCP_PRIO_ATTR_ENABLE 0x1

Definition at line 1897 of file qla_fw.h.

#define FCP_PRIO_ATTR_PERSIST 0x2

Definition at line 1898 of file qla_fw.h.

#define FCP_PRIO_CFG_ENTRY_SIZE 0x20

Definition at line 1902 of file qla_fw.h.

#define FCP_PRIO_CFG_HDR_SIZE 0x10

Definition at line 1900 of file qla_fw.h.

#define FCP_PRIO_CFG_SIZE (32*1024) /* fcp prio data per port*/

Definition at line 1905 of file qla_fw.h.

#define FCP_PRIO_ENTRY_DPID_VALID 0x8

Definition at line 1869 of file qla_fw.h.

#define FCP_PRIO_ENTRY_DWWN_VALID 0x80

Definition at line 1873 of file qla_fw.h.

#define FCP_PRIO_ENTRY_LUNB_VALID 0x10

Definition at line 1870 of file qla_fw.h.

#define FCP_PRIO_ENTRY_LUNE_VALID 0x20

Definition at line 1871 of file qla_fw.h.

#define FCP_PRIO_ENTRY_SPID_VALID 0x4

Definition at line 1868 of file qla_fw.h.

#define FCP_PRIO_ENTRY_SWWN_VALID 0x40

Definition at line 1872 of file qla_fw.h.

#define FCP_PRIO_ENTRY_TAG_VALID 0x2

Definition at line 1867 of file qla_fw.h.

#define FCP_PRIO_ENTRY_VALID 0x1

Definition at line 1866 of file qla_fw.h.

#define FLT_REG_BOOT_CODE 0x07

Definition at line 1353 of file qla_fw.h.

#define FLT_REG_FCOE_FW 0xA4

Definition at line 1367 of file qla_fw.h.

#define FLT_REG_FCOE_NVRAM_0 0xAA

Definition at line 1369 of file qla_fw.h.

#define FLT_REG_FCOE_NVRAM_1 0xAC

Definition at line 1371 of file qla_fw.h.

#define FLT_REG_FCOE_VPD_0 0xA9

Definition at line 1368 of file qla_fw.h.

#define FLT_REG_FCOE_VPD_1 0xAB

Definition at line 1370 of file qla_fw.h.

#define FLT_REG_FCP_PRIO_0 0x87

Definition at line 1365 of file qla_fw.h.

#define FLT_REG_FCP_PRIO_1 0x88

Definition at line 1366 of file qla_fw.h.

#define FLT_REG_FDT 0x1a

Definition at line 1358 of file qla_fw.h.

#define FLT_REG_FLT 0x1c

Definition at line 1359 of file qla_fw.h.

#define FLT_REG_FW 0x01

Definition at line 1352 of file qla_fw.h.

#define FLT_REG_GOLD_FW 0x2f

Definition at line 1364 of file qla_fw.h.

#define FLT_REG_HW_EVENT_0 0x1d

Definition at line 1360 of file qla_fw.h.

#define FLT_REG_HW_EVENT_1 0x1f

Definition at line 1361 of file qla_fw.h.

#define FLT_REG_NPIV_CONF_0 0x29

Definition at line 1362 of file qla_fw.h.

#define FLT_REG_NPIV_CONF_1 0x2a

Definition at line 1363 of file qla_fw.h.

#define FLT_REG_NVRAM_0 0x15

Definition at line 1355 of file qla_fw.h.

#define FLT_REG_NVRAM_1 0x17

Definition at line 1357 of file qla_fw.h.

#define FLT_REG_VPD_0 0x14

Definition at line 1354 of file qla_fw.h.

#define FLT_REG_VPD_1 0x16

Definition at line 1356 of file qla_fw.h.

#define FO1_DISABLE_LED_CTRL BIT_6

Definition at line 17 of file qla_fw.h.

#define FO1_ENABLE_8016 BIT_0

Definition at line 18 of file qla_fw.h.

#define FO1_ENABLE_PUREX BIT_10

Definition at line 16 of file qla_fw.h.

#define FO2_ENABLE_SEL_CLASS2 BIT_5

Definition at line 19 of file qla_fw.h.

#define FO3_HOLD_STS_IOCB BIT_12

Definition at line 21 of file qla_fw.h.

#define FO3_NO_ABTS_ON_LINKDOWN BIT_14

Definition at line 20 of file qla_fw.h.

#define for_each_mapped_vp_idx	(	_ha,
		_idx
	)

Value:

for (_idx = find_next_bit((_ha)->vp_idx_map,    \
        (_ha)->max_npiv_vports + 1, 1);     \
        _idx <= (_ha)->max_npiv_vports;     \
        _idx = find_next_bit((_ha)->vp_idx_map, \
        (_ha)->max_npiv_vports + 1, _idx + 1))  \

Definition at line 1114 of file qla_fw.h.

#define FSTATE_IS_DIAG_FW BIT_2

Definition at line 1412 of file qla_fw.h.

#define FSTATE_LOGGED_IN BIT_3

Definition at line 1413 of file qla_fw.h.

#define FSTATE_NSL_LINK_DOWN BIT_1

Definition at line 1411 of file qla_fw.h.

#define FSTATE_REMOTE_FC_DOWN BIT_0

Definition at line 1410 of file qla_fw.h.

#define FSTATE_WAITING_FOR_VERIFY BIT_4

Definition at line 1414 of file qla_fw.h.

#define FW_MAX_TIMEOUT 0x1999

Definition at line 471 of file qla_fw.h.

#define GPDX_DATA_INOUT (BIT_1|BIT_0)

Definition at line 1037 of file qla_fw.h.

#define GPDX_DATA_UPDATE_2_MASK (BIT_28|BIT_27|BIT_26|BIT_17|BIT_16)

Definition at line 1027 of file qla_fw.h.

#define GPDX_DATA_UPDATE_MASK (BIT_17|BIT_16)

Definition at line 1025 of file qla_fw.h.

#define GPDX_LED_AMBER_ON BIT_4

Definition at line 1035 of file qla_fw.h.

#define GPDX_LED_COLOR_MASK (BIT_4|BIT_3|BIT_2)

Definition at line 1029 of file qla_fw.h.

#define GPDX_LED_GREEN_ON BIT_3

Definition at line 1034 of file qla_fw.h.

#define GPDX_LED_UPDATE_MASK (BIT_20|BIT_19|BIT_18)

Definition at line 1023 of file qla_fw.h.

#define GPDX_LED_YELLOW_ON BIT_2

Definition at line 1033 of file qla_fw.h.

#define GPEX_ENABLE (BIT_1|BIT_0)

Definition at line 1045 of file qla_fw.h.

#define GPEX_ENABLE_UPDATE_2_MASK (BIT_28|BIT_27|BIT_26|BIT_17|BIT_16)

Definition at line 1043 of file qla_fw.h.

#define GPEX_ENABLE_UPDATE_MASK (BIT_17|BIT_16)

Definition at line 1041 of file qla_fw.h.

#define HCCRX_CLR_HOST_INT 0x60000000

Definition at line 1016 of file qla_fw.h.

#define HCCRX_CLR_RISC_INT 0xA0000000

Definition at line 1018 of file qla_fw.h.

#define HCCRX_CLR_RISC_RESET 0x20000000

Definition at line 1008 of file qla_fw.h.

#define HCCRX_HOST_INT BIT_6 /* Host to RISC interrupt bit. */

Definition at line 1000 of file qla_fw.h.

#define HCCRX_NOOP 0x00000000

Definition at line 1004 of file qla_fw.h.

#define HCCRX_REL_RISC_PAUSE 0x40000000

Definition at line 1012 of file qla_fw.h.

#define HCCRX_RISC_RESET BIT_5 /* RISC Reset mode bit. */

Definition at line 1001 of file qla_fw.h.

#define HCCRX_SET_HOST_INT 0x50000000

Definition at line 1014 of file qla_fw.h.

#define HCCRX_SET_RISC_PAUSE 0x30000000

Definition at line 1010 of file qla_fw.h.

#define HCCRX_SET_RISC_RESET 0x10000000

Definition at line 1006 of file qla_fw.h.

#define HSRX_RISC_INT BIT_15 /* RISC to Host interrupt. */

Definition at line 995 of file qla_fw.h.

#define HSRX_RISC_PAUSED BIT_8 /* RISC Paused. */

Definition at line 996 of file qla_fw.h.

#define HW_EVENT_FLASH_FW_ERR 0xF024

Definition at line 940 of file qla_fw.h.

#define HW_EVENT_ISP_ERR 0xF020

Definition at line 937 of file qla_fw.h.

#define HW_EVENT_NVRAM_CHKSUM_ERR 0xF023

Definition at line 939 of file qla_fw.h.

#define HW_EVENT_PARITY_ERR 0xF022

Definition at line 938 of file qla_fw.h.

#define HW_EVENT_RESET_ERR 0xF00B

Definition at line 936 of file qla_fw.h.

#define ICB_VERSION 1

Definition at line 1733 of file qla_fw.h.

#define ICB_VERSION 1

Definition at line 1733 of file qla_fw.h.

#define ICRX_EN_RISC_INT BIT_3 /* Enable RISC interrupts on PCI. */

Definition at line 971 of file qla_fw.h.

#define ISRX_RISC_INT BIT_3 /* RISC interrupt. */

Definition at line 974 of file qla_fw.h.

#define LCF_CLASS_2 BIT_8 /* Enable class 2 during PLOGI. */

Definition at line 783 of file qla_fw.h.

#define LCF_COMMAND_ADISC 0x03 /* ADISC. */

Definition at line 795 of file qla_fw.h.

#define LCF_COMMAND_LOGO 0x08 /* LOGO. */

Definition at line 796 of file qla_fw.h.

#define LCF_COMMAND_PDISC 0x02 /* PDISC. */

Definition at line 794 of file qla_fw.h.

#define LCF_COMMAND_PLOGI 0x00 /* PLOGI. */

Definition at line 792 of file qla_fw.h.

#define LCF_COMMAND_PRLI 0x01 /* PRLI. */

Definition at line 793 of file qla_fw.h.

#define LCF_COMMAND_PRLO 0x09 /* PRLO. */

Definition at line 797 of file qla_fw.h.

#define LCF_COMMAND_TPRLO 0x0A /* TPRLO. */

Definition at line 798 of file qla_fw.h.

#define LCF_COND_PLOGI BIT_4 /* PLOGI only if not logged-in. */

Definition at line 788 of file qla_fw.h.

#define LCF_EXPL_LOGO BIT_6 /* Perform an explicit LOGO. */

Definition at line 785 of file qla_fw.h.

#define LCF_FCP2_OVERRIDE BIT_9 /* Set/Reset word 3 of PRLI. */

Definition at line 782 of file qla_fw.h.

#define LCF_FREE_NPORT BIT_7 /* Release NPORT handle after LOGO. */

Definition at line 784 of file qla_fw.h.

#define LCF_IMPL_LOGO BIT_4 /* Perform an implicit LOGO. */

Definition at line 789 of file qla_fw.h.

#define LCF_IMPL_LOGO_ALL BIT_5 /* Implicit LOGO to all ports. */

Definition at line 787 of file qla_fw.h.

#define LCF_IMPL_PRLO BIT_4 /* Perform an implicit PRLO. */

Definition at line 790 of file qla_fw.h.

#define LCF_INCLUDE_SNS BIT_10 /* Include SNS (FFFFFC) during LOGO. */

Definition at line 781 of file qla_fw.h.

#define LCF_SKIP_PRLI BIT_5 /* Skip PRLI after PLOGI. */

Definition at line 786 of file qla_fw.h.

#define LOGINOUT_PORT_IOCB_TYPE 0x52 /* Login/Logout Port entry. */

Definition at line 765 of file qla_fw.h.

#define LSC_SCODE_CMD_FAILED 0x04

Definition at line 811 of file qla_fw.h.

#define LSC_SCODE_CMD_PARAM_ERR 0x19

Definition at line 818 of file qla_fw.h.

#define LSC_SCODE_ELS_REJECT 0x18

Definition at line 817 of file qla_fw.h.

#define LSC_SCODE_FW_NOT_READY 0x07

Definition at line 813 of file qla_fw.h.

#define LSC_SCODE_LOGGED_IN 0x1D

Definition at line 822 of file qla_fw.h.

#define LSC_SCODE_NOFABRIC 0x05

Definition at line 812 of file qla_fw.h.

#define LSC_SCODE_NOFLOGI_ACC 0x1F

Definition at line 823 of file qla_fw.h.

#define LSC_SCODE_NOIOCB 0x02

Definition at line 809 of file qla_fw.h.

#define LSC_SCODE_NOLINK 0x01

Definition at line 808 of file qla_fw.h.

#define LSC_SCODE_NONPORT 0x1C

Definition at line 821 of file qla_fw.h.

#define LSC_SCODE_NOPCB 0x0A

Definition at line 815 of file qla_fw.h.

#define LSC_SCODE_NOT_LOGGED_IN 0x09

Definition at line 814 of file qla_fw.h.

#define LSC_SCODE_NOXCB 0x03

Definition at line 810 of file qla_fw.h.

#define LSC_SCODE_NPORT_USED 0x1B

Definition at line 820 of file qla_fw.h.

#define LSC_SCODE_PORTID_USED 0x1A

Definition at line 819 of file qla_fw.h.

#define MARKER_TYPE 0x04 /* Marker entry. */

Definition at line 601 of file qla_fw.h.

#define MAX_MULTI_ID_FABRIC 256 /* ... */

Definition at line 1112 of file qla_fw.h.

#define MBA_DCBX_COMPLETE 0x8030

Definition at line 1526 of file qla_fw.h.

#define MBA_DCBX_PARAM_UPDATE 0x8032

Definition at line 1528 of file qla_fw.h.

#define MBA_DCBX_START 0x8016

Definition at line 1525 of file qla_fw.h.

#define MBA_FCF_CONF_ERR 0x8031

Definition at line 1527 of file qla_fw.h.

#define MBA_IDC_COMPLETE 0x8100

Definition at line 1529 of file qla_fw.h.

#define MBA_IDC_NOTIFY 0x8101

Definition at line 1530 of file qla_fw.h.

#define MBA_IDC_TIME_EXT 0x8102

Definition at line 1531 of file qla_fw.h.

#define MBA_ISP84XX_ALERT 0x800f /* Alert Notification. */

Definition at line 1402 of file qla_fw.h.

#define MBC_FLASH_ACCESS_CTRL 0x3e /* Control flash access. */

Definition at line 1535 of file qla_fw.h.

#define MBC_GET_DCBX_PARAMS 0x51

Definition at line 1537 of file qla_fw.h.

#define MBC_GET_XGMAC_STATS 0x7a

Definition at line 1536 of file qla_fw.h.

#define MBC_IDC_ACK 0x101

Definition at line 1533 of file qla_fw.h.

#define MBC_ISP84XX_RESET 0x3a /* Reset. */

Definition at line 1408 of file qla_fw.h.

#define MBC_READ_REMOTE_REG 0x0009 /* Read remote register */

Definition at line 1543 of file qla_fw.h.

#define MBC_RESTART_MPI_FW 0x3d

Definition at line 1534 of file qla_fw.h.

#define MBC_RESTART_NIC_FIRMWARE 0x003d /* Restart NIC firmware */

Definition at line 1544 of file qla_fw.h.

#define MBC_SET_ACCESS_CONTROL 0x003e /* Access control command */

Definition at line 1545 of file qla_fw.h.

#define MBC_WRITE_REMOTE_REG 0x0001 /* Write remote register */

Definition at line 1542 of file qla_fw.h.

#define MBS_CHECKSUM_ERROR 0x4010

Definition at line 10 of file qla_fw.h.

#define MBS_INVALID_PRODUCT_KEY 0x4020

Definition at line 11 of file qla_fw.h.

#define MBX_IOCB_TYPE 0x39

Definition at line 752 of file qla_fw.h.

#define MDBS_ENABLED BIT_0

Definition at line 1155 of file qla_fw.h.

#define MDBS_ID_ACQUIRED BIT_1

Definition at line 1154 of file qla_fw.h.

#define MDBS_NON_PARTIC BIT_3

Definition at line 1153 of file qla_fw.h.

#define MIN_MULTI_ID_FABRIC 64 /* Must be power-of-2. */

Definition at line 1111 of file qla_fw.h.

#define MK_SYNC_ALL 2 /* Synchronize all ID/LUN */

Definition at line 615 of file qla_fw.h.

#define MK_SYNC_ID 1 /* Synchronize ID */

Definition at line 614 of file qla_fw.h.

#define MK_SYNC_ID_LUN 0 /* Synchronize ID/LUN */

Definition at line 613 of file qla_fw.h.

#define MWB_1024_BYTES (1 << 4)

Definition at line 962 of file qla_fw.h.

#define MWB_2048_BYTES (2 << 4)

Definition at line 963 of file qla_fw.h.

#define MWB_4096_BYTES (3 << 4)

Definition at line 964 of file qla_fw.h.

#define MWB_512_BYTES (0 << 4)

Definition at line 961 of file qla_fw.h.

#define PBM_PCI_33MHZ (0 << 8)

Definition at line 951 of file qla_fw.h.

#define PBM_PCI_66MHZ (8 << 8)

Definition at line 958 of file qla_fw.h.

#define PBM_PCIX_M1_100MHZ (2 << 8)

Definition at line 953 of file qla_fw.h.

#define PBM_PCIX_M1_133MHZ (3 << 8)

Definition at line 954 of file qla_fw.h.

#define PBM_PCIX_M1_66MHZ (1 << 8)

Definition at line 952 of file qla_fw.h.

#define PBM_PCIX_M2_100MHZ (6 << 8)

Definition at line 956 of file qla_fw.h.

#define PBM_PCIX_M2_133MHZ (7 << 8)

Definition at line 957 of file qla_fw.h.

#define PBM_PCIX_M2_66MHZ (5 << 8)

Definition at line 955 of file qla_fw.h.

#define PDF_ACK0_CAPABLE BIT_6

Definition at line 35 of file qla_fw.h.

#define PDF_CLASS_2 BIT_4

Definition at line 37 of file qla_fw.h.

#define PDF_FC_TAPE BIT_7

Definition at line 34 of file qla_fw.h.

#define PDF_FCP2_CONF BIT_5

Definition at line 36 of file qla_fw.h.

#define PDF_HARD_ADDR BIT_1

Definition at line 38 of file qla_fw.h.

#define PDF_TASK_RETRY_ID BIT_14

Definition at line 33 of file qla_fw.h.

#define PDO_FORCE_ADISC BIT_1

Definition at line 26 of file qla_fw.h.

#define PDO_FORCE_PLOGI BIT_0

Definition at line 27 of file qla_fw.h.

#define PDS_LOGO_PENDING 0x11

Definition at line 48 of file qla_fw.h.

#define PDS_PLOGI_COMPLETE 0x04

Definition at line 43 of file qla_fw.h.

#define PDS_PLOGI_PENDING 0x03

Definition at line 42 of file qla_fw.h.

#define PDS_PORT_UNAVAILABLE 0x07

Definition at line 46 of file qla_fw.h.

#define PDS_PRLI2_PENDING 0x12

Definition at line 49 of file qla_fw.h.

#define PDS_PRLI_COMPLETE 0x06

Definition at line 45 of file qla_fw.h.

#define PDS_PRLI_PENDING 0x05

Definition at line 44 of file qla_fw.h.

#define PDS_PRLO_PENDING 0x09

Definition at line 47 of file qla_fw.h.

#define PORT_DATABASE_24XX_SIZE 64

Definition at line 30 of file qla_fw.h.

#define QLFC_FCP_PRIO_DISABLE 0x0

Definition at line 1858 of file qla_fw.h.

#define QLFC_FCP_PRIO_ENABLE 0x1

Definition at line 1859 of file qla_fw.h.

#define QLFC_FCP_PRIO_GET_CONFIG 0x2

Definition at line 1860 of file qla_fw.h.

#define QLFC_FCP_PRIO_SET_CONFIG 0x3

Definition at line 1861 of file qla_fw.h.

#define SF_FCP_RSP_DMA BIT_0

Definition at line 563 of file qla_fw.h.

#define SF_TRANSFERRED_DATA BIT_11

Definition at line 562 of file qla_fw.h.

#define SS_CONFIRMATION_REQ BIT_12

Definition at line 567 of file qla_fw.h.

#define STATUS_TYPE 0x03 /* Status entry. */

Definition at line 546 of file qla_fw.h.

#define TC_AEN_DISABLE 0

Definition at line 1097 of file qla_fw.h.

#define TC_EFT_DISABLE 5

Definition at line 1100 of file qla_fw.h.

#define TC_EFT_ENABLE 4

Definition at line 1099 of file qla_fw.h.

#define TC_FCE_DEFAULT_RX_SIZE 2112

Definition at line 1104 of file qla_fw.h.

#define TC_FCE_DEFAULT_TX_SIZE 2112

Definition at line 1105 of file qla_fw.h.

#define TC_FCE_DISABLE 9

Definition at line 1106 of file qla_fw.h.

#define TC_FCE_DISABLE_TRACE BIT_0

Definition at line 1107 of file qla_fw.h.

#define TC_FCE_ENABLE 8

Definition at line 1102 of file qla_fw.h.

#define TC_FCE_OPTIONS 0

Definition at line 1103 of file qla_fw.h.

#define TCF_ABORT_TASK_SET BIT_3

Definition at line 848 of file qla_fw.h.

#define TCF_CLEAR_ACA BIT_0

Definition at line 851 of file qla_fw.h.

#define TCF_CLEAR_TASK_SET BIT_2

Definition at line 849 of file qla_fw.h.

#define TCF_LUN_RESET BIT_4

Definition at line 847 of file qla_fw.h.

#define TCF_NOTMCMD_TO_TARGET BIT_31

Definition at line 846 of file qla_fw.h.

#define TCF_TARGET_RESET BIT_1

Definition at line 850 of file qla_fw.h.

#define TMF_ABORT_TASK_SET BIT_9

Definition at line 483 of file qla_fw.h.

#define TMF_CLEAR_ACA BIT_14

Definition at line 479 of file qla_fw.h.

#define TMF_CLEAR_TASK_SET BIT_10

Definition at line 482 of file qla_fw.h.

#define TMF_DSD_LIST_ENABLE BIT_2

Definition at line 484 of file qla_fw.h.

#define TMF_LUN_RESET BIT_12

Definition at line 481 of file qla_fw.h.

#define TMF_READ_DATA BIT_1

Definition at line 485 of file qla_fw.h.

#define TMF_TARGET_RESET BIT_13

Definition at line 480 of file qla_fw.h.

#define TMF_WRITE_DATA BIT_0

Definition at line 486 of file qla_fw.h.

#define TSK_ACA 4

Definition at line 492 of file qla_fw.h.

#define TSK_HEAD_OF_QUEUE 1

Definition at line 490 of file qla_fw.h.

#define TSK_MGMT_IOCB_TYPE 0x14

Definition at line 826 of file qla_fw.h.

#define TSK_ORDERED 2

Definition at line 491 of file qla_fw.h.

#define TSK_SIMPLE 0

Definition at line 489 of file qla_fw.h.

#define TSK_UNTAGGED 5

Definition at line 493 of file qla_fw.h.

#define VCE_COMMAND_DISABLE_VPS 0x08 /* Disable VPs. */

Definition at line 1188 of file qla_fw.h.

#define VCE_COMMAND_DISABLE_VPS_LOGO 0x0a /* Disable VPs and LOGO ports. */

Definition at line 1190 of file qla_fw.h.

#define VCE_COMMAND_DISABLE_VPS_LOGO_ALL 0x0b /* Disable VPs and LOGO ports. */

Definition at line 1191 of file qla_fw.h.

#define VCE_COMMAND_DISABLE_VPS_REINIT 0x09 /* Disable VPs and reinit link. */

Definition at line 1189 of file qla_fw.h.

#define VCE_COMMAND_ENABLE_VPS 0x00 /* Enable VPs. */

Definition at line 1187 of file qla_fw.h.

#define VCO_DIAG_FW BIT_3

Definition at line 1429 of file qla_fw.h.

#define VCO_DONT_RESET_UPDATE BIT_2

Definition at line 1428 of file qla_fw.h.

#define VCO_DONT_UPDATE_FW BIT_0

Definition at line 1426 of file qla_fw.h.

#define VCO_ENABLE_DSD BIT_15

Definition at line 1431 of file qla_fw.h.

#define VCO_END_OF_DATA BIT_14

Definition at line 1430 of file qla_fw.h.

#define VCO_FORCE_UPDATE BIT_1

Definition at line 1427 of file qla_fw.h.

#define VCT_COMMAND_MOD_ENABLE_VPS 0x01 /* Modify configuration & enable VPs. */

Definition at line 1229 of file qla_fw.h.

#define VCT_COMMAND_MOD_VPS 0x00 /* Modify VP configurations. */

Definition at line 1228 of file qla_fw.h.

#define VERIFY_CHIP_IOCB_TYPE 0x1B

Definition at line 1416 of file qla_fw.h.

#define VF_EVFP_IOCB_TYPE 0x26 /* Exchange Virtual Fabric Parameters entry. */

Definition at line 1275 of file qla_fw.h.

#define VFC_ALREADY_IN_PROGRESS 0x8

Definition at line 1466 of file qla_fw.h.

#define VFC_CHECKSUM_ERROR 0x1

Definition at line 1464 of file qla_fw.h.

#define VFC_INVALID_LEN 0x2

Definition at line 1465 of file qla_fw.h.

#define VP_CONFIG_IOCB_TYPE 0x31 /* Virtual Port Config entry. */

Definition at line 1206 of file qla_fw.h.

#define VP_CTRL_IOCB_TYPE 0x30 /* Virtual Port Control entry. */

Definition at line 1170 of file qla_fw.h.

#define VP_RPT_ID_IOCB_TYPE 0x32 /* Report ID Acquisition entry. */

Definition at line 1253 of file qla_fw.h.

Data Structures

Macros

Macro Definition Documentation