Linux Kernel
3.7.1
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#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/slab.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include <linux/usb/otg.h>
#include <linux/prefetch.h>
#include <linux/platform_data/s3c-hsudc.h>
#include <linux/regulator/consumer.h>
#include <linux/pm_runtime.h>
#include <mach/regs-s3c2443-clock.h>
Go to the source code of this file.
Data Structures | |
struct | s3c_hsudc_ep |
struct | s3c_hsudc_req |
struct | s3c_hsudc |
Macros | |
#define | S3C_HSUDC_REG(x) (x) |
#define | S3C_IR S3C_HSUDC_REG(0x00) /* Index Register */ |
#define | S3C_EIR S3C_HSUDC_REG(0x04) /* EP Intr Status */ |
#define | S3C_EIR_EP0 (1<<0) |
#define | S3C_EIER S3C_HSUDC_REG(0x08) /* EP Intr Enable */ |
#define | S3C_FAR S3C_HSUDC_REG(0x0c) /* Gadget Address */ |
#define | S3C_FNR S3C_HSUDC_REG(0x10) /* Frame Number */ |
#define | S3C_EDR S3C_HSUDC_REG(0x14) /* EP Direction */ |
#define | S3C_TR S3C_HSUDC_REG(0x18) /* Test Register */ |
#define | S3C_SSR S3C_HSUDC_REG(0x1c) /* System Status */ |
#define | S3C_SSR_DTZIEN_EN (0xff8f) |
#define | S3C_SSR_ERR (0xff80) |
#define | S3C_SSR_VBUSON (1 << 8) |
#define | S3C_SSR_HSP (1 << 4) |
#define | S3C_SSR_SDE (1 << 3) |
#define | S3C_SSR_RESUME (1 << 2) |
#define | S3C_SSR_SUSPEND (1 << 1) |
#define | S3C_SSR_RESET (1 << 0) |
#define | S3C_SCR S3C_HSUDC_REG(0x20) /* System Control */ |
#define | S3C_SCR_DTZIEN_EN (1 << 14) |
#define | S3C_SCR_RRD_EN (1 << 5) |
#define | S3C_SCR_SUS_EN (1 << 1) |
#define | S3C_SCR_RST_EN (1 << 0) |
#define | S3C_EP0SR S3C_HSUDC_REG(0x24) /* EP0 Status */ |
#define | S3C_EP0SR_EP0_LWO (1 << 6) |
#define | S3C_EP0SR_STALL (1 << 4) |
#define | S3C_EP0SR_TX_SUCCESS (1 << 1) |
#define | S3C_EP0SR_RX_SUCCESS (1 << 0) |
#define | S3C_EP0CR S3C_HSUDC_REG(0x28) /* EP0 Control */ |
#define | S3C_BR(_x) S3C_HSUDC_REG(0x60 + (_x * 4)) |
#define | S3C_ESR S3C_HSUDC_REG(0x2c) /* EPn Status */ |
#define | S3C_ESR_FLUSH (1 << 6) |
#define | S3C_ESR_STALL (1 << 5) |
#define | S3C_ESR_LWO (1 << 4) |
#define | S3C_ESR_PSIF_ONE (1 << 2) |
#define | S3C_ESR_PSIF_TWO (2 << 2) |
#define | S3C_ESR_TX_SUCCESS (1 << 1) |
#define | S3C_ESR_RX_SUCCESS (1 << 0) |
#define | S3C_ECR S3C_HSUDC_REG(0x30) /* EPn Control */ |
#define | S3C_ECR_DUEN (1 << 7) |
#define | S3C_ECR_FLUSH (1 << 6) |
#define | S3C_ECR_STALL (1 << 1) |
#define | S3C_ECR_IEMS (1 << 0) |
#define | S3C_BRCR S3C_HSUDC_REG(0x34) /* Read Count */ |
#define | S3C_BWCR S3C_HSUDC_REG(0x38) /* Write Count */ |
#define | S3C_MPR S3C_HSUDC_REG(0x3c) /* Max Pkt Size */ |
#define | WAIT_FOR_SETUP (0) |
#define | DATA_STATE_XMIT (1) |
#define | DATA_STATE_RECV (2) |
: Endpoint name (as required by ep autoconfiguration). | |
struct s3c_hsudc_ep - Endpoint representation used by driver. : USB gadget layer representation of device endpoint. : Reference to the device controller to which this EP belongs. : Endpoint descriptor obtained from the gadget driver. : Transfer request queue for the endpoint. : Maintains state of endpoint, set if EP is halted. : EP address (including direction bit). : Base address of EP FIFO. | |
#define | ep_maxpacket(_ep) ((_ep)->ep.maxpacket) |
#define | ep_is_in(_ep) ((_ep)->bEndpointAddress & USB_DIR_IN) |
#define | ep_index(_ep) |
module_platform_driver (s3c_hsudc_driver) | |
MODULE_DESCRIPTION ("Samsung S3C24XX USB high-speed controller driver") | |
MODULE_AUTHOR ("Thomas Abraham <[email protected]>") | |
MODULE_LICENSE ("GPL") | |
MODULE_ALIAS ("platform:s3c-hsudc") | |
#define DATA_STATE_RECV (2) |
Definition at line 91 of file s3c-hsudc.c.
#define DATA_STATE_XMIT (1) |
Definition at line 90 of file s3c-hsudc.c.
#define ep_index | ( | _ep | ) |
Definition at line 160 of file s3c-hsudc.c.
#define ep_is_in | ( | _ep | ) | ((_ep)->bEndpointAddress & USB_DIR_IN) |
Definition at line 159 of file s3c-hsudc.c.
#define ep_maxpacket | ( | _ep | ) | ((_ep)->ep.maxpacket) |
Definition at line 158 of file s3c-hsudc.c.
#define S3C_BR | ( | _x | ) | S3C_HSUDC_REG(0x60 + (_x * 4)) |
Definition at line 69 of file s3c-hsudc.c.
#define S3C_BRCR S3C_HSUDC_REG(0x34) /* Read Count */ |
Definition at line 85 of file s3c-hsudc.c.
#define S3C_BWCR S3C_HSUDC_REG(0x38) /* Write Count */ |
Definition at line 86 of file s3c-hsudc.c.
#define S3C_ECR S3C_HSUDC_REG(0x30) /* EPn Control */ |
Definition at line 80 of file s3c-hsudc.c.
#define S3C_ECR_DUEN (1 << 7) |
Definition at line 81 of file s3c-hsudc.c.
#define S3C_ECR_FLUSH (1 << 6) |
Definition at line 82 of file s3c-hsudc.c.
#define S3C_ECR_IEMS (1 << 0) |
Definition at line 84 of file s3c-hsudc.c.
#define S3C_ECR_STALL (1 << 1) |
Definition at line 83 of file s3c-hsudc.c.
#define S3C_EDR S3C_HSUDC_REG(0x14) /* EP Direction */ |
Definition at line 47 of file s3c-hsudc.c.
#define S3C_EIER S3C_HSUDC_REG(0x08) /* EP Intr Enable */ |
Definition at line 44 of file s3c-hsudc.c.
#define S3C_EIR S3C_HSUDC_REG(0x04) /* EP Intr Status */ |
Definition at line 42 of file s3c-hsudc.c.
#define S3C_EIR_EP0 (1<<0) |
Definition at line 43 of file s3c-hsudc.c.
#define S3C_EP0CR S3C_HSUDC_REG(0x28) /* EP0 Control */ |
Definition at line 68 of file s3c-hsudc.c.
#define S3C_EP0SR S3C_HSUDC_REG(0x24) /* EP0 Status */ |
Definition at line 63 of file s3c-hsudc.c.
#define S3C_EP0SR_EP0_LWO (1 << 6) |
Definition at line 64 of file s3c-hsudc.c.
#define S3C_EP0SR_RX_SUCCESS (1 << 0) |
Definition at line 67 of file s3c-hsudc.c.
#define S3C_EP0SR_STALL (1 << 4) |
Definition at line 65 of file s3c-hsudc.c.
#define S3C_EP0SR_TX_SUCCESS (1 << 1) |
Definition at line 66 of file s3c-hsudc.c.
#define S3C_ESR S3C_HSUDC_REG(0x2c) /* EPn Status */ |
Definition at line 72 of file s3c-hsudc.c.
#define S3C_ESR_FLUSH (1 << 6) |
Definition at line 73 of file s3c-hsudc.c.
#define S3C_ESR_LWO (1 << 4) |
Definition at line 75 of file s3c-hsudc.c.
#define S3C_ESR_PSIF_ONE (1 << 2) |
Definition at line 76 of file s3c-hsudc.c.
#define S3C_ESR_PSIF_TWO (2 << 2) |
Definition at line 77 of file s3c-hsudc.c.
#define S3C_ESR_RX_SUCCESS (1 << 0) |
Definition at line 79 of file s3c-hsudc.c.
#define S3C_ESR_STALL (1 << 5) |
Definition at line 74 of file s3c-hsudc.c.
#define S3C_ESR_TX_SUCCESS (1 << 1) |
Definition at line 78 of file s3c-hsudc.c.
#define S3C_FAR S3C_HSUDC_REG(0x0c) /* Gadget Address */ |
Definition at line 45 of file s3c-hsudc.c.
#define S3C_FNR S3C_HSUDC_REG(0x10) /* Frame Number */ |
Definition at line 46 of file s3c-hsudc.c.
Definition at line 38 of file s3c-hsudc.c.
#define S3C_IR S3C_HSUDC_REG(0x00) /* Index Register */ |
Definition at line 41 of file s3c-hsudc.c.
#define S3C_MPR S3C_HSUDC_REG(0x3c) /* Max Pkt Size */ |
Definition at line 87 of file s3c-hsudc.c.
#define S3C_SCR S3C_HSUDC_REG(0x20) /* System Control */ |
Definition at line 58 of file s3c-hsudc.c.
#define S3C_SCR_DTZIEN_EN (1 << 14) |
Definition at line 59 of file s3c-hsudc.c.
#define S3C_SCR_RRD_EN (1 << 5) |
Definition at line 60 of file s3c-hsudc.c.
#define S3C_SCR_RST_EN (1 << 0) |
Definition at line 62 of file s3c-hsudc.c.
#define S3C_SCR_SUS_EN (1 << 1) |
Definition at line 61 of file s3c-hsudc.c.
#define S3C_SSR S3C_HSUDC_REG(0x1c) /* System Status */ |
Definition at line 49 of file s3c-hsudc.c.
#define S3C_SSR_DTZIEN_EN (0xff8f) |
Definition at line 50 of file s3c-hsudc.c.
#define S3C_SSR_ERR (0xff80) |
Definition at line 51 of file s3c-hsudc.c.
#define S3C_SSR_HSP (1 << 4) |
Definition at line 53 of file s3c-hsudc.c.
#define S3C_SSR_RESET (1 << 0) |
Definition at line 57 of file s3c-hsudc.c.
#define S3C_SSR_RESUME (1 << 2) |
Definition at line 55 of file s3c-hsudc.c.
#define S3C_SSR_SDE (1 << 3) |
Definition at line 54 of file s3c-hsudc.c.
#define S3C_SSR_SUSPEND (1 << 1) |
Definition at line 56 of file s3c-hsudc.c.
#define S3C_SSR_VBUSON (1 << 8) |
Definition at line 52 of file s3c-hsudc.c.
#define S3C_TR S3C_HSUDC_REG(0x18) /* Test Register */ |
Definition at line 48 of file s3c-hsudc.c.
#define WAIT_FOR_SETUP (0) |
Definition at line 89 of file s3c-hsudc.c.
MODULE_ALIAS | ( | "platform:s3c-hsudc" | ) |
MODULE_AUTHOR | ( | "Thomas Abraham <[email protected]>" | ) |
MODULE_DESCRIPTION | ( | "Samsung S3C24XX USB high-speed controller driver" | ) |
MODULE_LICENSE | ( | "GPL" | ) |
module_platform_driver | ( | s3c_hsudc_driver | ) |