17 #include <linux/kernel.h>
18 #include <linux/module.h>
25 #include <linux/slab.h>
28 #include <linux/usb/ch9.h>
31 #include <linux/prefetch.h>
38 #define S3C_HSUDC_REG(x) (x)
41 #define S3C_IR S3C_HSUDC_REG(0x00)
42 #define S3C_EIR S3C_HSUDC_REG(0x04)
43 #define S3C_EIR_EP0 (1<<0)
44 #define S3C_EIER S3C_HSUDC_REG(0x08)
45 #define S3C_FAR S3C_HSUDC_REG(0x0c)
46 #define S3C_FNR S3C_HSUDC_REG(0x10)
47 #define S3C_EDR S3C_HSUDC_REG(0x14)
48 #define S3C_TR S3C_HSUDC_REG(0x18)
49 #define S3C_SSR S3C_HSUDC_REG(0x1c)
50 #define S3C_SSR_DTZIEN_EN (0xff8f)
51 #define S3C_SSR_ERR (0xff80)
52 #define S3C_SSR_VBUSON (1 << 8)
53 #define S3C_SSR_HSP (1 << 4)
54 #define S3C_SSR_SDE (1 << 3)
55 #define S3C_SSR_RESUME (1 << 2)
56 #define S3C_SSR_SUSPEND (1 << 1)
57 #define S3C_SSR_RESET (1 << 0)
58 #define S3C_SCR S3C_HSUDC_REG(0x20)
59 #define S3C_SCR_DTZIEN_EN (1 << 14)
60 #define S3C_SCR_RRD_EN (1 << 5)
61 #define S3C_SCR_SUS_EN (1 << 1)
62 #define S3C_SCR_RST_EN (1 << 0)
63 #define S3C_EP0SR S3C_HSUDC_REG(0x24)
64 #define S3C_EP0SR_EP0_LWO (1 << 6)
65 #define S3C_EP0SR_STALL (1 << 4)
66 #define S3C_EP0SR_TX_SUCCESS (1 << 1)
67 #define S3C_EP0SR_RX_SUCCESS (1 << 0)
68 #define S3C_EP0CR S3C_HSUDC_REG(0x28)
69 #define S3C_BR(_x) S3C_HSUDC_REG(0x60 + (_x * 4))
72 #define S3C_ESR S3C_HSUDC_REG(0x2c)
73 #define S3C_ESR_FLUSH (1 << 6)
74 #define S3C_ESR_STALL (1 << 5)
75 #define S3C_ESR_LWO (1 << 4)
76 #define S3C_ESR_PSIF_ONE (1 << 2)
77 #define S3C_ESR_PSIF_TWO (2 << 2)
78 #define S3C_ESR_TX_SUCCESS (1 << 1)
79 #define S3C_ESR_RX_SUCCESS (1 << 0)
80 #define S3C_ECR S3C_HSUDC_REG(0x30)
81 #define S3C_ECR_DUEN (1 << 7)
82 #define S3C_ECR_FLUSH (1 << 6)
83 #define S3C_ECR_STALL (1 << 1)
84 #define S3C_ECR_IEMS (1 << 0)
85 #define S3C_BRCR S3C_HSUDC_REG(0x34)
86 #define S3C_BWCR S3C_HSUDC_REG(0x38)
87 #define S3C_MPR S3C_HSUDC_REG(0x3c)
89 #define WAIT_FOR_SETUP (0)
90 #define DATA_STATE_XMIT (1)
91 #define DATA_STATE_RECV (2)
93 static const char *
const s3c_hsudc_supply_names[] = {
158 #define ep_maxpacket(_ep) ((_ep)->ep.maxpacket)
159 #define ep_is_in(_ep) ((_ep)->bEndpointAddress & USB_DIR_IN)
160 #define ep_index(_ep) ((_ep)->bEndpointAddress & \
161 USB_ENDPOINT_NUMBER_MASK)
164 static const char ep0name[] =
"ep0-control";
181 static inline void set_index(
struct s3c_hsudc *hsudc,
int ep_addr)
192 static void s3c_hsudc_init_phy(
void)
226 static void s3c_hsudc_uninit_phy(
void)
245 static void s3c_hsudc_complete_request(
struct s3c_hsudc_ep *hsep,
251 list_del_init(&hsreq->
queue);
260 spin_unlock(&hsudc->
lock);
261 if (hsreq->
req.complete !=
NULL)
262 hsreq->
req.complete(&hsep->
ep, &hsreq->
req);
263 spin_lock(&hsudc->
lock);
272 static void s3c_hsudc_nuke_ep(
struct s3c_hsudc_ep *hsep,
int status)
276 while (!list_empty(&hsep->
queue)) {
279 s3c_hsudc_complete_request(hsep, hsreq, status);
291 static void s3c_hsudc_stop_activity(
struct s3c_hsudc *hsudc)
298 for (epnum = 0; epnum < hsudc->
pd->epnum; epnum++) {
299 hsep = &hsudc->
ep[epnum];
314 static void s3c_hsudc_read_setup_pkt(
struct s3c_hsudc *hsudc,
u16 *
buf)
333 static int s3c_hsudc_write_fifo(
struct s3c_hsudc_ep *hsep,
342 buf = hsreq->
req.buf + hsreq->
req.actual;
345 length = hsreq->
req.length - hsreq->
req.actual;
346 length =
min(length, max);
350 for (count = 0; count <
length; count += 2)
356 if (hsreq->
req.length != hsreq->
req.actual || hsreq->
req.zero)
363 s3c_hsudc_complete_request(hsep, hsreq, 0);
379 static int s3c_hsudc_read_fifo(
struct s3c_hsudc_ep *hsep,
394 buf = hsreq->
req.buf + hsreq->
req.actual;
396 buflen = hsreq->
req.length - hsreq->
req.actual;
399 rlen = (csr &
S3C_ESR_LWO) ? (rcnt * 2 - 1) : (rcnt * 2);
401 hsreq->
req.actual +=
min(rlen, buflen);
402 is_short = (rlen < hsep->
ep.maxpacket);
404 while (rcnt-- != 0) {
414 writel(S3C_ESR_RX_SUCCESS, hsudc->
regs + offset);
416 if (is_short || hsreq->
req.actual == hsreq->
req.length) {
417 s3c_hsudc_complete_request(hsep, hsreq, 0);
432 static void s3c_hsudc_epin_intr(
struct s3c_hsudc *hsudc,
u32 ep_idx)
446 if (list_empty(&hsep->
queue))
451 if ((s3c_hsudc_write_fifo(hsep, hsreq) == 0) &&
453 s3c_hsudc_write_fifo(hsep, hsreq);
465 static void s3c_hsudc_epout_intr(
struct s3c_hsudc *hsudc,
u32 ep_idx)
472 if (csr & S3C_ESR_STALL) {
482 if (csr & S3C_ESR_RX_SUCCESS) {
483 if (list_empty(&hsep->
queue))
488 if (((s3c_hsudc_read_fifo(hsep, hsreq)) == 0) &&
490 s3c_hsudc_read_fifo(hsep, hsreq);
502 static int s3c_hsudc_set_halt(
struct usb_ep *_ep,
int value)
507 unsigned long irqflags;
534 s3c_hsudc_write_fifo(hsep, hsreq);
537 spin_unlock_irqrestore(&hsudc->
lock, irqflags);
546 static int s3c_hsudc_set_wedge(
struct usb_ep *_ep)
554 return usb_ep_set_halt(_ep);
563 static int s3c_hsudc_handle_reqfeat(
struct s3c_hsudc *hsudc,
571 hsep = &hsudc->
ep[ep_num];
574 if (
set || (!
set && !hsep->
wedge))
575 s3c_hsudc_set_halt(&hsep->
ep,
set);
590 static void s3c_hsudc_process_req_status(
struct s3c_hsudc *hsudc,
610 hsep = &hsudc->
ep[epnum];
615 INIT_LIST_HEAD(&hsreq.
queue);
616 hsreq.
req.length = 2;
617 hsreq.
req.buf = &reply;
618 hsreq.
req.actual = 0;
620 s3c_hsudc_write_fifo(hsep0, &hsreq);
630 static void s3c_hsudc_process_setup(
struct s3c_hsudc *hsudc)
636 s3c_hsudc_nuke_ep(hsep, -
EPROTO);
637 s3c_hsudc_read_setup_pkt(hsudc, (
u16 *)&ctrl);
657 s3c_hsudc_process_req_status(hsudc, &ctrl);
664 s3c_hsudc_handle_reqfeat(hsudc, &ctrl);
670 spin_unlock(&hsudc->
lock);
672 spin_lock(&hsudc->
lock);
680 dev_err(hsudc->
dev,
"setup failed, returned %d\n",
682 s3c_hsudc_set_halt(&hsep->
ep, 1);
696 static void s3c_hsudc_handle_ep0_intr(
struct s3c_hsudc *hsudc)
720 if (list_empty(&hsep->
queue))
725 s3c_hsudc_write_fifo(hsep, hsreq);
731 s3c_hsudc_process_setup(hsudc);
734 if (list_empty(&hsep->
queue))
738 s3c_hsudc_read_fifo(hsep, hsreq);
753 static int s3c_hsudc_ep_enable(
struct usb_ep *_ep,
762 if (!_ep || !desc || _ep->
name == ep0name
784 hsep->
ep.desc = desc;
785 hsep->
ep.maxpacket = usb_endpoint_maxp(desc);
787 s3c_hsudc_set_halt(_ep, 0);
790 spin_unlock_irqrestore(&hsudc->
lock, flags);
801 static int s3c_hsudc_ep_disable(
struct usb_ep *_ep)
807 if (!_ep || !hsep->
ep.desc)
820 spin_unlock_irqrestore(&hsudc->
lock, flags);
836 hsreq = kzalloc(
sizeof(*hsreq), gfp_flags);
840 INIT_LIST_HEAD(&hsreq->
queue);
855 hsreq = our_req(_req);
878 hsreq = our_req(_req);
880 !list_empty(&hsreq->
queue)))
896 s3c_hsudc_complete_request(hsep, hsreq, 0);
897 spin_unlock_irqrestore(&hsudc->
lock, flags);
905 if (!(csr & S3C_ESR_TX_SUCCESS) &&
906 (s3c_hsudc_write_fifo(hsep, hsreq) == 1))
910 if ((csr & S3C_ESR_RX_SUCCESS)
911 && (s3c_hsudc_read_fifo(hsep, hsreq) == 1))
919 spin_unlock_irqrestore(&hsudc->
lock, flags);
938 if (!_ep || hsep->
ep.name == ep0name)
944 if (&hsreq->
req == _req)
947 if (&hsreq->
req != _req) {
948 spin_unlock_irqrestore(&hsudc->
lock, flags);
953 s3c_hsudc_complete_request(hsep, hsreq, -
ECONNRESET);
955 spin_unlock_irqrestore(&hsudc->
lock, flags);
960 .enable = s3c_hsudc_ep_enable,
961 .disable = s3c_hsudc_ep_disable,
962 .alloc_request = s3c_hsudc_alloc_request,
963 .free_request = s3c_hsudc_free_request,
964 .queue = s3c_hsudc_queue,
965 .dequeue = s3c_hsudc_dequeue,
966 .set_halt = s3c_hsudc_set_halt,
967 .set_wedge = s3c_hsudc_set_wedge,
978 static void s3c_hsudc_initep(
struct s3c_hsudc *hsudc,
983 if ((epnum % 2) == 0) {
996 INIT_LIST_HEAD(&hsep->
queue);
997 INIT_LIST_HEAD(&hsep->
ep.ep_list);
1002 hsep->
ep.name = hsep->
name;
1003 hsep->
ep.maxpacket = epnum ? 512 : 64;
1004 hsep->
ep.ops = &s3c_hsudc_ep_ops;
1010 set_index(hsudc, epnum);
1020 static void s3c_hsudc_setup_ep(
struct s3c_hsudc *hsudc)
1025 INIT_LIST_HEAD(&hsudc->
gadget.ep_list);
1026 for (epnum = 0; epnum < hsudc->
pd->epnum; epnum++)
1027 s3c_hsudc_initep(hsudc, &hsudc->
ep[epnum], epnum);
1036 static void s3c_hsudc_reconfig(
struct s3c_hsudc *hsudc)
1045 s3c_hsudc_setup_ep(hsudc);
1056 static irqreturn_t s3c_hsudc_irq(
int irq,
void *_dev)
1064 spin_lock(&hsudc->
lock);
1070 spin_unlock(&hsudc->
lock);
1103 for (ep_idx = 0; ep_idx < hsudc->
pd->epnum; ep_idx++) {
1104 hsep = &hsudc->
ep[ep_idx];
1108 s3c_hsudc_reconfig(hsudc);
1115 set_index(hsudc, 0);
1116 s3c_hsudc_handle_ep0_intr(hsudc);
1123 hsep = &hsudc->
ep[ep_idx];
1124 set_index(hsudc, ep_idx);
1127 s3c_hsudc_epin_intr(hsudc, ep_idx);
1129 s3c_hsudc_epout_intr(hsudc, ep_idx);
1135 spin_unlock(&hsudc->
lock);
1139 static int s3c_hsudc_start(
struct usb_gadget *gadget,
1142 struct s3c_hsudc *hsudc = to_hsudc(gadget);
1162 dev_err(hsudc->
dev,
"failed to enable supplies: %d\n", ret);
1171 dev_err(hsudc->
dev,
"%s: can't bind to transceiver\n",
1180 s3c_hsudc_reconfig(hsudc);
1182 pm_runtime_get_sync(hsudc->
dev);
1184 s3c_hsudc_init_phy();
1185 if (hsudc->
pd->gpio_init)
1186 hsudc->
pd->gpio_init();
1197 static int s3c_hsudc_stop(
struct usb_gadget *gadget,
1200 struct s3c_hsudc *hsudc = to_hsudc(gadget);
1201 unsigned long flags;
1206 if (!driver || driver != hsudc->
driver)
1213 s3c_hsudc_uninit_phy();
1215 pm_runtime_put(hsudc->
dev);
1217 if (hsudc->
pd->gpio_uninit)
1218 hsudc->
pd->gpio_uninit();
1219 s3c_hsudc_stop_activity(hsudc);
1220 spin_unlock_irqrestore(&hsudc->
lock, flags);
1229 dev_info(hsudc->
dev,
"unregistered gadget driver '%s'\n",
1234 static inline u32 s3c_hsudc_read_frameno(
struct s3c_hsudc *hsudc)
1239 static int s3c_hsudc_gadget_getframe(
struct usb_gadget *gadget)
1241 return s3c_hsudc_read_frameno(to_hsudc(gadget));
1244 static int s3c_hsudc_vbus_draw(
struct usb_gadget *gadget,
unsigned mA)
1246 struct s3c_hsudc *hsudc = to_hsudc(gadget);
1258 .get_frame = s3c_hsudc_gadget_getframe,
1259 .udc_start = s3c_hsudc_start,
1260 .udc_stop = s3c_hsudc_stop,
1261 .vbus_draw = s3c_hsudc_vbus_draw,
1276 dev_err(dev,
"cannot allocate memory\n");
1280 platform_set_drvdata(pdev, dev);
1282 hsudc->
pd = pdev->
dev.platform_data;
1287 hsudc->
supplies[i].supply = s3c_hsudc_supply_names[i];
1292 dev_err(dev,
"failed to request supplies: %d\n", ret);
1300 dev_err(dev,
"error mapping device register area\n");
1310 hsudc->
gadget.ops = &s3c_hsudc_gadget_ops;
1311 hsudc->
gadget.name = dev_name(dev);
1314 hsudc->
gadget.ep0 = &hsudc->
ep[0].ep;
1316 hsudc->
gadget.is_otg = 0;
1317 hsudc->
gadget.is_a_peripheral = 0;
1320 s3c_hsudc_setup_ep(hsudc);
1324 dev_err(dev,
"unable to obtain IRQ number\n");
1329 ret = devm_request_irq(&pdev->
dev, hsudc->
irq, s3c_hsudc_irq, 0,
1332 dev_err(dev,
"irq request failed\n");
1337 if (IS_ERR(hsudc->
uclk)) {
1338 dev_err(dev,
"failed to find usb-device clock source\n");
1339 ret = PTR_ERR(hsudc->
uclk);
1352 goto err_add_device;
1378 .name =
"s3c-hsudc",
1380 .probe = s3c_hsudc_probe,