Linux Kernel
3.7.1
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#include <linux/cpumask.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/spinlock.h>
#include <linux/types.h>
#include <asm/cputhreads.h>
#include <asm/reg_a2.h>
#include <asm/scom.h>
#include <asm/udbg.h>
#include "wsp.h"
Go to the source code of this file.
Macros | |
#define | SCOM_RAMC 0x2a /* Ram Command */ |
#define | SCOM_RAMC_TGT1_EXT 0x80000000 |
#define | SCOM_RAMC_SRC1_EXT 0x40000000 |
#define | SCOM_RAMC_SRC2_EXT 0x20000000 |
#define | SCOM_RAMC_SRC3_EXT 0x10000000 |
#define | SCOM_RAMC_ENABLE 0x00080000 |
#define | SCOM_RAMC_THREADSEL 0x00060000 |
#define | SCOM_RAMC_EXECUTE 0x00010000 |
#define | SCOM_RAMC_MSR_OVERRIDE 0x00008000 |
#define | SCOM_RAMC_MSR_PR 0x00004000 |
#define | SCOM_RAMC_MSR_GS 0x00002000 |
#define | SCOM_RAMC_FORCE 0x00001000 |
#define | SCOM_RAMC_FLUSH 0x00000800 |
#define | SCOM_RAMC_INTERRUPT 0x00000004 |
#define | SCOM_RAMC_ERROR 0x00000002 |
#define | SCOM_RAMC_DONE 0x00000001 |
#define | SCOM_RAMI 0x29 /* Ram Instruction */ |
#define | SCOM_RAMIC 0x28 /* Ram Instruction and Command */ |
#define | SCOM_RAMIC_INSN 0xffffffff00000000 |
#define | SCOM_RAMD 0x2d /* Ram Data */ |
#define | SCOM_RAMDH 0x2e /* Ram Data High */ |
#define | SCOM_RAMDL 0x2f /* Ram Data Low */ |
#define | SCOM_PCCR0 0x33 /* PC Configuration Register 0 */ |
#define | SCOM_PCCR0_ENABLE_DEBUG 0x80000000 |
#define | SCOM_PCCR0_ENABLE_RAM 0x40000000 |
#define | SCOM_THRCTL 0x30 /* Thread Control and Status */ |
#define | SCOM_THRCTL_T0_STOP 0x80000000 |
#define | SCOM_THRCTL_T1_STOP 0x40000000 |
#define | SCOM_THRCTL_T2_STOP 0x20000000 |
#define | SCOM_THRCTL_T3_STOP 0x10000000 |
#define | SCOM_THRCTL_T0_STEP 0x08000000 |
#define | SCOM_THRCTL_T1_STEP 0x04000000 |
#define | SCOM_THRCTL_T2_STEP 0x02000000 |
#define | SCOM_THRCTL_T3_STEP 0x01000000 |
#define | SCOM_THRCTL_T0_RUN 0x00800000 |
#define | SCOM_THRCTL_T1_RUN 0x00400000 |
#define | SCOM_THRCTL_T2_RUN 0x00200000 |
#define | SCOM_THRCTL_T3_RUN 0x00100000 |
#define | SCOM_THRCTL_T0_PM 0x00080000 |
#define | SCOM_THRCTL_T1_PM 0x00040000 |
#define | SCOM_THRCTL_T2_PM 0x00020000 |
#define | SCOM_THRCTL_T3_PM 0x00010000 |
#define | SCOM_THRCTL_T0_UDE 0x00008000 |
#define | SCOM_THRCTL_T1_UDE 0x00004000 |
#define | SCOM_THRCTL_T2_UDE 0x00002000 |
#define | SCOM_THRCTL_T3_UDE 0x00001000 |
#define | SCOM_THRCTL_ASYNC_DIS 0x00000800 |
#define | SCOM_THRCTL_TB_DIS 0x00000400 |
#define | SCOM_THRCTL_DEC_DIS 0x00000200 |
#define | SCOM_THRCTL_AND 0x31 /* Thread Control and Status */ |
#define | SCOM_THRCTL_OR 0x32 /* Thread Control and Status */ |
Functions | |
int __devinit | a2_scom_startup_cpu (unsigned int lcpu, int thr_idx, struct device_node *np) |
#define SCOM_PCCR0 0x33 /* PC Configuration Register 0 */ |
Definition at line 48 of file scom_smp.c.
#define SCOM_PCCR0_ENABLE_DEBUG 0x80000000 |
Definition at line 49 of file scom_smp.c.
#define SCOM_PCCR0_ENABLE_RAM 0x40000000 |
Definition at line 50 of file scom_smp.c.
#define SCOM_RAMC 0x2a /* Ram Command */ |
Definition at line 26 of file scom_smp.c.
#define SCOM_RAMC_DONE 0x00000001 |
Definition at line 41 of file scom_smp.c.
#define SCOM_RAMC_ENABLE 0x00080000 |
Definition at line 31 of file scom_smp.c.
#define SCOM_RAMC_ERROR 0x00000002 |
Definition at line 40 of file scom_smp.c.
#define SCOM_RAMC_EXECUTE 0x00010000 |
Definition at line 33 of file scom_smp.c.
#define SCOM_RAMC_FLUSH 0x00000800 |
Definition at line 38 of file scom_smp.c.
#define SCOM_RAMC_FORCE 0x00001000 |
Definition at line 37 of file scom_smp.c.
#define SCOM_RAMC_INTERRUPT 0x00000004 |
Definition at line 39 of file scom_smp.c.
#define SCOM_RAMC_MSR_GS 0x00002000 |
Definition at line 36 of file scom_smp.c.
#define SCOM_RAMC_MSR_OVERRIDE 0x00008000 |
Definition at line 34 of file scom_smp.c.
#define SCOM_RAMC_MSR_PR 0x00004000 |
Definition at line 35 of file scom_smp.c.
#define SCOM_RAMC_SRC1_EXT 0x40000000 |
Definition at line 28 of file scom_smp.c.
#define SCOM_RAMC_SRC2_EXT 0x20000000 |
Definition at line 29 of file scom_smp.c.
#define SCOM_RAMC_SRC3_EXT 0x10000000 |
Definition at line 30 of file scom_smp.c.
#define SCOM_RAMC_TGT1_EXT 0x80000000 |
Definition at line 27 of file scom_smp.c.
#define SCOM_RAMC_THREADSEL 0x00060000 |
Definition at line 32 of file scom_smp.c.
#define SCOM_RAMD 0x2d /* Ram Data */ |
Definition at line 45 of file scom_smp.c.
#define SCOM_RAMDH 0x2e /* Ram Data High */ |
Definition at line 46 of file scom_smp.c.
#define SCOM_RAMDL 0x2f /* Ram Data Low */ |
Definition at line 47 of file scom_smp.c.
#define SCOM_RAMI 0x29 /* Ram Instruction */ |
Definition at line 42 of file scom_smp.c.
#define SCOM_RAMIC 0x28 /* Ram Instruction and Command */ |
Definition at line 43 of file scom_smp.c.
#define SCOM_RAMIC_INSN 0xffffffff00000000 |
Definition at line 44 of file scom_smp.c.
#define SCOM_THRCTL 0x30 /* Thread Control and Status */ |
Definition at line 51 of file scom_smp.c.
#define SCOM_THRCTL_AND 0x31 /* Thread Control and Status */ |
Definition at line 75 of file scom_smp.c.
#define SCOM_THRCTL_ASYNC_DIS 0x00000800 |
Definition at line 72 of file scom_smp.c.
#define SCOM_THRCTL_DEC_DIS 0x00000200 |
Definition at line 74 of file scom_smp.c.
#define SCOM_THRCTL_OR 0x32 /* Thread Control and Status */ |
Definition at line 76 of file scom_smp.c.
#define SCOM_THRCTL_T0_PM 0x00080000 |
Definition at line 64 of file scom_smp.c.
#define SCOM_THRCTL_T0_RUN 0x00800000 |
Definition at line 60 of file scom_smp.c.
#define SCOM_THRCTL_T0_STEP 0x08000000 |
Definition at line 56 of file scom_smp.c.
#define SCOM_THRCTL_T0_STOP 0x80000000 |
Definition at line 52 of file scom_smp.c.
#define SCOM_THRCTL_T0_UDE 0x00008000 |
Definition at line 68 of file scom_smp.c.
#define SCOM_THRCTL_T1_PM 0x00040000 |
Definition at line 65 of file scom_smp.c.
#define SCOM_THRCTL_T1_RUN 0x00400000 |
Definition at line 61 of file scom_smp.c.
#define SCOM_THRCTL_T1_STEP 0x04000000 |
Definition at line 57 of file scom_smp.c.
#define SCOM_THRCTL_T1_STOP 0x40000000 |
Definition at line 53 of file scom_smp.c.
#define SCOM_THRCTL_T1_UDE 0x00004000 |
Definition at line 69 of file scom_smp.c.
#define SCOM_THRCTL_T2_PM 0x00020000 |
Definition at line 66 of file scom_smp.c.
#define SCOM_THRCTL_T2_RUN 0x00200000 |
Definition at line 62 of file scom_smp.c.
#define SCOM_THRCTL_T2_STEP 0x02000000 |
Definition at line 58 of file scom_smp.c.
#define SCOM_THRCTL_T2_STOP 0x20000000 |
Definition at line 54 of file scom_smp.c.
#define SCOM_THRCTL_T2_UDE 0x00002000 |
Definition at line 70 of file scom_smp.c.
#define SCOM_THRCTL_T3_PM 0x00010000 |
Definition at line 67 of file scom_smp.c.
#define SCOM_THRCTL_T3_RUN 0x00100000 |
Definition at line 63 of file scom_smp.c.
#define SCOM_THRCTL_T3_STEP 0x01000000 |
Definition at line 59 of file scom_smp.c.
#define SCOM_THRCTL_T3_STOP 0x10000000 |
Definition at line 55 of file scom_smp.c.
#define SCOM_THRCTL_T3_UDE 0x00001000 |
Definition at line 71 of file scom_smp.c.
#define SCOM_THRCTL_TB_DIS 0x00000400 |
Definition at line 73 of file scom_smp.c.
Definition at line 340 of file scom_smp.c.