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sdrc.c File Reference
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/io.h>
#include "common.h"
#include <plat/clock.h>
#include <plat/sram.h>
#include <plat/sdrc.h>
#include "sdrc.h"

Go to the source code of this file.

Data Structures

struct  omap2_sms_regs
 

Macros

#define SDRC_POWER_EXTCLKDIS_SHIFT   3
 
#define SDRC_POWER_PWDENA_SHIFT   2
 
#define SDRC_POWER_PAGEPOLICY_SHIFT   0
 

Functions

void omap2_sms_save_context (void)
 
void omap2_sms_restore_context (void)
 
int omap2_sdrc_get_params (unsigned long r, struct omap_sdrc_params **sdrc_cs0, struct omap_sdrc_params **sdrc_cs1)
 
void __init omap2_set_globals_sdrc (struct omap_globals *omap2_globals)
 
void __init omap2_sdrc_init (struct omap_sdrc_params *sdrc_cs0, struct omap_sdrc_params *sdrc_cs1)
 
void omap2_sms_write_rot_control (u32 val, unsigned ctx)
 
void omap2_sms_write_rot_size (u32 val, unsigned ctx)
 
void omap2_sms_write_rot_physical_ba (u32 val, unsigned ctx)
 

Variables

void __iomemomap2_sdrc_base
 
void __iomemomap2_sms_base
 

Macro Definition Documentation

#define SDRC_POWER_EXTCLKDIS_SHIFT   3

Definition at line 45 of file sdrc.c.

#define SDRC_POWER_PAGEPOLICY_SHIFT   0

Definition at line 47 of file sdrc.c.

#define SDRC_POWER_PWDENA_SHIFT   2

Definition at line 46 of file sdrc.c.

Function Documentation

int omap2_sdrc_get_params ( unsigned long  r,
struct omap_sdrc_params **  sdrc_cs0,
struct omap_sdrc_params **  sdrc_cs1 
)

omap2_sdrc_get_params - return SDRC register values for a given clock rate : SDRC clock rate (in Hz) : chip select 0 ram timings ** : chip select 1 ram timings **

Return pre-calculated values for the SDRC_ACTIM_CTRLA, SDRC_ACTIM_CTRLB, SDRC_RFR_CTRL and SDRC_MR registers in sdrc_cs[01] structs,for a given SDRC clock rate 'r'. These parameters control various timing delays in the SDRAM controller that are expressed in terms of the number of SDRC clock cycles to wait; hence the clock rate dependency.

Supports 2 different timing parameters for both chip selects.

Note 1: the sdrc_init_params_cs[01] must be sorted rate descending. Note 2: If sdrc_init_params_cs_1 is not NULL it must be of same size as sdrc_init_params_cs_0.

Fills in the struct omap_sdrc_params * for each chip select. Returns 0 upon success or -1 upon failure.

Definition at line 91 of file sdrc.c.

void __init omap2_sdrc_init ( struct omap_sdrc_params sdrc_cs0,
struct omap_sdrc_params sdrc_cs1 
)

omap2_sdrc_init - initialize SMS, SDRC devices on boot [01]: pointers to a null-terminated list of struct omap_sdrc_params Support for 2 chip selects timings

Turn on smart idle modes for SDRAM scheduler and controller. Program a known-good configuration for the SDRC to deal with buggy bootloaders.

Definition at line 135 of file sdrc.c.

void __init omap2_set_globals_sdrc ( struct omap_globals omap2_globals)

Definition at line 118 of file sdrc.c.

void omap2_sms_restore_context ( void  )

omap2_sms_restore_context - Restore SMS registers

Restore SMS registers that need to be Restored after off mode.

Definition at line 64 of file sdrc.c.

void omap2_sms_save_context ( void  )

omap2_sms_save_context - Save SMS registers

Save SMS registers that need to be restored after off mode.

Definition at line 54 of file sdrc.c.

void omap2_sms_write_rot_control ( u32  val,
unsigned  ctx 
)

Definition at line 164 of file sdrc.c.

void omap2_sms_write_rot_physical_ba ( u32  val,
unsigned  ctx 
)

Definition at line 174 of file sdrc.c.

void omap2_sms_write_rot_size ( u32  val,
unsigned  ctx 
)

Definition at line 169 of file sdrc.c.

Variable Documentation

void __iomem* omap2_sdrc_base

Definition at line 35 of file sdrc.c.

void __iomem* omap2_sms_base

Definition at line 36 of file sdrc.c.