1 #ifndef _ASM_IA64_SN_SN_SAL_H
2 #define _ASM_IA64_SN_SN_SAL_H
17 #include <asm/sn/arch.h>
23 #define SN_SAL_POD_MODE 0x02000001
24 #define SN_SAL_SYSTEM_RESET 0x02000002
25 #define SN_SAL_PROBE 0x02000003
26 #define SN_SAL_GET_MASTER_NASID 0x02000004
27 #define SN_SAL_GET_KLCONFIG_ADDR 0x02000005
28 #define SN_SAL_LOG_CE 0x02000006
29 #define SN_SAL_REGISTER_CE 0x02000007
30 #define SN_SAL_GET_PARTITION_ADDR 0x02000009
31 #define SN_SAL_XP_ADDR_REGION 0x0200000f
32 #define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010
33 #define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011
34 #define SN_SAL_PRINT_ERROR 0x02000012
35 #define SN_SAL_REGISTER_PMI_HANDLER 0x02000014
36 #define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
37 #define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
38 #define SN_SAL_GET_SAPIC_INFO 0x0200001d
39 #define SN_SAL_GET_SN_INFO 0x0200001e
40 #define SN_SAL_CONSOLE_PUTC 0x02000021
41 #define SN_SAL_CONSOLE_GETC 0x02000022
42 #define SN_SAL_CONSOLE_PUTS 0x02000023
43 #define SN_SAL_CONSOLE_GETS 0x02000024
44 #define SN_SAL_CONSOLE_GETS_TIMEOUT 0x02000025
45 #define SN_SAL_CONSOLE_POLL 0x02000026
46 #define SN_SAL_CONSOLE_INTR 0x02000027
47 #define SN_SAL_CONSOLE_PUTB 0x02000028
48 #define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a
49 #define SN_SAL_CONSOLE_READC 0x0200002b
50 #define SN_SAL_SYSCTL_OP 0x02000030
51 #define SN_SAL_SYSCTL_MODID_GET 0x02000031
52 #define SN_SAL_SYSCTL_GET 0x02000032
53 #define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033
54 #define SN_SAL_SYSCTL_IO_PORTSPEED_GET 0x02000035
55 #define SN_SAL_SYSCTL_SLAB_GET 0x02000036
56 #define SN_SAL_BUS_CONFIG 0x02000037
57 #define SN_SAL_SYS_SERIAL_GET 0x02000038
58 #define SN_SAL_PARTITION_SERIAL_GET 0x02000039
59 #define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a
60 #define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b
61 #define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c
62 #define SN_SAL_COHERENCE 0x0200003d
63 #define SN_SAL_MEMPROTECT 0x0200003e
64 #define SN_SAL_SYSCTL_FRU_CAPTURE 0x0200003f
66 #define SN_SAL_SYSCTL_IOBRICK_PCI_OP 0x02000042 // reentrant
67 #define SN_SAL_IROUTER_OP 0x02000043
68 #define SN_SAL_SYSCTL_EVENT 0x02000044
69 #define SN_SAL_IOIF_INTERRUPT 0x0200004a
70 #define SN_SAL_HWPERF_OP 0x02000050 // lock
71 #define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
72 #define SN_SAL_IOIF_PCI_SAFE 0x02000052
73 #define SN_SAL_IOIF_SLOT_ENABLE 0x02000053
74 #define SN_SAL_IOIF_SLOT_DISABLE 0x02000054
75 #define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055
76 #define SN_SAL_IOIF_GET_PCIBUS_INFO 0x02000056
77 #define SN_SAL_IOIF_GET_PCIDEV_INFO 0x02000057
78 #define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058 // deprecated
79 #define SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST 0x0200005a
81 #define SN_SAL_IOIF_INIT 0x0200005f
82 #define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060
83 #define SN_SAL_BTE_RECOVER 0x02000061
84 #define SN_SAL_RESERVED_DO_NOT_USE 0x02000062
85 #define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000064
87 #define SN_SAL_GET_PROM_FEATURE_SET 0x02000065
88 #define SN_SAL_SET_OS_FEATURE_SET 0x02000066
89 #define SN_SAL_INJECT_ERROR 0x02000067
90 #define SN_SAL_SET_CPU_NUMBER 0x02000068
92 #define SN_SAL_KERNEL_LAUNCH_EVENT 0x02000069
93 #define SN_SAL_WATCHLIST_ALLOC 0x02000070
94 #define SN_SAL_WATCHLIST_FREE 0x02000071
102 #define SAL_CONSOLE_INTR_OFF 0
103 #define SAL_CONSOLE_INTR_ON 1
104 #define SAL_CONSOLE_INTR_STATUS 2
106 #define SAL_CONSOLE_INTR_XMIT 1
107 #define SAL_CONSOLE_INTR_RECV 2
110 #define SAL_INTR_ALLOC 1
111 #define SAL_INTR_FREE 2
112 #define SAL_INTR_REDIRECT 3
118 #define SAL_SYSCTL_OP_IOBOARD 0x0001
119 #define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002
124 #define SAL_IROUTER_OPEN 0
125 #define SAL_IROUTER_CLOSE 1
126 #define SAL_IROUTER_SEND 2
127 #define SAL_IROUTER_RECV 3
128 #define SAL_IROUTER_INTR_STATUS 4
131 #define SAL_IROUTER_INTR_ON 5
132 #define SAL_IROUTER_INTR_OFF 6
133 #define SAL_IROUTER_INIT 7
136 #define SAL_IROUTER_INTR_XMIT SAL_CONSOLE_INTR_XMIT
137 #define SAL_IROUTER_INTR_RECV SAL_CONSOLE_INTR_RECV
142 #define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1 // obsolete
143 #define SAL_ERR_FEAT_LOG_SBES 0x2 // obsolete
144 #define SAL_ERR_FEAT_MFR_OVERRIDE 0x4
145 #define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000
150 #define SALRET_MORE_PASSES 1
152 #define SALRET_NOT_IMPLEMENTED (-1)
153 #define SALRET_INVALID_ARG (-2)
154 #define SALRET_ERROR (-3)
156 #define SN_SAL_FAKE_PROM 0x02009999
180 ia64_sn_get_console_nasid(
void)
190 if (ret_stuff.status < 0)
191 return ret_stuff.status;
202 ia64_sn_get_master_baseio_nasid(
void)
212 if (ret_stuff.status < 0)
213 return ret_stuff.status;
220 ia64_sn_get_klconfig_addr(
nasid_t nasid)
229 return ret_stuff.v0 ?
__va(ret_stuff.v0) :
NULL;
236 ia64_sn_console_getc(
int *ch)
247 *ch = (
int)ret_stuff.v0;
249 return ret_stuff.status;
258 ia64_sn_console_readc(
void)
276 ia64_sn_console_putc(
char ch)
286 return ret_stuff.status;
293 ia64_sn_console_putb(
const char *
buf,
int len)
303 if ( ret_stuff.status == 0 ) {
313 ia64_sn_plat_specific_err_print(
int (*
hook)(
const char*, ...),
char *rec)
323 return ret_stuff.status;
330 ia64_sn_plat_cpei_handler(
void)
340 return ret_stuff.status;
347 ia64_sn_plat_set_error_handling_features(
void)
359 return ret_stuff.status;
366 ia64_sn_console_check(
int *
result)
377 *result = (
int)ret_stuff.v0;
379 return ret_stuff.status;
386 ia64_sn_console_intr_status(
void)
398 if (ret_stuff.status == 0) {
409 ia64_sn_console_intr_enable(
u64 intr)
426 ia64_sn_console_intr_disable(
u64 intr)
443 ia64_sn_console_xmit_chars(
char *buf,
int len)
455 if (ret_stuff.status == 0) {
466 ia64_sn_sysctl_iobrick_module_get(
nasid_t nasid,
int *
result)
477 *result = (
int)ret_stuff.v0;
479 return ret_stuff.status;
490 ia64_sn_pod_mode(
void)
518 ia64_sn_probe_mem(
long addr,
long size,
void *data_ptr)
527 *((
u8*)data_ptr) = (
u8)isrv.v0;
530 *((
u16*)data_ptr) = (
u16)isrv.v0;
533 *((
u32*)data_ptr) = (
u32)isrv.v0;
536 *((
u64*)data_ptr) = (
u64)isrv.v0;
549 ia64_sn_sys_serial_get(
char *buf)
553 return ret_stuff.status;
560 sn_system_serial_number(
void) {
561 if (sn_system_serial_number_string[0]) {
562 return(sn_system_serial_number_string);
564 ia64_sn_sys_serial_get(sn_system_serial_number_string);
565 return(sn_system_serial_number_string);
575 ia64_sn_partition_serial_get(
void)
580 if (ret_stuff.status != 0)
586 sn_partition_serial_number_val(
void) {
587 if (
unlikely(sn_partition_serial_number == 0)) {
588 sn_partition_serial_number = ia64_sn_partition_serial_get();
598 ia64_sn_sysctl_partition_get(
nasid_t nasid)
603 if (ret_stuff.status != 0)
629 *addr, buf, *len, 0, 0, 0);
656 (
u64)operation, 0, 0, 0, 0);
657 return ret_stuff.status;
671 int virtual,
int operation)
682 return ret_stuff.status;
696 sn_register_pmi_handler(
u64 handler,
u64 global_pointer)
700 global_pointer, 0, 0, 0, 0, 0);
701 return ret_stuff.status;
718 sn_change_coherence(
u64 *new_domain,
u64 *old_domain)
722 (
u64)old_domain, 0, 0, 0, 0, 0);
723 return ret_stuff.status;
732 sn_change_memprotect(
u64 paddr,
u64 len,
u64 perms,
u64 *nasid_array)
737 (
u64)nasid_array, perms, 0, 0, 0);
738 return ret_stuff.status;
740 #define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
741 #define SN_MEMPROT_ACCESS_CLASS_1 0x2520c2
742 #define SN_MEMPROT_ACCESS_CLASS_2 0x14a1ca
743 #define SN_MEMPROT_ACCESS_CLASS_3 0x14a290
744 #define SN_MEMPROT_ACCESS_CLASS_6 0x084080
745 #define SN_MEMPROT_ACCESS_CLASS_7 0x021080
751 ia64_sn_power_down(
void)
767 ia64_sn_fru_capture(
void)
788 bus, (
u64) slot, 0, 0);
801 ia64_sn_irtr_open(
nasid_t nasid)
813 ia64_sn_irtr_close(
nasid_t nasid,
int subch)
817 (
u64) nasid, (
u64) subch, 0, 0, 0, 0);
830 ia64_sn_irtr_recv(
nasid_t nasid,
int subch,
char *buf,
int *len)
848 ia64_sn_irtr_send(
nasid_t nasid,
int subch,
char *buf,
int len)
864 ia64_sn_irtr_intr(
nasid_t nasid,
int subch)
868 (
u64) nasid, (
u64) subch, 0, 0, 0, 0);
881 (
u64) nasid, (
u64) subch, intr, 0, 0, 0);
890 ia64_sn_irtr_intr_disable(
nasid_t nasid,
int subch,
u64 intr)
894 (
u64) nasid, (
u64) subch, intr, 0, 0, 0);
903 ia64_sn_sysctl_event_init(
nasid_t nasid)
916 ia64_sn_sysctl_tio_clock_reset(
nasid_t nasid)
920 nasid, 0, 0, 0, 0, 0);
933 ia64_sn_sysctl_ioboard_get(
nasid_t nasid,
u16 *ioboard)
937 nasid, 0, 0, 0, 0, 0);
969 ia64_sn_get_fit_compt(
u64 nasid,
u64 index,
void *fitentry,
void *banbuf,
974 banbuf, banlen, 0, 0);
986 ia64_sn_irtr_init(
nasid_t nasid,
void *buf,
int len)
990 (
u64) nasid, (
u64) buf, (
u64) len, 0, 0, 0);
1006 ia64_sn_get_sapic_info(
int sapicid,
int *nasid,
int *subnode,
int *
slice)
1018 if (nasid) *nasid = sapicid & 0xfff;
1019 if (subnode) *subnode = (sapicid >> 13) & 1;
1020 if (slice) *slice = (sapicid >> 12) & 3;
1025 if (ret_stuff.status < 0)
1026 return ret_stuff.status;
1028 if (nasid) *nasid = (
int) ret_stuff.v0;
1029 if (subnode) *subnode = (
int) ret_stuff.v1;
1030 if (slice) *slice = (
int) ret_stuff.v2;
1053 ia64_sn_get_sn_info(
int fc,
u8 *shubtype,
u16 *nasid_bitmask,
u8 *nasid_shift,
1067 #define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL
1068 #define SH_SHUB_ID_NODES_PER_BIT_SHFT 48
1069 if (shubtype) *shubtype = 0;
1070 if (nasid_bitmask) *nasid_bitmask = 0x7ff;
1071 if (nasid_shift) *nasid_shift = 38;
1072 if (systemsize) *systemsize = 10;
1073 if (sharing_domain_size) *sharing_domain_size = 8;
1074 if (partid) *partid = ia64_sn_sysctl_partition_get(nasid);
1075 if (coher) *coher = nasid >> 9;
1077 SH_SHUB_ID_NODES_PER_BIT_SHFT;
1082 if (ret_stuff.status < 0)
1083 return ret_stuff.status;
1085 if (shubtype) *shubtype = ret_stuff.v0 & 0xff;
1086 if (systemsize) *systemsize = (ret_stuff.v0 >> 8) & 0xff;
1087 if (sharing_domain_size) *sharing_domain_size = (ret_stuff.v0 >> 16) & 0xff;
1088 if (partid) *partid = (ret_stuff.v0 >> 24) & 0xff;
1089 if (coher) *coher = (ret_stuff.v0 >> 32) & 0xff;
1090 if (reg) *reg = (ret_stuff.v0 >> 40) & 0xff;
1091 if (nasid_bitmask) *nasid_bitmask = (ret_stuff.v1 & 0xffff);
1092 if (nasid_shift) *nasid_shift = (ret_stuff.v1 >> 16) & 0xff;
1107 opcode, a0, a1, a2, a3, a4);
1114 ia64_sn_ioif_get_pci_topology(
u64 buf,
u64 len)
1125 ia64_sn_bte_recovery(
nasid_t nasid)
1137 ia64_sn_is_fake_prom(
void)
1145 ia64_sn_get_prom_feature_set(
int set,
unsigned long *feature_set)
1152 *feature_set = rv.
v0;
1157 ia64_sn_set_os_feature(
int feature)
1171 (
u64)ecc, 0, 0, 0, 0);
1172 return ret_stuff.status;
1176 ia64_sn_set_cpu_number(
int cpu)
1184 ia64_sn_kernel_launch_event(
void)
1201 sn_mq_watchlist_alloc(
int blade,
void *mq,
unsigned int mq_size,
1202 unsigned long *intr_mmr_offset)
1209 addr = (
unsigned long)mq;
1210 size_blade.
size = mq_size;
1211 size_blade.blade =
blade;
1217 size_blade.val, (
u64)intr_mmr_offset,
1218 (
u64)&watchlist, 0, 0, 0);
1226 sn_mq_watchlist_free(
int blade,
int watchlist_num)
1230 watchlist_num, 0, 0, 0, 0, 0);