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#define DW_SPI_BAUDR 0x14 |
#define DW_SPI_CTRL0 0x00 |
#define DW_SPI_CTRL1 0x04 |
#define DW_SPI_DMACR 0x4c |
#define DW_SPI_DMARDLR 0x54 |
#define DW_SPI_DMATDLR 0x50 |
#define DW_SPI_MSTICR 0x44 |
#define DW_SPI_RXFLR 0x24 |
#define DW_SPI_RXFLTR 0x1c |
#define DW_SPI_RXOICR 0x3c |
#define DW_SPI_RXUICR 0x40 |
#define DW_SPI_SSIENR 0x08 |
#define DW_SPI_TXFLR 0x20 |
#define DW_SPI_TXFLTR 0x18 |
#define DW_SPI_TXOICR 0x38 |
#define DW_SPI_VERSION 0x5c |
#define SPI_CFS_OFFSET 12 |
#define SPI_FRF_MICROWIRE 0x2 |
#define SPI_INT_MSTI (1 << 5) |
#define SPI_INT_RXFI (1 << 4) |
#define SPI_INT_RXOI (1 << 3) |
#define SPI_INT_RXUI (1 << 2) |
#define SPI_INT_THRESHOLD 32 |
#define SPI_INT_TXEI (1 << 0) |
#define SPI_INT_TXOI (1 << 1) |
#define SPI_MODE_OFFSET 6 |
#define SPI_SCOL_OFFSET 7 |
#define SPI_SCPH_OFFSET 6 |
#define SPI_SLVOE_OFFSET 10 |
#define SPI_SRL_OFFSET 11 |
#define SPI_TMOD_EPROMREAD 0x3 /* eeprom read mode */ |
#define SPI_TMOD_MASK (0x3 << SPI_TMOD_OFFSET) |
#define SPI_TMOD_OFFSET 8 |
#define SPI_TMOD_RO 0x2 /* recv only */ |
#define SPI_TMOD_TO 0x1 /* xmit only */ |
#define SPI_TMOD_TR 0x0 /* xmit & recv */ |
#define SR_MASK 0x7f /* cover 7 bits */ |
#define SR_RF_FULL (1 << 4) |
#define SR_RF_NOT_EMPT (1 << 3) |
#define SR_TF_EMPT (1 << 2) |
#define SR_TF_NOT_FULL (1 << 1) |
#define SR_TX_ERR (1 << 5) |
- Enumerator:
SSI_MOTO_SPI |
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SSI_TI_SSP |
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SSI_NS_MICROWIRE |
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Definition at line 79 of file spi-dw.h.