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spi-fsl-lib.c
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1 /*
2  * Freescale SPI/eSPI controller driver library.
3  *
4  * Maintainer: Kumar Gala
5  *
6  * Copyright (C) 2006 Polycom, Inc.
7  *
8  * CPM SPI and QE buffer descriptors mode support:
9  * Copyright (c) 2009 MontaVista Software, Inc.
10  * Author: Anton Vorontsov <[email protected]>
11  *
12  * Copyright 2010 Freescale Semiconductor, Inc.
13  *
14  * This program is free software; you can redistribute it and/or modify it
15  * under the terms of the GNU General Public License as published by the
16  * Free Software Foundation; either version 2 of the License, or (at your
17  * option) any later version.
18  */
19 #include <linux/kernel.h>
20 #include <linux/interrupt.h>
21 #include <linux/fsl_devices.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/mm.h>
24 #include <linux/of_platform.h>
25 #include <linux/spi/spi.h>
26 #include <sysdev/fsl_soc.h>
27 
28 #include "spi-fsl-lib.h"
29 
30 #define MPC8XXX_SPI_RX_BUF(type) \
31 void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
32 { \
33  type *rx = mpc8xxx_spi->rx; \
34  *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \
35  mpc8xxx_spi->rx = rx; \
36 }
37 
38 #define MPC8XXX_SPI_TX_BUF(type) \
39 u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
40 { \
41  u32 data; \
42  const type *tx = mpc8xxx_spi->tx; \
43  if (!tx) \
44  return 0; \
45  data = *tx++ << mpc8xxx_spi->tx_shift; \
46  mpc8xxx_spi->tx = tx; \
47  return data; \
48 }
49 
56 
58 {
59  return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
60 }
61 
63 {
64  struct mpc8xxx_spi *mpc8xxx_spi = container_of(work, struct mpc8xxx_spi,
65  work);
66 
67  spin_lock_irq(&mpc8xxx_spi->lock);
68  while (!list_empty(&mpc8xxx_spi->queue)) {
69  struct spi_message *m = container_of(mpc8xxx_spi->queue.next,
70  struct spi_message, queue);
71 
72  list_del_init(&m->queue);
73  spin_unlock_irq(&mpc8xxx_spi->lock);
74 
75  if (mpc8xxx_spi->spi_do_one_msg)
76  mpc8xxx_spi->spi_do_one_msg(m);
77 
78  spin_lock_irq(&mpc8xxx_spi->lock);
79  }
80  spin_unlock_irq(&mpc8xxx_spi->lock);
81 }
82 
84  struct spi_message *m)
85 {
86  struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
87  unsigned long flags;
88 
89  m->actual_length = 0;
90  m->status = -EINPROGRESS;
91 
92  spin_lock_irqsave(&mpc8xxx_spi->lock, flags);
93  list_add_tail(&m->queue, &mpc8xxx_spi->queue);
94  queue_work(mpc8xxx_spi->workqueue, &mpc8xxx_spi->work);
95  spin_unlock_irqrestore(&mpc8xxx_spi->lock, flags);
96 
97  return 0;
98 }
99 
101 {
102  kfree(spi->controller_state);
103 }
104 
105 const char *mpc8xxx_spi_strmode(unsigned int flags)
106 {
107  if (flags & SPI_QE_CPU_MODE) {
108  return "QE CPU";
109  } else if (flags & SPI_CPM_MODE) {
110  if (flags & SPI_QE)
111  return "QE";
112  else if (flags & SPI_CPM2)
113  return "CPM2";
114  else
115  return "CPM1";
116  }
117  return "CPU";
118 }
119 
120 int mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
121  unsigned int irq)
122 {
124  struct spi_master *master;
125  struct mpc8xxx_spi *mpc8xxx_spi;
126  int ret = 0;
127 
128  master = dev_get_drvdata(dev);
129 
130  /* the spi->mode bits understood by this driver: */
131  master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
133 
134  master->transfer = mpc8xxx_spi_transfer;
135  master->cleanup = mpc8xxx_spi_cleanup;
136  master->dev.of_node = dev->of_node;
137 
138  mpc8xxx_spi = spi_master_get_devdata(master);
139  mpc8xxx_spi->dev = dev;
140  mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
141  mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
142  mpc8xxx_spi->flags = pdata->flags;
143  mpc8xxx_spi->spibrg = pdata->sysclk;
144  mpc8xxx_spi->irq = irq;
145 
146  mpc8xxx_spi->rx_shift = 0;
147  mpc8xxx_spi->tx_shift = 0;
148 
149  init_completion(&mpc8xxx_spi->done);
150 
151  master->bus_num = pdata->bus_num;
152  master->num_chipselect = pdata->max_chipselect;
153 
154  spin_lock_init(&mpc8xxx_spi->lock);
155  init_completion(&mpc8xxx_spi->done);
156  INIT_WORK(&mpc8xxx_spi->work, mpc8xxx_spi_work);
157  INIT_LIST_HEAD(&mpc8xxx_spi->queue);
158 
160  dev_name(master->dev.parent));
161  if (mpc8xxx_spi->workqueue == NULL) {
162  ret = -EBUSY;
163  goto err;
164  }
165 
166  return 0;
167 
168 err:
169  return ret;
170 }
171 
173 {
174  struct mpc8xxx_spi *mpc8xxx_spi;
175  struct spi_master *master;
176 
177  master = dev_get_drvdata(dev);
178  mpc8xxx_spi = spi_master_get_devdata(master);
179 
180  flush_workqueue(mpc8xxx_spi->workqueue);
181  destroy_workqueue(mpc8xxx_spi->workqueue);
182  spi_unregister_master(master);
183 
184  free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
185 
186  if (mpc8xxx_spi->spi_remove)
187  mpc8xxx_spi->spi_remove(mpc8xxx_spi);
188 
189  return 0;
190 }
191 
193 {
194  struct device *dev = &ofdev->dev;
195  struct device_node *np = ofdev->dev.of_node;
198  const void *prop;
199  int ret = -ENOMEM;
200 
201  pinfo = kzalloc(sizeof(*pinfo), GFP_KERNEL);
202  if (!pinfo)
203  return -ENOMEM;
204 
205  pdata = &pinfo->pdata;
206  dev->platform_data = pdata;
207 
208  /* Allocate bus num dynamically. */
209  pdata->bus_num = -1;
210 
211  /* SPI controller is either clocked from QE or SoC clock. */
212  pdata->sysclk = get_brgfreq();
213  if (pdata->sysclk == -1) {
214  pdata->sysclk = fsl_get_sys_freq();
215  if (pdata->sysclk == -1) {
216  ret = -ENODEV;
217  goto err;
218  }
219  }
220 
221  prop = of_get_property(np, "mode", NULL);
222  if (prop && !strcmp(prop, "cpu-qe"))
223  pdata->flags = SPI_QE_CPU_MODE;
224  else if (prop && !strcmp(prop, "qe"))
225  pdata->flags = SPI_CPM_MODE | SPI_QE;
226  else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
227  pdata->flags = SPI_CPM_MODE | SPI_CPM2;
228  else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
229  pdata->flags = SPI_CPM_MODE | SPI_CPM1;
230 
231  return 0;
232 
233 err:
234  kfree(pinfo);
235  return ret;
236 }