Data Fields
struct dma_chan	chan

struct ep93xx_dma_engine *	edma

void __iomem *	regs

int	irq

struct clk *	clk

struct tasklet_struct	tasklet

spinlock_t	lock

unsigned long	flags

int	buffer

struct list_head	active

struct list_head	queue

struct list_head	free_list

u32	runtime_addr

u32	runtime_ctrl

Detailed Description

struct ep93xx_dma_chan - an EP93xx DMA M2P/M2M channel : dmaengine API channel : pointer to to the engine device : memory mapped registers : interrupt number of the channel : clock used by this channel : channel specific tasklet used for callbacks : lock protecting the fields following : flags for the channel : which buffer to use next (0/1) : flattened chain of descriptors currently being processed : pending descriptors which are handled next : list of free descriptors which can be used : physical address currently used as dest/src (M2M only). This is set via DMA_SLAVE_CONFIG before slave operation is prepared : M2M runtime values for the control register.

As EP93xx DMA controller doesn't support real chained DMA descriptors we will have slightly different scheme here: points to a head of flattened DMA descriptor chain.

holds pending transactions. These are linked through the first descriptor in the chain. When a descriptor is moved to the queue, the first and chained descriptors are flattened into a single list.

.private holds pointer to &struct ep93xx_dma_data which contains necessary channel configuration information. For memcpy channels this must be NULL.

Definition at line 163 of file ep93xx_dma.c.