#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/mfd/core.h>
#include <linux/mfd/tmio.h>
#include <linux/mfd/tc6393xb.h>
#include <linux/gpio.h>
#include <linux/slab.h>

Data Structures
struct	tc6393xb

Macros
#define	SCR_REVID 0x08 /* b Revision ID */

#define	SCR_ISR 0x50 /* b Interrupt Status */

#define	SCR_IMR 0x52 /* b Interrupt Mask */

#define	SCR_IRR 0x54 /* b Interrupt Routing */

#define	SCR_GPER 0x60 /* w GP Enable */

#define	SCR_GPI_SR(i) (0x64 + (i)) /* b3 GPI Status */

#define	SCR_GPI_IMR(i) (0x68 + (i)) /* b3 GPI INT Mask */

#define	SCR_GPI_EDER(i) (0x6c + (i)) /* b3 GPI Edge Detect Enable */

#define	SCR_GPI_LIR(i) (0x70 + (i)) /* b3 GPI Level Invert */

#define	SCR_GPO_DSR(i) (0x78 + (i)) /* b3 GPO Data Set */

#define	SCR_GPO_DOECR(i) (0x7c + (i)) /* b3 GPO Data OE Control */

#define	SCR_GP_IARCR(i) (0x80 + (i)) /* b3 GP Internal Active Register Control */

#define	SCR_GP_IARLCR(i) (0x84 + (i)) /* b3 GP INTERNAL Active Register Level Control */

#define	SCR_GPI_BCR(i) (0x88 + (i)) /* b3 GPI Buffer Control */

#define	SCR_GPA_IARCR 0x8c /* w GPa Internal Active Register Control */

#define	SCR_GPA_IARLCR 0x90 /* w GPa Internal Active Register Level Control */

#define	SCR_GPA_BCR 0x94 /* w GPa Buffer Control */

#define	SCR_CCR 0x98 /* w Clock Control */

#define	SCR_PLL2CR 0x9a /* w PLL2 Control */

#define	SCR_PLL1CR 0x9c /* l PLL1 Control */

#define	SCR_DIARCR 0xa0 /* b Device Internal Active Register Control */

#define	SCR_DBOCR 0xa1 /* b Device Buffer Off Control */

#define	SCR_FER 0xe0 /* b Function Enable */

#define	SCR_MCR 0xe4 /* w Mode Control */

#define	SCR_CONFIG 0xfc /* b Configuration Control */

#define	SCR_DEBUG 0xff /* b Debug */

#define	SCR_CCR_CK32K BIT(0)

#define	SCR_CCR_USBCK BIT(1)

#define	SCR_CCR_UNK1 BIT(4)

#define	SCR_CCR_MCLK_MASK (7 << 8)

#define	SCR_CCR_MCLK_OFF (0 << 8)

#define	SCR_CCR_MCLK_12 (1 << 8)

#define	SCR_CCR_MCLK_24 (2 << 8)

#define	SCR_CCR_MCLK_48 (3 << 8)

#define	SCR_CCR_HCLK_MASK (3 << 12)

#define	SCR_CCR_HCLK_24 (0 << 12)

#define	SCR_CCR_HCLK_48 (1 << 12)

#define	SCR_FER_USBEN BIT(0) /* USB host enable */

#define	SCR_FER_LCDCVEN BIT(1) /* polysilicon TFT enable */

#define	SCR_FER_SLCDEN BIT(2) /* SLCD enable */

#define	SCR_MCR_RDY_MASK (3 << 0)

#define	SCR_MCR_RDY_OPENDRAIN (0 << 0)

#define	SCR_MCR_RDY_TRISTATE (1 << 0)

#define	SCR_MCR_RDY_PUSHPULL (2 << 0)

#define	SCR_MCR_RDY_UNK BIT(2)

#define	SCR_MCR_RDY_EN BIT(3)

#define	SCR_MCR_INT_MASK (3 << 4)

#define	SCR_MCR_INT_OPENDRAIN (0 << 4)

#define	SCR_MCR_INT_TRISTATE (1 << 4)

#define	SCR_MCR_INT_PUSHPULL (2 << 4)

#define	SCR_MCR_INT_UNK BIT(6)

#define	SCR_MCR_INT_EN BIT(7)

#define	TC_GPIO_BIT(i) (1 << (i & 0x7))

#define	tc6393xb_suspend NULL

#define	tc6393xb_resume NULL

Enumerations
enum	{ TC6393XB_CELL_NAND, TC6393XB_CELL_MMC, TC6393XB_CELL_OHCI, TC6393XB_CELL_FB }

Functions
int	tc6393xb_lcd_set_power (struct platform_device *fb, bool on)

	EXPORT_SYMBOL (tc6393xb_lcd_set_power)

int	tc6393xb_lcd_mode (struct platform_device fb, const struct fb_videomode mode)

	EXPORT_SYMBOL (tc6393xb_lcd_mode)

	subsys_initcall (tc6393xb_init)

	module_exit (tc6393xb_exit)

	MODULE_LICENSE ("GPL v2")

	MODULE_AUTHOR ("Ian Molton, Dmitry Baryshkov and Dirk Opfer")

	MODULE_DESCRIPTION ("tc6393xb Toshiba Mobile IO Controller")

	MODULE_ALIAS ("platform:tc6393xb")

Macro Definition Documentation

#define SCR_CCR 0x98 /* w Clock Control */

Definition at line 47 of file tc6393xb.c.

#define SCR_CCR_CK32K BIT(0)

Definition at line 57 of file tc6393xb.c.

#define SCR_CCR_HCLK_24 (0 << 12)

Definition at line 66 of file tc6393xb.c.

#define SCR_CCR_HCLK_48 (1 << 12)

Definition at line 67 of file tc6393xb.c.

#define SCR_CCR_HCLK_MASK (3 << 12)

Definition at line 65 of file tc6393xb.c.

#define SCR_CCR_MCLK_12 (1 << 8)

Definition at line 62 of file tc6393xb.c.

#define SCR_CCR_MCLK_24 (2 << 8)

Definition at line 63 of file tc6393xb.c.

#define SCR_CCR_MCLK_48 (3 << 8)

Definition at line 64 of file tc6393xb.c.

#define SCR_CCR_MCLK_MASK (7 << 8)

Definition at line 60 of file tc6393xb.c.

#define SCR_CCR_MCLK_OFF (0 << 8)

Definition at line 61 of file tc6393xb.c.

#define SCR_CCR_UNK1 BIT(4)

Definition at line 59 of file tc6393xb.c.

#define SCR_CCR_USBCK BIT(1)

Definition at line 58 of file tc6393xb.c.

#define SCR_CONFIG 0xfc /* b Configuration Control */

Definition at line 54 of file tc6393xb.c.

#define SCR_DBOCR 0xa1 /* b Device Buffer Off Control */

Definition at line 51 of file tc6393xb.c.

#define SCR_DEBUG 0xff /* b Debug */

Definition at line 55 of file tc6393xb.c.

#define SCR_DIARCR 0xa0 /* b Device Internal Active Register Control */

Definition at line 50 of file tc6393xb.c.

#define SCR_FER 0xe0 /* b Function Enable */

Definition at line 52 of file tc6393xb.c.

#define SCR_FER_LCDCVEN BIT(1) /* polysilicon TFT enable */

Definition at line 70 of file tc6393xb.c.

#define SCR_FER_SLCDEN BIT(2) /* SLCD enable */

Definition at line 71 of file tc6393xb.c.

#define SCR_FER_USBEN BIT(0) /* USB host enable */

Definition at line 69 of file tc6393xb.c.

#define SCR_GP_IARCR ( i ) (0x80 + (i)) /* b3 GP Internal Active Register Control */

Definition at line 41 of file tc6393xb.c.

#define SCR_GP_IARLCR ( i ) (0x84 + (i)) /* b3 GP INTERNAL Active Register Level Control */

Definition at line 42 of file tc6393xb.c.

#define SCR_GPA_BCR 0x94 /* w GPa Buffer Control */

Definition at line 46 of file tc6393xb.c.

#define SCR_GPA_IARCR 0x8c /* w GPa Internal Active Register Control */

Definition at line 44 of file tc6393xb.c.

#define SCR_GPA_IARLCR 0x90 /* w GPa Internal Active Register Level Control */

Definition at line 45 of file tc6393xb.c.

#define SCR_GPER 0x60 /* w GP Enable */

Definition at line 34 of file tc6393xb.c.

#define SCR_GPI_BCR ( i ) (0x88 + (i)) /* b3 GPI Buffer Control */

Definition at line 43 of file tc6393xb.c.

#define SCR_GPI_EDER ( i ) (0x6c + (i)) /* b3 GPI Edge Detect Enable */

Definition at line 37 of file tc6393xb.c.

#define SCR_GPI_IMR ( i ) (0x68 + (i)) /* b3 GPI INT Mask */

Definition at line 36 of file tc6393xb.c.

#define SCR_GPI_LIR ( i ) (0x70 + (i)) /* b3 GPI Level Invert */

Definition at line 38 of file tc6393xb.c.

#define SCR_GPI_SR ( i ) (0x64 + (i)) /* b3 GPI Status */

Definition at line 35 of file tc6393xb.c.

#define SCR_GPO_DOECR ( i ) (0x7c + (i)) /* b3 GPO Data OE Control */

Definition at line 40 of file tc6393xb.c.

#define SCR_GPO_DSR ( i ) (0x78 + (i)) /* b3 GPO Data Set */

Definition at line 39 of file tc6393xb.c.

#define SCR_IMR 0x52 /* b Interrupt Mask */

Definition at line 32 of file tc6393xb.c.

#define SCR_IRR 0x54 /* b Interrupt Routing */

Definition at line 33 of file tc6393xb.c.

#define SCR_ISR 0x50 /* b Interrupt Status */

Definition at line 31 of file tc6393xb.c.

#define SCR_MCR 0xe4 /* w Mode Control */

Definition at line 53 of file tc6393xb.c.

#define SCR_MCR_INT_EN BIT(7)

Definition at line 84 of file tc6393xb.c.

#define SCR_MCR_INT_MASK (3 << 4)

Definition at line 79 of file tc6393xb.c.

#define SCR_MCR_INT_OPENDRAIN (0 << 4)

Definition at line 80 of file tc6393xb.c.

#define SCR_MCR_INT_PUSHPULL (2 << 4)

Definition at line 82 of file tc6393xb.c.

#define SCR_MCR_INT_TRISTATE (1 << 4)

Definition at line 81 of file tc6393xb.c.

#define SCR_MCR_INT_UNK BIT(6)

Definition at line 83 of file tc6393xb.c.

#define SCR_MCR_RDY_EN BIT(3)

Definition at line 78 of file tc6393xb.c.

#define SCR_MCR_RDY_MASK (3 << 0)

Definition at line 73 of file tc6393xb.c.

#define SCR_MCR_RDY_OPENDRAIN (0 << 0)

Definition at line 74 of file tc6393xb.c.

#define SCR_MCR_RDY_PUSHPULL (2 << 0)

Definition at line 76 of file tc6393xb.c.

#define SCR_MCR_RDY_TRISTATE (1 << 0)

Definition at line 75 of file tc6393xb.c.

#define SCR_MCR_RDY_UNK BIT(2)

Definition at line 77 of file tc6393xb.c.

#define SCR_PLL1CR 0x9c /* l PLL1 Control */

Definition at line 49 of file tc6393xb.c.

#define SCR_PLL2CR 0x9a /* w PLL2 Control */

Definition at line 48 of file tc6393xb.c.

#define SCR_REVID 0x08 /* b Revision ID */

Definition at line 30 of file tc6393xb.c.

#define tc6393xb_resume NULL

Definition at line 829 of file tc6393xb.c.

#define tc6393xb_suspend NULL

Definition at line 828 of file tc6393xb.c.

#define TC_GPIO_BIT ( i ) (1 << (i & 0x7))

Definition at line 87 of file tc6393xb.c.

Enumeration Type Documentation

anonymous enum

Enumerator:

TC6393XB_CELL_NAND
TC6393XB_CELL_MMC
TC6393XB_CELL_OHCI
TC6393XB_CELL_FB

Definition at line 114 of file tc6393xb.c.

Function Documentation

EXPORT_SYMBOL ( tc6393xb_lcd_set_power )

EXPORT_SYMBOL ( tc6393xb_lcd_mode )

MODULE_ALIAS ( "platform:tc6393xb" )

MODULE_AUTHOR	(	"Ian	Molton,
		Dmitry Baryshkov and Dirk Opfer"
	)

MODULE_DESCRIPTION ( "tc6393xb Toshiba Mobile IO Controller" )

module_exit ( tc6393xb_exit )

MODULE_LICENSE ( "GPL v2" )

subsys_initcall ( tc6393xb_init )

int tc6393xb_lcd_mode	(	struct platform_device *	fb,
		const struct fb_videomode *	mode
	)

Definition at line 324 of file tc6393xb.c.

int tc6393xb_lcd_set_power	(	struct platform_device *	fb,
		bool	on
	)

Definition at line 302 of file tc6393xb.c.

Data Structures

Macros

Enumerations

Functions

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation