#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spinlock.h>
#include <linux/slab.h>
#include <linux/vmalloc.h>
#include <linux/mm.h>
#include <linux/pagemap.h>
#include <linux/device.h>
#include <linux/sched.h>
#include <linux/iommu.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_iommu.h>
#include <linux/debugfs.h>
#include <linux/seq_file.h>
#include <asm/page.h>
#include <asm/cacheflush.h>
#include <mach/iomap.h>
#include <mach/tegra-ahb.h>

Data Structures
struct	smmu_client

struct	smmu_as

struct	smmu_debugfs_info

struct	smmu_device

Macros
#define	pr_fmt(fmt) "%s(): " fmt, __func__

#define	HWG_AFI (1 << HWGRP_AFI)

#define	HWG_AVPC (1 << HWGRP_AVPC)

#define	HWG_DC (1 << HWGRP_DC)

#define	HWG_DCB (1 << HWGRP_DCB)

#define	HWG_EPP (1 << HWGRP_EPP)

#define	HWG_G2 (1 << HWGRP_G2)

#define	HWG_HC (1 << HWGRP_HC)

#define	HWG_HDA (1 << HWGRP_HDA)

#define	HWG_ISP (1 << HWGRP_ISP)

#define	HWG_MPE (1 << HWGRP_MPE)

#define	HWG_NV (1 << HWGRP_NV)

#define	HWG_NV2 (1 << HWGRP_NV2)

#define	HWG_PPCS (1 << HWGRP_PPCS)

#define	HWG_SATA (1 << HWGRP_SATA)

#define	HWG_VDE (1 << HWGRP_VDE)

#define	HWG_VI (1 << HWGRP_VI)

#define	SMMU_IOMMU_PGSIZES (SZ_4K)

#define	SMMU_CONFIG 0x10

#define	SMMU_CONFIG_DISABLE 0

#define	SMMU_CONFIG_ENABLE 1

#define	SMMU_CACHE_CONFIG_BASE 0x14

#define	__SMMU_CACHE_CONFIG(mc, cache) (SMMU_CACHE_CONFIG_BASE + 4 * cache)

#define	SMMU_CACHE_CONFIG(cache) __SMMU_CACHE_CONFIG(_MC, cache)

#define	SMMU_CACHE_CONFIG_STATS_SHIFT 31

#define	SMMU_CACHE_CONFIG_STATS_ENABLE (1 << SMMU_CACHE_CONFIG_STATS_SHIFT)

#define	SMMU_CACHE_CONFIG_STATS_TEST_SHIFT 30

#define	SMMU_CACHE_CONFIG_STATS_TEST (1 << SMMU_CACHE_CONFIG_STATS_TEST_SHIFT)

#define	SMMU_TLB_CONFIG_HIT_UNDER_MISS__ENABLE (1 << 29)

#define	SMMU_TLB_CONFIG_ACTIVE_LINES__VALUE 0x10

#define	SMMU_TLB_CONFIG_RESET_VAL 0x20000010

#define	SMMU_PTC_CONFIG_CACHE__ENABLE (1 << 29)

#define	SMMU_PTC_CONFIG_INDEX_MAP__PATTERN 0x3f

#define	SMMU_PTC_CONFIG_RESET_VAL 0x2000003f

#define	SMMU_PTB_ASID 0x1c

#define	SMMU_PTB_ASID_CURRENT_SHIFT 0

#define	SMMU_PTB_DATA 0x20

#define	SMMU_PTB_DATA_RESET_VAL 0

#define	SMMU_PTB_DATA_ASID_NONSECURE_SHIFT 29

#define	SMMU_PTB_DATA_ASID_WRITABLE_SHIFT 30

#define	SMMU_PTB_DATA_ASID_READABLE_SHIFT 31

#define	SMMU_TLB_FLUSH 0x30

#define	SMMU_TLB_FLUSH_VA_MATCH_ALL 0

#define	SMMU_TLB_FLUSH_VA_MATCH_SECTION 2

#define	SMMU_TLB_FLUSH_VA_MATCH_GROUP 3

#define	SMMU_TLB_FLUSH_ASID_SHIFT 29

#define	SMMU_TLB_FLUSH_ASID_MATCH_DISABLE 0

#define	SMMU_TLB_FLUSH_ASID_MATCH_ENABLE 1

#define	SMMU_TLB_FLUSH_ASID_MATCH_SHIFT 31

#define	SMMU_PTC_FLUSH 0x34

#define	SMMU_PTC_FLUSH_TYPE_ALL 0

#define	SMMU_PTC_FLUSH_TYPE_ADR 1

#define	SMMU_PTC_FLUSH_ADR_SHIFT 4

#define	SMMU_ASID_SECURITY 0x38

#define	SMMU_STATS_CACHE_COUNT_BASE 0x1f0

#define	SMMU_STATS_CACHE_COUNT(mc, cache, hitmiss) (SMMU_STATS_CACHE_COUNT_BASE + 8 * cache + 4 * hitmiss)

#define	SMMU_TRANSLATION_ENABLE_0 0x228

#define	SMMU_TRANSLATION_ENABLE_1 0x22c

#define	SMMU_TRANSLATION_ENABLE_2 0x230

#define	SMMU_AFI_ASID 0x238 /* PCIE */

#define	SMMU_AVPC_ASID 0x23c /* AVP */

#define	SMMU_DC_ASID 0x240 /* Display controller */

#define	SMMU_DCB_ASID 0x244 /* Display controller B */

#define	SMMU_EPP_ASID 0x248 /* Encoder pre-processor */

#define	SMMU_G2_ASID 0x24c /* 2D engine */

#define	SMMU_HC_ASID 0x250 /* Host1x */

#define	SMMU_HDA_ASID 0x254 /* High-def audio */

#define	SMMU_ISP_ASID 0x258 /* Image signal processor */

#define	SMMU_MPE_ASID 0x264 /* MPEG encoder */

#define	SMMU_NV_ASID 0x268 /* (3D) */

#define	SMMU_NV2_ASID 0x26c /* (3D) */

#define	SMMU_PPCS_ASID 0x270 /* AHB */

#define	SMMU_SATA_ASID 0x278 /* SATA */

#define	SMMU_VDE_ASID 0x27c /* Video decoder */

#define	SMMU_VI_ASID 0x280 /* Video input */

#define	SMMU_PDE_NEXT_SHIFT 28

#define	SMMU_TLB_FLUSH_VA_SECTION__MASK 0xffc00000

#define	SMMU_TLB_FLUSH_VA_SECTION__SHIFT 12 /* right shift */

#define	SMMU_TLB_FLUSH_VA_GROUP__MASK 0xffffc000

#define	SMMU_TLB_FLUSH_VA_GROUP__SHIFT 12 /* right shift */

#define	SMMU_TLB_FLUSH_VA(iova, which)

#define	SMMU_PTB_ASID_CUR(n) ((n) << SMMU_PTB_ASID_CURRENT_SHIFT)

#define	SMMU_TLB_FLUSH_ASID_MATCH_disable

#define	SMMU_TLB_FLUSH_ASID_MATCH__ENABLE

#define	SMMU_PAGE_SHIFT 12

#define	SMMU_PAGE_SIZE (1 << SMMU_PAGE_SHIFT)

#define	SMMU_PAGE_MASK ((1 << SMMU_PAGE_SHIFT) - 1)

#define	SMMU_PDIR_COUNT 1024

#define	SMMU_PDIR_SIZE (sizeof(unsigned long) * SMMU_PDIR_COUNT)

#define	SMMU_PTBL_COUNT 1024

#define	SMMU_PTBL_SIZE (sizeof(unsigned long) * SMMU_PTBL_COUNT)

#define	SMMU_PDIR_SHIFT 12

#define	SMMU_PDE_SHIFT 12

#define	SMMU_PTE_SHIFT 12

#define	SMMU_PFN_MASK 0x000fffff

#define	SMMU_ADDR_TO_PFN(addr) ((addr) >> 12)

#define	SMMU_ADDR_TO_PDN(addr) ((addr) >> 22)

#define	SMMU_PDN_TO_ADDR(pdn) ((pdn) << 22)

#define	_READABLE (1 << SMMU_PTB_DATA_ASID_READABLE_SHIFT)

#define	_WRITABLE (1 << SMMU_PTB_DATA_ASID_WRITABLE_SHIFT)

#define	_NONSECURE (1 << SMMU_PTB_DATA_ASID_NONSECURE_SHIFT)

#define	_PDE_NEXT (1 << SMMU_PDE_NEXT_SHIFT)

#define	_MASK_ATTR (_READABLE \| _WRITABLE \| _NONSECURE)

#define	_PDIR_ATTR (_READABLE \| _WRITABLE \| _NONSECURE)

#define	_PDE_ATTR (_READABLE \| _WRITABLE \| _NONSECURE)

#define	_PDE_ATTR_N (_PDE_ATTR \| _PDE_NEXT)

#define	_PDE_VACANT(pdn) (((pdn) << 10) \| _PDE_ATTR)

#define	_PTE_ATTR (_READABLE \| _WRITABLE \| _NONSECURE)

#define	_PTE_VACANT(addr) (((addr) >> SMMU_PAGE_SHIFT) \| _PTE_ATTR)

#define	SMMU_MK_PDIR(page, attr) ((page_to_phys(page) >> SMMU_PDIR_SHIFT) \| (attr))

#define	SMMU_MK_PDE(page, attr) (unsigned long)((page_to_phys(page) >> SMMU_PDE_SHIFT) \| (attr))

#define	SMMU_EX_PTBL_PAGE(pde) pfn_to_page((unsigned long)(pde) & SMMU_PFN_MASK)

#define	SMMU_PFN_TO_PTE(pfn, attr) (unsigned long)((pfn) \| (attr))

#define	SMMU_ASID_ENABLE(asid) ((asid) \| (1 << 31))

#define	SMMU_ASID_DISABLE 0

#define	SMMU_ASID_ASID(n) ((n) & ~SMMU_ASID_ENABLE(0))

#define	NUM_SMMU_REG_BANKS 3

#define	smmu_client_enable_hwgrp(c, m) smmu_client_set_hwgrp(c, m, 1)

#define	smmu_client_disable_hwgrp(c) smmu_client_set_hwgrp(c, 0, 0)

#define	__smmu_client_enable_hwgrp(c, m) __smmu_client_set_hwgrp(c, m, 1)

#define	__smmu_client_disable_hwgrp(c) __smmu_client_set_hwgrp(c, 0, 0)

#define	HWGRP_INIT(client) [HWGRP_##client] = SMMU_##client##_ASID

#define	HWGRP_ASID_REG(x) (smmu_hwgrp_asid_reg[x])

#define	VA_PAGE_TO_PA(va, page) (page_to_phys(page) + ((unsigned long)(va) & ~PAGE_MASK))

#define	FLUSH_CPU_DCACHE(va, page, size)

#define	FLUSH_SMMU_REGS(smmu) smmu_read(smmu, SMMU_CONFIG)

#define	smmu_client_hwgrp(c) (u32)((c)->dev->platform_data)

Enumerations
enum	smmu_hwgrp { HWGRP_AFI, HWGRP_AVPC, HWGRP_DC, HWGRP_DCB, HWGRP_EPP, HWGRP_G2, HWGRP_HC, HWGRP_HDA, HWGRP_ISP, HWGRP_MPE, HWGRP_NV, HWGRP_NV2, HWGRP_PPCS, HWGRP_SATA, HWGRP_VDE, HWGRP_VI, HWGRP_COUNT, HWGRP_END = ~0 }

enum	{ _MC = 0 }

enum	{ _TLB = 0, _PTC }

Functions
	subsys_initcall (tegra_smmu_init)

	module_exit (tegra_smmu_exit)

	MODULE_DESCRIPTION ("IOMMU API for SMMU in Tegra30")

	MODULE_AUTHOR ("Hiroshi DOYU <[email protected]>")

	MODULE_ALIAS ("platform:tegra-smmu")

	MODULE_LICENSE ("GPL v2")

Variables
struct dev_pm_ops	tegra_smmu_pm_ops

Macro Definition Documentation

#define __SMMU_CACHE_CONFIG	(	mc,
		cache
	)	(SMMU_CACHE_CONFIG_BASE + 4 * cache)

Definition at line 102 of file tegra-smmu.c.

#define __smmu_client_disable_hwgrp ( c ) __smmu_client_set_hwgrp(c, 0, 0)

Definition at line 237 of file tegra-smmu.c.

#define __smmu_client_enable_hwgrp	(	c,
		m
	)	__smmu_client_set_hwgrp(c, m, 1)

Definition at line 236 of file tegra-smmu.c.

#define _MASK_ATTR (_READABLE | _WRITABLE | _NONSECURE)

Definition at line 209 of file tegra-smmu.c.

#define _NONSECURE (1 << SMMU_PTB_DATA_ASID_NONSECURE_SHIFT)

Definition at line 207 of file tegra-smmu.c.

#define _PDE_ATTR (_READABLE | _WRITABLE | _NONSECURE)

Definition at line 213 of file tegra-smmu.c.

#define _PDE_ATTR_N (_PDE_ATTR | _PDE_NEXT)

Definition at line 214 of file tegra-smmu.c.

#define _PDE_NEXT (1 << SMMU_PDE_NEXT_SHIFT)

Definition at line 208 of file tegra-smmu.c.

#define _PDE_VACANT ( pdn ) (((pdn) << 10) | _PDE_ATTR)

Definition at line 215 of file tegra-smmu.c.

#define _PDIR_ATTR (_READABLE | _WRITABLE | _NONSECURE)

Definition at line 211 of file tegra-smmu.c.

#define _PTE_ATTR (_READABLE | _WRITABLE | _NONSECURE)

Definition at line 217 of file tegra-smmu.c.

#define _PTE_VACANT ( addr ) (((addr) >> SMMU_PAGE_SHIFT) | _PTE_ATTR)

Definition at line 218 of file tegra-smmu.c.

#define _READABLE (1 << SMMU_PTB_DATA_ASID_READABLE_SHIFT)

Definition at line 205 of file tegra-smmu.c.

#define _WRITABLE (1 << SMMU_PTB_DATA_ASID_WRITABLE_SHIFT)

Definition at line 206 of file tegra-smmu.c.

#define FLUSH_CPU_DCACHE	(	va,
		page,
		size
	)

Value:

do {    \
        unsigned long _pa_ = VA_PAGE_TO_PA(va, page);       \
        __cpuc_flush_dcache_area((void *)(va), (size_t)(size)); \
        outer_flush_range(_pa_, _pa_+(size_t)(size));       \
    } while (0)

Definition at line 365 of file tegra-smmu.c.

#define FLUSH_SMMU_REGS ( smmu ) smmu_read(smmu, SMMU_CONFIG)

Definition at line 378 of file tegra-smmu.c.

#define HWG_AFI (1 << HWGRP_AFI)

Definition at line 67 of file tegra-smmu.c.

#define HWG_AVPC (1 << HWGRP_AVPC)

Definition at line 68 of file tegra-smmu.c.

#define HWG_DC (1 << HWGRP_DC)

Definition at line 69 of file tegra-smmu.c.

#define HWG_DCB (1 << HWGRP_DCB)

Definition at line 70 of file tegra-smmu.c.

#define HWG_EPP (1 << HWGRP_EPP)

Definition at line 71 of file tegra-smmu.c.

#define HWG_G2 (1 << HWGRP_G2)

Definition at line 72 of file tegra-smmu.c.

#define HWG_HC (1 << HWGRP_HC)

Definition at line 73 of file tegra-smmu.c.

#define HWG_HDA (1 << HWGRP_HDA)

Definition at line 74 of file tegra-smmu.c.

#define HWG_ISP (1 << HWGRP_ISP)

Definition at line 75 of file tegra-smmu.c.

#define HWG_MPE (1 << HWGRP_MPE)

Definition at line 76 of file tegra-smmu.c.

#define HWG_NV (1 << HWGRP_NV)

Definition at line 77 of file tegra-smmu.c.

#define HWG_NV2 (1 << HWGRP_NV2)

Definition at line 78 of file tegra-smmu.c.

#define HWG_PPCS (1 << HWGRP_PPCS)

Definition at line 79 of file tegra-smmu.c.

#define HWG_SATA (1 << HWGRP_SATA)

Definition at line 80 of file tegra-smmu.c.

#define HWG_VDE (1 << HWGRP_VDE)

Definition at line 81 of file tegra-smmu.c.

#define HWG_VI (1 << HWGRP_VI)

Definition at line 82 of file tegra-smmu.c.

#define HWGRP_ASID_REG ( x ) (smmu_hwgrp_asid_reg[x])

Definition at line 259 of file tegra-smmu.c.

#define HWGRP_INIT ( client ) [HWGRP_##client] = SMMU_##client##_ASID

Definition at line 239 of file tegra-smmu.c.

#define NUM_SMMU_REG_BANKS 3

Definition at line 232 of file tegra-smmu.c.

#define pr_fmt ( fmt ) "%s(): " fmt, __func__

Definition at line 20 of file tegra-smmu.c.

#define SMMU_ADDR_TO_PDN ( addr ) ((addr) >> 22)

Definition at line 202 of file tegra-smmu.c.

#define SMMU_ADDR_TO_PFN ( addr ) ((addr) >> 12)

Definition at line 201 of file tegra-smmu.c.

#define SMMU_AFI_ASID 0x238 /* PCIE */

Definition at line 152 of file tegra-smmu.c.

#define SMMU_ASID_ASID ( n ) ((n) & ~SMMU_ASID_ENABLE(0))

Definition at line 230 of file tegra-smmu.c.

#define SMMU_ASID_DISABLE 0

Definition at line 229 of file tegra-smmu.c.

#define SMMU_ASID_ENABLE ( asid ) ((asid) | (1 << 31))

Definition at line 228 of file tegra-smmu.c.

#define SMMU_ASID_SECURITY 0x38

Definition at line 141 of file tegra-smmu.c.

#define SMMU_AVPC_ASID 0x23c /* AVP */

Definition at line 153 of file tegra-smmu.c.

#define SMMU_CACHE_CONFIG ( cache ) __SMMU_CACHE_CONFIG(_MC, cache)

Definition at line 103 of file tegra-smmu.c.

#define SMMU_CACHE_CONFIG_BASE 0x14

Definition at line 101 of file tegra-smmu.c.

#define SMMU_CACHE_CONFIG_STATS_ENABLE (1 << SMMU_CACHE_CONFIG_STATS_SHIFT)

Definition at line 106 of file tegra-smmu.c.

#define SMMU_CACHE_CONFIG_STATS_SHIFT 31

Definition at line 105 of file tegra-smmu.c.

#define SMMU_CACHE_CONFIG_STATS_TEST (1 << SMMU_CACHE_CONFIG_STATS_TEST_SHIFT)

Definition at line 108 of file tegra-smmu.c.

#define SMMU_CACHE_CONFIG_STATS_TEST_SHIFT 30

Definition at line 107 of file tegra-smmu.c.

#define smmu_client_disable_hwgrp ( c ) smmu_client_set_hwgrp(c, 0, 0)

Definition at line 235 of file tegra-smmu.c.

#define smmu_client_enable_hwgrp	(	c,
		m
	)	smmu_client_set_hwgrp(c, m, 1)

Definition at line 234 of file tegra-smmu.c.

#define smmu_client_hwgrp ( c ) (u32)((c)->dev->platform_data)

Definition at line 380 of file tegra-smmu.c.

#define SMMU_CONFIG 0x10

Definition at line 87 of file tegra-smmu.c.

#define SMMU_CONFIG_DISABLE 0

Definition at line 88 of file tegra-smmu.c.

#define SMMU_CONFIG_ENABLE 1

Definition at line 89 of file tegra-smmu.c.

#define SMMU_DC_ASID 0x240 /* Display controller */

Definition at line 154 of file tegra-smmu.c.

#define SMMU_DCB_ASID 0x244 /* Display controller B */

Definition at line 155 of file tegra-smmu.c.

#define SMMU_EPP_ASID 0x248 /* Encoder pre-processor */

Definition at line 156 of file tegra-smmu.c.

#define SMMU_EX_PTBL_PAGE ( pde ) pfn_to_page((unsigned long)(pde) & SMMU_PFN_MASK)

Definition at line 224 of file tegra-smmu.c.

#define SMMU_G2_ASID 0x24c /* 2D engine */

Definition at line 157 of file tegra-smmu.c.

#define SMMU_HC_ASID 0x250 /* Host1x */

Definition at line 158 of file tegra-smmu.c.

#define SMMU_HDA_ASID 0x254 /* High-def audio */

Definition at line 159 of file tegra-smmu.c.

#define SMMU_IOMMU_PGSIZES (SZ_4K)

Definition at line 85 of file tegra-smmu.c.

#define SMMU_ISP_ASID 0x258 /* Image signal processor */

Definition at line 160 of file tegra-smmu.c.

#define SMMU_MK_PDE	(	page,
		attr
	)	(unsigned long)((page_to_phys(page) >> SMMU_PDE_SHIFT) \| (attr))

Definition at line 222 of file tegra-smmu.c.

#define SMMU_MK_PDIR	(	page,
		attr
	)	((page_to_phys(page) >> SMMU_PDIR_SHIFT) \| (attr))

Definition at line 220 of file tegra-smmu.c.

#define SMMU_MPE_ASID 0x264 /* MPEG encoder */

Definition at line 161 of file tegra-smmu.c.

#define SMMU_NV2_ASID 0x26c /* (3D) */

Definition at line 163 of file tegra-smmu.c.

#define SMMU_NV_ASID 0x268 /* (3D) */

Definition at line 162 of file tegra-smmu.c.

#define SMMU_PAGE_MASK ((1 << SMMU_PAGE_SHIFT) - 1)

Definition at line 190 of file tegra-smmu.c.

#define SMMU_PAGE_SHIFT 12

Definition at line 188 of file tegra-smmu.c.

#define SMMU_PAGE_SIZE (1 << SMMU_PAGE_SHIFT)

Definition at line 189 of file tegra-smmu.c.

#define SMMU_PDE_NEXT_SHIFT 28

Definition at line 169 of file tegra-smmu.c.

#define SMMU_PDE_SHIFT 12

Definition at line 197 of file tegra-smmu.c.

#define SMMU_PDIR_COUNT 1024

Definition at line 192 of file tegra-smmu.c.

#define SMMU_PDIR_SHIFT 12

Definition at line 196 of file tegra-smmu.c.

#define SMMU_PDIR_SIZE (sizeof(unsigned long) * SMMU_PDIR_COUNT)

Definition at line 193 of file tegra-smmu.c.

#define SMMU_PDN_TO_ADDR ( pdn ) ((pdn) << 22)

Definition at line 203 of file tegra-smmu.c.

#define SMMU_PFN_MASK 0x000fffff

Definition at line 199 of file tegra-smmu.c.

#define SMMU_PFN_TO_PTE	(	pfn,
		attr
	)	(unsigned long)((pfn) \| (attr))

Definition at line 226 of file tegra-smmu.c.

#define SMMU_PPCS_ASID 0x270 /* AHB */

Definition at line 164 of file tegra-smmu.c.

#define SMMU_PTB_ASID 0x1c

Definition at line 118 of file tegra-smmu.c.

#define SMMU_PTB_ASID_CUR ( n ) ((n) << SMMU_PTB_ASID_CURRENT_SHIFT)

Definition at line 179 of file tegra-smmu.c.

#define SMMU_PTB_ASID_CURRENT_SHIFT 0

Definition at line 119 of file tegra-smmu.c.

#define SMMU_PTB_DATA 0x20

Definition at line 121 of file tegra-smmu.c.

#define SMMU_PTB_DATA_ASID_NONSECURE_SHIFT 29

Definition at line 123 of file tegra-smmu.c.

#define SMMU_PTB_DATA_ASID_READABLE_SHIFT 31

Definition at line 125 of file tegra-smmu.c.

#define SMMU_PTB_DATA_ASID_WRITABLE_SHIFT 30

Definition at line 124 of file tegra-smmu.c.

#define SMMU_PTB_DATA_RESET_VAL 0

Definition at line 122 of file tegra-smmu.c.

#define SMMU_PTBL_COUNT 1024

Definition at line 194 of file tegra-smmu.c.

#define SMMU_PTBL_SIZE (sizeof(unsigned long) * SMMU_PTBL_COUNT)

Definition at line 195 of file tegra-smmu.c.

#define SMMU_PTC_CONFIG_CACHE__ENABLE (1 << 29)

Definition at line 114 of file tegra-smmu.c.

#define SMMU_PTC_CONFIG_INDEX_MAP__PATTERN 0x3f

Definition at line 115 of file tegra-smmu.c.

#define SMMU_PTC_CONFIG_RESET_VAL 0x2000003f

Definition at line 116 of file tegra-smmu.c.

#define SMMU_PTC_FLUSH 0x34

Definition at line 136 of file tegra-smmu.c.

#define SMMU_PTC_FLUSH_ADR_SHIFT 4

Definition at line 139 of file tegra-smmu.c.

#define SMMU_PTC_FLUSH_TYPE_ADR 1

Definition at line 138 of file tegra-smmu.c.

#define SMMU_PTC_FLUSH_TYPE_ALL 0

Definition at line 137 of file tegra-smmu.c.

#define SMMU_PTE_SHIFT 12

Definition at line 198 of file tegra-smmu.c.

#define SMMU_SATA_ASID 0x278 /* SATA */

Definition at line 165 of file tegra-smmu.c.

#define SMMU_STATS_CACHE_COUNT	(	mc,
		cache,
		hitmiss
	)	(SMMU_STATS_CACHE_COUNT_BASE + 8 * cache + 4 * hitmiss)

Definition at line 145 of file tegra-smmu.c.

#define SMMU_STATS_CACHE_COUNT_BASE 0x1f0

Definition at line 143 of file tegra-smmu.c.

#define SMMU_TLB_CONFIG_ACTIVE_LINES__VALUE 0x10

Definition at line 111 of file tegra-smmu.c.

#define SMMU_TLB_CONFIG_HIT_UNDER_MISS__ENABLE (1 << 29)

Definition at line 110 of file tegra-smmu.c.

#define SMMU_TLB_CONFIG_RESET_VAL 0x20000010

Definition at line 112 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH 0x30

Definition at line 127 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_ASID_MATCH__ENABLE

Value:

(SMMU_TLB_FLUSH_ASID_MATCH_ENABLE << \

SMMU_TLB_FLUSH_ASID_MATCH_SHIFT)

Definition at line 184 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_ASID_MATCH_DISABLE 0

Definition at line 132 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_ASID_MATCH_disable

Value:

(SMMU_TLB_FLUSH_ASID_MATCH_DISABLE << \

SMMU_TLB_FLUSH_ASID_MATCH_SHIFT)

Definition at line 181 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_ASID_MATCH_ENABLE 1

Definition at line 133 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_ASID_MATCH_SHIFT 31

Definition at line 134 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_ASID_SHIFT 29

Definition at line 131 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_VA	(	iova,
		which
	)

Value:

((((iova) & SMMU_TLB_FLUSH_VA_##which##__MASK) >> \
        SMMU_TLB_FLUSH_VA_##which##__SHIFT) |   \
    SMMU_TLB_FLUSH_VA_MATCH_##which)

Definition at line 175 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_VA_GROUP__MASK 0xffffc000

Definition at line 173 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_VA_GROUP__SHIFT 12 /* right shift */

Definition at line 174 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_VA_MATCH_ALL 0

Definition at line 128 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_VA_MATCH_GROUP 3

Definition at line 130 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_VA_MATCH_SECTION 2

Definition at line 129 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_VA_SECTION__MASK 0xffc00000

Definition at line 171 of file tegra-smmu.c.

#define SMMU_TLB_FLUSH_VA_SECTION__SHIFT 12 /* right shift */

Definition at line 172 of file tegra-smmu.c.

#define SMMU_TRANSLATION_ENABLE_0 0x228

Definition at line 148 of file tegra-smmu.c.

#define SMMU_TRANSLATION_ENABLE_1 0x22c

Definition at line 149 of file tegra-smmu.c.

#define SMMU_TRANSLATION_ENABLE_2 0x230

Definition at line 150 of file tegra-smmu.c.

#define SMMU_VDE_ASID 0x27c /* Video decoder */

Definition at line 166 of file tegra-smmu.c.

#define SMMU_VI_ASID 0x280 /* Video input */

Definition at line 167 of file tegra-smmu.c.

#define VA_PAGE_TO_PA	(	va,
		page
	)	(page_to_phys(page) + ((unsigned long)(va) & ~PAGE_MASK))

Definition at line 362 of file tegra-smmu.c.

Enumeration Type Documentation

anonymous enum

Enumerator:

_MC

Definition at line 92 of file tegra-smmu.c.

anonymous enum

Enumerator:

_TLB
_PTC

Definition at line 96 of file tegra-smmu.c.

enum smmu_hwgrp

Enumerator:

HWGRP_AFI
HWGRP_AVPC
HWGRP_DC
HWGRP_DCB
HWGRP_EPP
HWGRP_G2
HWGRP_HC
HWGRP_HDA
HWGRP_ISP
HWGRP_MPE
HWGRP_NV
HWGRP_NV2
HWGRP_PPCS
HWGRP_SATA
HWGRP_VDE
HWGRP_VI
HWGRP_COUNT
HWGRP_END

Definition at line 44 of file tegra-smmu.c.

Function Documentation

MODULE_ALIAS ( "platform:tegra-smmu" )

MODULE_AUTHOR ( "Hiroshi DOYU <[email protected]>" )

MODULE_DESCRIPTION ( "IOMMU API for SMMU in Tegra30" )

module_exit ( tegra_smmu_exit )

MODULE_LICENSE ( "GPL v2" )

subsys_initcall ( tegra_smmu_init )

Variable Documentation

struct dev_pm_ops tegra_smmu_pm_ops

Initial value:

= {
    .suspend    = tegra_smmu_suspend,
    .resume     = tegra_smmu_resume,
}

Definition at line 1255 of file tegra-smmu.c.

Data Structures

Macros

Enumerations

Functions

Variables

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation

Variable Documentation