#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/io.h>
#include <linux/irqdomain.h>
#include <linux/of.h>
#include <asm/mach/irq.h>
#include <asm/exception.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include <mach/irqs.h>
#include "irq-common.h"
Go to the source code of this file.
#define TZIC_DSMINT 0x0014 /* DSM interrupt Holdoffregister */ |
#define TZIC_ENCLEAR0 |
( |
|
i | ) |
(0x0180 + ((i) << 2)) /* Enable Clear Reg 0 */ |
#define TZIC_ENSET0 |
( |
|
i | ) |
(0x0100 + ((i) << 2)) /* Enable Set Reg 0 */ |
#define TZIC_HIPND |
( |
|
i | ) |
(0x0D80+ ((i) << 2)) /* High Priority Pending Register */ |
#define TZIC_ID0 0x0FD0 /* Indentification Register 0 */ |
#define TZIC_IMPID 0x0008 /* Distributor Implementer Identification */ |
#define TZIC_INTCNTL 0x0000 /* Control register */ |
#define TZIC_INTSEC0 |
( |
|
i | ) |
(0x0080 + ((i) << 2)) /* Interrupt Security Reg 0 */ |
#define TZIC_INTTYPE 0x0004 /* Controller Type register */ |
#define tzic_irq_resume NULL |
#define tzic_irq_suspend NULL |
#define TZIC_NUM_IRQS 128 |
#define TZIC_PND0 0x0D00 /* Pending Register 0 */ |
#define TZIC_PRIOMASK 0x000C /* Priority Mask Reg */ |
#define TZIC_PRIORITY0 0x0400 /* Priority Register 0 */ |
#define tzic_set_irq_fiq NULL |
#define TZIC_SRCCLAR0 0x0280 /* Source Clear Register 0 */ |
#define TZIC_SRCSET0 0x0200 /* Source Set Register 0 */ |
#define TZIC_SWINT 0x0F00 /* Software Interrupt Rigger Register */ |
#define TZIC_SYNCCTRL 0x0010 /* Synchronizer Control register */ |
#define TZIC_WAKEUP0 |
( |
|
i | ) |
(0x0E00 + ((i) << 2)) /* Wakeup Config Register */ |
tzic_enable_wake() - enable wakeup interrupt
- Returns
- 0 if successful; non-zero otherwise
This function provides an interrupt synchronization point that is required by tzic enabled platforms before entering imx specific low power modes (ie, those low power modes beyond the WAIT_CLOCKED basic ARM WFI only mode).
Definition at line 211 of file tzic.c.