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gcc_intrin.h File Reference
#include <linux/types.h>
#include <linux/compiler.h>

Go to the source code of this file.

Macros

#define ASM_SUPPORTED
 
#define ia64_barrier()   asm volatile ("":::"memory")
 
#define ia64_stop()   asm volatile (";;"::)
 
#define ia64_invala_gr(regnum)   asm volatile ("invala.e r%0" :: "i"(regnum))
 
#define ia64_invala_fr(regnum)   asm volatile ("invala.e f%0" :: "i"(regnum))
 
#define ia64_flushrs()   asm volatile ("flushrs;;":::"memory")
 
#define ia64_loadrs()   asm volatile ("loadrs;;":::"memory")
 
#define ia64_native_setreg(regnum, val)
 
#define ia64_native_getreg(regnum)
 
#define ia64_hint_pause   0
 
#define ia64_hint(mode)
 
#define ia64_mux1_brcst   0
 
#define ia64_mux1_mix   8
 
#define ia64_mux1_shuf   9
 
#define ia64_mux1_alt   10
 
#define ia64_mux1_rev   11
 
#define ia64_mux1(x, mode)
 
#define ia64_popcnt(x)
 
#define ia64_getf_exp(x)
 
#define ia64_shrp(a, b, count)
 
#define ia64_ldfs(regnum, x)
 
#define ia64_ldfd(regnum, x)
 
#define ia64_ldfe(regnum, x)
 
#define ia64_ldf8(regnum, x)
 
#define ia64_ldf_fill(regnum, x)
 
#define ia64_st4_rel_nta(m, val)
 
#define ia64_stfs(x, regnum)
 
#define ia64_stfd(x, regnum)
 
#define ia64_stfe(x, regnum)
 
#define ia64_stf8(x, regnum)
 
#define ia64_stf_spill(x, regnum)
 
#define ia64_fetchadd4_acq(p, inc)
 
#define ia64_fetchadd4_rel(p, inc)
 
#define ia64_fetchadd8_acq(p, inc)
 
#define ia64_fetchadd8_rel(p, inc)
 
#define ia64_xchg1(ptr, x)
 
#define ia64_xchg2(ptr, x)
 
#define ia64_xchg4(ptr, x)
 
#define ia64_xchg8(ptr, x)
 
#define ia64_cmpxchg1_acq(ptr, new, old)
 
#define ia64_cmpxchg1_rel(ptr, new, old)
 
#define ia64_cmpxchg2_acq(ptr, new, old)
 
#define ia64_cmpxchg2_rel(ptr, new, old)
 
#define ia64_cmpxchg4_acq(ptr, new, old)
 
#define ia64_cmpxchg4_rel(ptr, new, old)
 
#define ia64_cmpxchg8_acq(ptr, new, old)
 
#define ia64_cmpxchg8_rel(ptr, new, old)
 
#define ia64_mf()   asm volatile ("mf" ::: "memory")
 
#define ia64_mfa()   asm volatile ("mf.a" ::: "memory")
 
#define ia64_invala()   asm volatile ("invala" ::: "memory")
 
#define ia64_native_thash(addr)
 
#define ia64_srlz_i()   asm volatile (";; srlz.i ;;" ::: "memory")
 
#define ia64_srlz_d()   asm volatile (";; srlz.d" ::: "memory");
 
#define ia64_dv_serialize_data()
 
#define ia64_dv_serialize_instruction()
 
#define ia64_nop(x)   asm volatile ("nop %0"::"i"(x));
 
#define ia64_itci(addr)   asm volatile ("itc.i %0;;" :: "r"(addr) : "memory")
 
#define ia64_itcd(addr)   asm volatile ("itc.d %0;;" :: "r"(addr) : "memory")
 
#define ia64_itri(trnum, addr)
 
#define ia64_itrd(trnum, addr)
 
#define ia64_tpa(addr)
 
#define __ia64_set_dbr(index, val)   asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")
 
#define ia64_set_ibr(index, val)   asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")
 
#define ia64_set_pkr(index, val)   asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")
 
#define ia64_set_pmc(index, val)   asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")
 
#define ia64_set_pmd(index, val)   asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
 
#define ia64_native_set_rr(index, val)   asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
 
#define ia64_native_get_cpuid(index)
 
#define __ia64_get_dbr(index)
 
#define ia64_get_ibr(index)
 
#define ia64_get_pkr(index)
 
#define ia64_get_pmc(index)
 
#define ia64_native_get_pmd(index)
 
#define ia64_native_get_rr(index)
 
#define ia64_native_fc(addr)   asm volatile ("fc %0" :: "r"(addr) : "memory")
 
#define ia64_sync_i()   asm volatile (";; sync.i" ::: "memory")
 
#define ia64_native_ssm(mask)   asm volatile ("ssm %0":: "i"((mask)) : "memory")
 
#define ia64_native_rsm(mask)   asm volatile ("rsm %0":: "i"((mask)) : "memory")
 
#define ia64_sum(mask)   asm volatile ("sum %0":: "i"((mask)) : "memory")
 
#define ia64_rum(mask)   asm volatile ("rum %0":: "i"((mask)) : "memory")
 
#define ia64_ptce(addr)   asm volatile ("ptc.e %0" :: "r"(addr))
 
#define ia64_native_ptcga(addr, size)
 
#define ia64_ptcl(addr, size)
 
#define ia64_ptri(addr, size)   asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")
 
#define ia64_ptrd(addr, size)   asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")
 
#define ia64_ttag(addr)
 
#define ia64_lfhint_none   0
 
#define ia64_lfhint_nt1   1
 
#define ia64_lfhint_nt2   2
 
#define ia64_lfhint_nta   3
 
#define ia64_lfetch(lfhint, y)
 
#define ia64_lfetch_excl(lfhint, y)
 
#define ia64_lfetch_fault(lfhint, y)
 
#define ia64_lfetch_fault_excl(lfhint, y)
 
#define ia64_native_intrin_local_irq_restore(x)
 

Functions

void ia64_bad_param_for_setreg (void)
 
void ia64_bad_param_for_getreg (void)
 

Macro Definition Documentation

#define __ia64_get_dbr (   index)
Value:
({ \
unsigned long ia64_intri_res; \
asm volatile ("mov %0=dbr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
ia64_intri_res; \
})

Definition at line 449 of file gcc_intrin.h.

#define __ia64_set_dbr (   index,
  val 
)    asm volatile ("mov dbr[%0]=%1" :: "r"(index), "r"(val) : "memory")

Definition at line 424 of file gcc_intrin.h.

#define ASM_SUPPORTED

Definition at line 13 of file gcc_intrin.h.

#define ia64_barrier ( )    asm volatile ("":::"memory")

Definition at line 17 of file gcc_intrin.h.

#define ia64_cmpxchg1_acq (   ptr,
  new,
  old 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
asm volatile ("cmpxchg1.acq %0=[%1],%2,ar.ccv": \
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
ia64_intri_res; \
})

Definition at line 307 of file gcc_intrin.h.

#define ia64_cmpxchg1_rel (   ptr,
  new,
  old 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
asm volatile ("cmpxchg1.rel %0=[%1],%2,ar.ccv": \
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
ia64_intri_res; \
})

Definition at line 316 of file gcc_intrin.h.

#define ia64_cmpxchg2_acq (   ptr,
  new,
  old 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
asm volatile ("cmpxchg2.acq %0=[%1],%2,ar.ccv": \
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
ia64_intri_res; \
})

Definition at line 325 of file gcc_intrin.h.

#define ia64_cmpxchg2_rel (   ptr,
  new,
  old 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
\
asm volatile ("cmpxchg2.rel %0=[%1],%2,ar.ccv": \
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
ia64_intri_res; \
})

Definition at line 334 of file gcc_intrin.h.

#define ia64_cmpxchg4_acq (   ptr,
  new,
  old 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
asm volatile ("cmpxchg4.acq %0=[%1],%2,ar.ccv": \
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
ia64_intri_res; \
})

Definition at line 344 of file gcc_intrin.h.

#define ia64_cmpxchg4_rel (   ptr,
  new,
  old 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
asm volatile ("cmpxchg4.rel %0=[%1],%2,ar.ccv": \
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
ia64_intri_res; \
})

Definition at line 353 of file gcc_intrin.h.

#define ia64_cmpxchg8_acq (   ptr,
  new,
  old 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
asm volatile ("cmpxchg8.acq %0=[%1],%2,ar.ccv": \
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
ia64_intri_res; \
})

Definition at line 362 of file gcc_intrin.h.

#define ia64_cmpxchg8_rel (   ptr,
  new,
  old 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("mov ar.ccv=%0;;" :: "rO"(old)); \
\
asm volatile ("cmpxchg8.rel %0=[%1],%2,ar.ccv": \
"=r"(ia64_intri_res) : "r"(ptr), "r"(new) : "memory"); \
ia64_intri_res; \
})

Definition at line 371 of file gcc_intrin.h.

#define ia64_dv_serialize_data ( )

Definition at line 400 of file gcc_intrin.h.

#define ia64_dv_serialize_instruction ( )

Definition at line 401 of file gcc_intrin.h.

#define ia64_fetchadd4_acq (   p,
  inc 
)
Value:
({ \
\
__u64 ia64_intri_res; \
asm volatile ("fetchadd4.acq %0=[%1],%2" \
: "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
: "memory"); \
\
ia64_intri_res; \
})

Definition at line 233 of file gcc_intrin.h.

#define ia64_fetchadd4_rel (   p,
  inc 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("fetchadd4.rel %0=[%1],%2" \
: "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
: "memory"); \
\
ia64_intri_res; \
})

Definition at line 244 of file gcc_intrin.h.

#define ia64_fetchadd8_acq (   p,
  inc 
)
Value:
({ \
\
__u64 ia64_intri_res; \
asm volatile ("fetchadd8.acq %0=[%1],%2" \
: "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
: "memory"); \
\
ia64_intri_res; \
})

Definition at line 254 of file gcc_intrin.h.

#define ia64_fetchadd8_rel (   p,
  inc 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("fetchadd8.rel %0=[%1],%2" \
: "=r"(ia64_intri_res) : "r"(p), "i" (inc) \
: "memory"); \
\
ia64_intri_res; \
})

Definition at line 265 of file gcc_intrin.h.

#define ia64_flushrs ( )    asm volatile ("flushrs;;":::"memory")

Definition at line 25 of file gcc_intrin.h.

#define ia64_get_ibr (   index)
Value:
({ \
unsigned long ia64_intri_res; \
asm volatile ("mov %0=ibr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
ia64_intri_res; \
})

Definition at line 456 of file gcc_intrin.h.

#define ia64_get_pkr (   index)
Value:
({ \
unsigned long ia64_intri_res; \
asm volatile ("mov %0=pkr[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
ia64_intri_res; \
})

Definition at line 463 of file gcc_intrin.h.

#define ia64_get_pmc (   index)
Value:
({ \
unsigned long ia64_intri_res; \
asm volatile ("mov %0=pmc[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
ia64_intri_res; \
})

Definition at line 470 of file gcc_intrin.h.

#define ia64_getf_exp (   x)
Value:
({ \
long ia64_intri_res; \
\
asm ("getf.exp %0=%1" : "=r"(ia64_intri_res) : "f"(x)); \
\
ia64_intri_res; \
})

Definition at line 152 of file gcc_intrin.h.

#define ia64_hint (   mode)
Value:
({ \
switch (mode) { \
case ia64_hint_pause: \
asm volatile ("hint @pause" ::: "memory"); \
break; \
} \
})

Definition at line 99 of file gcc_intrin.h.

#define ia64_hint_pause   0

Definition at line 97 of file gcc_intrin.h.

#define ia64_invala ( )    asm volatile ("invala" ::: "memory")

Definition at line 384 of file gcc_intrin.h.

#define ia64_invala_fr (   regnum)    asm volatile ("invala.e f%0" :: "i"(regnum))

Definition at line 23 of file gcc_intrin.h.

#define ia64_invala_gr (   regnum)    asm volatile ("invala.e r%0" :: "i"(regnum))

Definition at line 21 of file gcc_intrin.h.

#define ia64_itcd (   addr)    asm volatile ("itc.d %0;;" :: "r"(addr) : "memory")

Definition at line 408 of file gcc_intrin.h.

#define ia64_itci (   addr)    asm volatile ("itc.i %0;;" :: "r"(addr) : "memory")

Definition at line 406 of file gcc_intrin.h.

#define ia64_itrd (   trnum,
  addr 
)
Value:
asm volatile ("itr.d dtr[%0]=%1" \
:: "r"(trnum), "r"(addr) : "memory")

Definition at line 414 of file gcc_intrin.h.

#define ia64_itri (   trnum,
  addr 
)
Value:
asm volatile ("itr.i itr[%0]=%1" \
:: "r"(trnum), "r"(addr) : "memory")

Definition at line 411 of file gcc_intrin.h.

#define ia64_ldf8 (   regnum,
  x 
)
Value:
({ \
register double __f__ asm ("f"#regnum); \
asm volatile ("ldf8 %0=[%1]" :"=f"(__f__): "r"(x)); \
})

Definition at line 186 of file gcc_intrin.h.

#define ia64_ldf_fill (   regnum,
  x 
)
Value:
({ \
register double __f__ asm ("f"#regnum); \
asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
})

Definition at line 192 of file gcc_intrin.h.

#define ia64_ldfd (   regnum,
  x 
)
Value:
({ \
register double __f__ asm ("f"#regnum); \
asm volatile ("ldfd %0=[%1]" :"=f"(__f__): "r"(x)); \
})

Definition at line 174 of file gcc_intrin.h.

#define ia64_ldfe (   regnum,
  x 
)
Value:
({ \
register double __f__ asm ("f"#regnum); \
asm volatile ("ldfe %0=[%1]" :"=f"(__f__): "r"(x)); \
})

Definition at line 180 of file gcc_intrin.h.

#define ia64_ldfs (   regnum,
  x 
)
Value:
({ \
register double __f__ asm ("f"#regnum); \
asm volatile ("ldfs %0=[%1]" :"=f"(__f__): "r"(x)); \
})

Definition at line 168 of file gcc_intrin.h.

#define ia64_lfetch (   lfhint,
  y 
)
Value:
({ \
switch (lfhint) { \
case ia64_lfhint_none: \
asm volatile ("lfetch [%0]" : : "r"(y)); \
break; \
case ia64_lfhint_nt1: \
asm volatile ("lfetch.nt1 [%0]" : : "r"(y)); \
break; \
case ia64_lfhint_nt2: \
asm volatile ("lfetch.nt2 [%0]" : : "r"(y)); \
break; \
case ia64_lfhint_nta: \
asm volatile ("lfetch.nta [%0]" : : "r"(y)); \
break; \
} \
})

Definition at line 537 of file gcc_intrin.h.

#define ia64_lfetch_excl (   lfhint,
  y 
)
Value:
({ \
switch (lfhint) { \
case ia64_lfhint_none: \
asm volatile ("lfetch.excl [%0]" :: "r"(y)); \
break; \
case ia64_lfhint_nt1: \
asm volatile ("lfetch.excl.nt1 [%0]" :: "r"(y)); \
break; \
case ia64_lfhint_nt2: \
asm volatile ("lfetch.excl.nt2 [%0]" :: "r"(y)); \
break; \
case ia64_lfhint_nta: \
asm volatile ("lfetch.excl.nta [%0]" :: "r"(y)); \
break; \
} \
})

Definition at line 555 of file gcc_intrin.h.

#define ia64_lfetch_fault (   lfhint,
  y 
)
Value:
({ \
switch (lfhint) { \
case ia64_lfhint_none: \
asm volatile ("lfetch.fault [%0]" : : "r"(y)); \
break; \
case ia64_lfhint_nt1: \
asm volatile ("lfetch.fault.nt1 [%0]" : : "r"(y)); \
break; \
case ia64_lfhint_nt2: \
asm volatile ("lfetch.fault.nt2 [%0]" : : "r"(y)); \
break; \
case ia64_lfhint_nta: \
asm volatile ("lfetch.fault.nta [%0]" : : "r"(y)); \
break; \
} \
})

Definition at line 573 of file gcc_intrin.h.

#define ia64_lfetch_fault_excl (   lfhint,
  y 
)
Value:
({ \
switch (lfhint) { \
case ia64_lfhint_none: \
asm volatile ("lfetch.fault.excl [%0]" :: "r"(y)); \
break; \
case ia64_lfhint_nt1: \
asm volatile ("lfetch.fault.excl.nt1 [%0]" :: "r"(y)); \
break; \
case ia64_lfhint_nt2: \
asm volatile ("lfetch.fault.excl.nt2 [%0]" :: "r"(y)); \
break; \
case ia64_lfhint_nta: \
asm volatile ("lfetch.fault.excl.nta [%0]" :: "r"(y)); \
break; \
} \
})

Definition at line 591 of file gcc_intrin.h.

#define ia64_lfhint_none   0

Definition at line 532 of file gcc_intrin.h.

#define ia64_lfhint_nt1   1

Definition at line 533 of file gcc_intrin.h.

#define ia64_lfhint_nt2   2

Definition at line 534 of file gcc_intrin.h.

#define ia64_lfhint_nta   3

Definition at line 535 of file gcc_intrin.h.

#define ia64_loadrs ( )    asm volatile ("loadrs;;":::"memory")

Definition at line 27 of file gcc_intrin.h.

#define ia64_mf ( )    asm volatile ("mf" ::: "memory")

Definition at line 381 of file gcc_intrin.h.

#define ia64_mfa ( )    asm volatile ("mf.a" ::: "memory")

Definition at line 382 of file gcc_intrin.h.

#define ia64_mux1 (   x,
  mode 
)
Value:
({ \
__u64 ia64_intri_res; \
\
switch (mode) { \
case ia64_mux1_brcst: \
asm ("mux1 %0=%1,@brcst" : "=r" (ia64_intri_res) : "r" (x)); \
break; \
case ia64_mux1_mix: \
asm ("mux1 %0=%1,@mix" : "=r" (ia64_intri_res) : "r" (x)); \
break; \
case ia64_mux1_shuf: \
asm ("mux1 %0=%1,@shuf" : "=r" (ia64_intri_res) : "r" (x)); \
break; \
case ia64_mux1_alt: \
asm ("mux1 %0=%1,@alt" : "=r" (ia64_intri_res) : "r" (x)); \
break; \
case ia64_mux1_rev: \
asm ("mux1 %0=%1,@rev" : "=r" (ia64_intri_res) : "r" (x)); \
break; \
} \
ia64_intri_res; \
})

Definition at line 116 of file gcc_intrin.h.

#define ia64_mux1_alt   10

Definition at line 113 of file gcc_intrin.h.

#define ia64_mux1_brcst   0

Definition at line 110 of file gcc_intrin.h.

#define ia64_mux1_mix   8

Definition at line 111 of file gcc_intrin.h.

#define ia64_mux1_rev   11

Definition at line 114 of file gcc_intrin.h.

#define ia64_mux1_shuf   9

Definition at line 112 of file gcc_intrin.h.

#define ia64_native_fc (   addr)    asm volatile ("fc %0" :: "r"(addr) : "memory")

Definition at line 492 of file gcc_intrin.h.

#define ia64_native_get_cpuid (   index)
Value:
({ \
unsigned long ia64_intri_res; \
asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \
ia64_intri_res; \
})

Definition at line 442 of file gcc_intrin.h.

#define ia64_native_get_pmd (   index)
Value:
({ \
unsigned long ia64_intri_res; \
asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
ia64_intri_res; \
})

Definition at line 478 of file gcc_intrin.h.

#define ia64_native_get_rr (   index)
Value:
({ \
unsigned long ia64_intri_res; \
asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \
ia64_intri_res; \
})

Definition at line 485 of file gcc_intrin.h.

#define ia64_native_getreg (   regnum)

Definition at line 62 of file gcc_intrin.h.

#define ia64_native_intrin_local_irq_restore (   x)
Value:
do { \
asm volatile (";; cmp.ne p6,p7=%0,r0;;" \
"(p6) ssm psr.i;" \
"(p7) rsm psr.i;;" \
"(p6) srlz.d" \
:: "r"((x)) : "p6", "p7", "memory"); \
} while (0)

Definition at line 609 of file gcc_intrin.h.

#define ia64_native_ptcga (   addr,
  size 
)
Value:
do { \
asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory"); \
ia64_dv_serialize_data(); \
} while (0)

Definition at line 504 of file gcc_intrin.h.

#define ia64_native_rsm (   mask)    asm volatile ("rsm %0":: "i"((mask)) : "memory")

Definition at line 498 of file gcc_intrin.h.

#define ia64_native_set_rr (   index,
  val 
)    asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");

Definition at line 439 of file gcc_intrin.h.

#define ia64_native_setreg (   regnum,
  val 
)
Value:
({ \
switch (regnum) { \
case _IA64_REG_PSR_L: \
asm volatile ("mov psr.l=%0" :: "r"(val) : "memory"); \
break; \
case _IA64_REG_AR_KR0 ... _IA64_REG_AR_EC: \
asm volatile ("mov ar%0=%1" :: \
"i" (regnum - _IA64_REG_AR_KR0), \
"r"(val): "memory"); \
break; \
case _IA64_REG_CR_DCR ... _IA64_REG_CR_LRR1: \
asm volatile ("mov cr%0=%1" :: \
"i" (regnum - _IA64_REG_CR_DCR), \
"r"(val): "memory" ); \
break; \
case _IA64_REG_SP: \
asm volatile ("mov r12=%0" :: \
"r"(val): "memory"); \
break; \
case _IA64_REG_GP: \
asm volatile ("mov gp=%0" :: "r"(val) : "memory"); \
break; \
default: \
ia64_bad_param_for_setreg(); \
break; \
} \
})

Definition at line 33 of file gcc_intrin.h.

#define ia64_native_ssm (   mask)    asm volatile ("ssm %0":: "i"((mask)) : "memory")

Definition at line 497 of file gcc_intrin.h.

#define ia64_native_thash (   addr)
Value:
({ \
unsigned long ia64_intri_res; \
asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
ia64_intri_res; \
})

Definition at line 386 of file gcc_intrin.h.

#define ia64_nop (   x)    asm volatile ("nop %0"::"i"(x));

Definition at line 404 of file gcc_intrin.h.

#define ia64_popcnt (   x)
Value:
({ \
__u64 ia64_intri_res; \
asm ("popcnt %0=%1" : "=r" (ia64_intri_res) : "r" (x)); \
\
ia64_intri_res; \
})

Definition at line 143 of file gcc_intrin.h.

#define ia64_ptce (   addr)    asm volatile ("ptc.e %0" :: "r"(addr))

Definition at line 502 of file gcc_intrin.h.

#define ia64_ptcl (   addr,
  size 
)
Value:
do { \
asm volatile ("ptc.l %0,%1" :: "r"(addr), "r"(size) : "memory"); \
ia64_dv_serialize_data(); \
} while (0)

Definition at line 510 of file gcc_intrin.h.

#define ia64_ptrd (   addr,
  size 
)    asm volatile ("ptr.d %0,%1" :: "r"(addr), "r"(size) : "memory")

Definition at line 519 of file gcc_intrin.h.

#define ia64_ptri (   addr,
  size 
)    asm volatile ("ptr.i %0,%1" :: "r"(addr), "r"(size) : "memory")

Definition at line 516 of file gcc_intrin.h.

#define ia64_rum (   mask)    asm volatile ("rum %0":: "i"((mask)) : "memory")

Definition at line 500 of file gcc_intrin.h.

#define ia64_set_ibr (   index,
  val 
)    asm volatile ("mov ibr[%0]=%1" :: "r"(index), "r"(val) : "memory")

Definition at line 427 of file gcc_intrin.h.

#define ia64_set_pkr (   index,
  val 
)    asm volatile ("mov pkr[%0]=%1" :: "r"(index), "r"(val) : "memory")

Definition at line 430 of file gcc_intrin.h.

#define ia64_set_pmc (   index,
  val 
)    asm volatile ("mov pmc[%0]=%1" :: "r"(index), "r"(val) : "memory")

Definition at line 433 of file gcc_intrin.h.

#define ia64_set_pmd (   index,
  val 
)    asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")

Definition at line 436 of file gcc_intrin.h.

#define ia64_shrp (   a,
  b,
  count 
)
Value:
({ \
__u64 ia64_intri_res; \
asm ("shrp %0=%1,%2,%3" : "=r"(ia64_intri_res) : "r"(a), "r"(b), "i"(count)); \
ia64_intri_res; \
})

Definition at line 161 of file gcc_intrin.h.

#define ia64_srlz_d ( )    asm volatile (";; srlz.d" ::: "memory");

Definition at line 394 of file gcc_intrin.h.

#define ia64_srlz_i ( )    asm volatile (";; srlz.i ;;" ::: "memory")

Definition at line 393 of file gcc_intrin.h.

#define ia64_st4_rel_nta (   m,
  val 
)
Value:
({ \
asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \
})

Definition at line 198 of file gcc_intrin.h.

#define ia64_stf8 (   x,
  regnum 
)
Value:
({ \
register double __f__ asm ("f"#regnum); \
asm volatile ("stf8 [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
})

Definition at line 221 of file gcc_intrin.h.

#define ia64_stf_spill (   x,
  regnum 
)
Value:
({ \
register double __f__ asm ("f"#regnum); \
asm volatile ("stf.spill [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
})

Definition at line 227 of file gcc_intrin.h.

#define ia64_stfd (   x,
  regnum 
)
Value:
({ \
register double __f__ asm ("f"#regnum); \
asm volatile ("stfd [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
})

Definition at line 209 of file gcc_intrin.h.

#define ia64_stfe (   x,
  regnum 
)
Value:
({ \
register double __f__ asm ("f"#regnum); \
asm volatile ("stfe [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
})

Definition at line 215 of file gcc_intrin.h.

#define ia64_stfs (   x,
  regnum 
)
Value:
({ \
register double __f__ asm ("f"#regnum); \
asm volatile ("stfs [%0]=%1" :: "r"(x), "f"(__f__) : "memory"); \
})

Definition at line 203 of file gcc_intrin.h.

#define ia64_stop ( )    asm volatile (";;"::)

Definition at line 19 of file gcc_intrin.h.

#define ia64_sum (   mask)    asm volatile ("sum %0":: "i"((mask)) : "memory")

Definition at line 499 of file gcc_intrin.h.

#define ia64_sync_i ( )    asm volatile (";; sync.i" ::: "memory")

Definition at line 495 of file gcc_intrin.h.

#define ia64_tpa (   addr)
Value:
({ \
unsigned long ia64_pa; \
asm volatile ("tpa %0 = %1" : "=r"(ia64_pa) : "r"(addr) : "memory"); \
ia64_pa; \
})

Definition at line 417 of file gcc_intrin.h.

#define ia64_ttag (   addr)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("ttag %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
ia64_intri_res; \
})

Definition at line 522 of file gcc_intrin.h.

#define ia64_xchg1 (   ptr,
  x 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("xchg1 %0=[%1],%2" \
: "=r" (ia64_intri_res) : "r" (ptr), "r" (x) : "memory"); \
ia64_intri_res; \
})

Definition at line 275 of file gcc_intrin.h.

#define ia64_xchg2 (   ptr,
  x 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("xchg2 %0=[%1],%2" : "=r" (ia64_intri_res) \
: "r" (ptr), "r" (x) : "memory"); \
ia64_intri_res; \
})

Definition at line 283 of file gcc_intrin.h.

#define ia64_xchg4 (   ptr,
  x 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("xchg4 %0=[%1],%2" : "=r" (ia64_intri_res) \
: "r" (ptr), "r" (x) : "memory"); \
ia64_intri_res; \
})

Definition at line 291 of file gcc_intrin.h.

#define ia64_xchg8 (   ptr,
  x 
)
Value:
({ \
__u64 ia64_intri_res; \
asm volatile ("xchg8 %0=[%1],%2" : "=r" (ia64_intri_res) \
: "r" (ptr), "r" (x) : "memory"); \
ia64_intri_res; \
})

Definition at line 299 of file gcc_intrin.h.

Function Documentation

void ia64_bad_param_for_getreg ( void  )
void ia64_bad_param_for_setreg ( void  )
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