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20 #include <linux/list.h>
21 #include <linux/bitops.h>
22 #include <linux/if_vlan.h>
24 #define VXGE_DRIVER_NAME "vxge"
25 #define VXGE_DRIVER_VENDOR "Neterion, Inc"
26 #define VXGE_DRIVER_FW_VERSION_MAJOR 1
28 #define DRV_VERSION VXGE_VERSION_MAJOR"."VXGE_VERSION_MINOR"."\
29 VXGE_VERSION_FIX"."VXGE_VERSION_BUILD"-"\
32 #define PCI_DEVICE_ID_TITAN_WIN 0x5733
33 #define PCI_DEVICE_ID_TITAN_UNI 0x5833
34 #define VXGE_HW_TITAN1_PCI_REVISION 1
35 #define VXGE_HW_TITAN1A_PCI_REVISION 2
37 #define VXGE_USE_DEFAULT 0xffffffff
38 #define VXGE_HW_VPATH_MSIX_ACTIVE 4
39 #define VXGE_ALARM_MSIX_ID 2
40 #define VXGE_HW_RXSYNC_FREQ_CNT 4
41 #define VXGE_LL_WATCH_DOG_TIMEOUT (15 * HZ)
42 #define VXGE_LL_RX_COPY_THRESHOLD 256
43 #define VXGE_DEF_FIFO_LENGTH 84
46 #define PORT_STEERING 0x1
47 #define RTH_STEERING 0x2
48 #define RX_TOS_STEERING 0x3
49 #define RX_VLAN_STEERING 0x4
50 #define RTH_BUCKET_SIZE 4
52 #define TX_PRIORITY_STEERING 1
53 #define TX_VLAN_STEERING 2
54 #define TX_PORT_STEERING 3
55 #define TX_MULTIQ_STEERING 4
57 #define VXGE_HW_MAC_ADDR_LEARN_DEFAULT VXGE_HW_RTS_MAC_DISABLE
59 #define VXGE_TTI_BTIMER_VAL 250000
61 #define VXGE_TTI_LTIMER_VAL 1000
62 #define VXGE_T1A_TTI_LTIMER_VAL 80
63 #define VXGE_TTI_RTIMER_VAL 0
64 #define VXGE_TTI_RTIMER_ADAPT_VAL 10
65 #define VXGE_T1A_TTI_RTIMER_VAL 400
66 #define VXGE_RTI_BTIMER_VAL 250
67 #define VXGE_RTI_LTIMER_VAL 100
68 #define VXGE_RTI_RTIMER_VAL 0
69 #define VXGE_RTI_RTIMER_ADAPT_VAL 15
70 #define VXGE_FIFO_INDICATE_MAX_PKTS VXGE_DEF_FIFO_LENGTH
71 #define VXGE_ISR_POLLING_CNT 8
72 #define VXGE_MAX_CONFIG_DEV 0xFF
73 #define VXGE_EXEC_MODE_DISABLE 0
74 #define VXGE_EXEC_MODE_ENABLE 1
75 #define VXGE_MAX_CONFIG_PORT 1
76 #define VXGE_ALL_VID_DISABLE 0
77 #define VXGE_ALL_VID_ENABLE 1
78 #define VXGE_PAUSE_CTRL_DISABLE 0
79 #define VXGE_PAUSE_CTRL_ENABLE 1
81 #define TTI_TX_URANGE_A 5
82 #define TTI_TX_URANGE_B 15
83 #define TTI_TX_URANGE_C 40
84 #define TTI_TX_UFC_A 5
85 #define TTI_TX_UFC_B 40
86 #define TTI_TX_UFC_C 60
87 #define TTI_TX_UFC_D 100
88 #define TTI_T1A_TX_UFC_A 30
89 #define TTI_T1A_TX_UFC_B 80
93 #define TTI_T1A_TX_UFC_C(mtu) (60 + ((VXGE_HW_MAX_MTU - mtu) / 93))
97 #define TTI_T1A_TX_UFC_D(mtu) (100 + ((VXGE_HW_MAX_MTU - mtu) / 37))
100 #define RTI_RX_URANGE_A 5
101 #define RTI_RX_URANGE_B 15
102 #define RTI_RX_URANGE_C 40
103 #define RTI_T1A_RX_URANGE_A 1
104 #define RTI_T1A_RX_URANGE_B 20
105 #define RTI_T1A_RX_URANGE_C 50
106 #define RTI_RX_UFC_A 1
107 #define RTI_RX_UFC_B 5
108 #define RTI_RX_UFC_C 10
109 #define RTI_RX_UFC_D 15
110 #define RTI_T1A_RX_UFC_B 20
111 #define RTI_T1A_RX_UFC_C 50
112 #define RTI_T1A_RX_UFC_D 60
120 #define VXGE_T1A_MAX_INTERRUPT_COUNT 100
121 #define VXGE_T1A_MAX_TX_INTERRUPT_COUNT 200
124 #define VXGE_TIMER_DELAY 10000
126 #define VXGE_LL_MAX_FRAME_SIZE(dev) ((dev)->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE)
128 #define is_sriov(function_mode) \
129 ((function_mode == VXGE_HW_FUNCTION_MODE_SRIOV) || \
130 (function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_8) || \
131 (function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_4))
171 #define NEW_NAPI_WEIGHT 64
289 #define VXGE_MAX_MAC_ADDR_COUNT 30
314 #define VXGE_MAX_LEARN_MAC_ADDR_CNT 2048
323 #define VXGE_COPY_DEBUG_INFO_TO_LL(vdev, err, trace) { \
324 for (i = 0; i < vdev->no_of_vpath; i++) { \
325 vdev->vpaths[i].level_err = err; \
326 vdev->vpaths[i].level_trace = trace; \
328 vdev->level_err = err; \
329 vdev->level_trace = trace; \
366 #define VXGE_MAX_REQUESTED_MSIX 68
367 #define VXGE_INTR_STRLEN 80
415 #define VXGE_MODULE_PARAM_INT(p, val) \
416 static int p = val; \
417 module_param(p, int, 0)
421 struct vxgedev *vdev,
unsigned long timeout)
441 #define VXGE_DEBUG_INIT 0x00000001
442 #define VXGE_DEBUG_TX 0x00000002
443 #define VXGE_DEBUG_RX 0x00000004
444 #define VXGE_DEBUG_MEM 0x00000008
445 #define VXGE_DEBUG_LOCK 0x00000010
446 #define VXGE_DEBUG_SEM 0x00000020
447 #define VXGE_DEBUG_ENTRYEXIT 0x00000040
448 #define VXGE_DEBUG_INTR 0x00000080
449 #define VXGE_DEBUG_LL_CONFIG 0x00000100
452 #ifndef VXGE_DEBUG_MASK
453 #define VXGE_DEBUG_MASK 0x0
456 #if (VXGE_DEBUG_LL_CONFIG & VXGE_DEBUG_MASK)
457 #define vxge_debug_ll_config(level, fmt, ...) \
458 vxge_debug_ll(level, VXGE_DEBUG_LL_CONFIG, fmt, __VA_ARGS__)
460 #define vxge_debug_ll_config(level, fmt, ...)
463 #if (VXGE_DEBUG_INIT & VXGE_DEBUG_MASK)
464 #define vxge_debug_init(level, fmt, ...) \
465 vxge_debug_ll(level, VXGE_DEBUG_INIT, fmt, __VA_ARGS__)
467 #define vxge_debug_init(level, fmt, ...)
470 #if (VXGE_DEBUG_TX & VXGE_DEBUG_MASK)
471 #define vxge_debug_tx(level, fmt, ...) \
472 vxge_debug_ll(level, VXGE_DEBUG_TX, fmt, __VA_ARGS__)
474 #define vxge_debug_tx(level, fmt, ...)
477 #if (VXGE_DEBUG_RX & VXGE_DEBUG_MASK)
478 #define vxge_debug_rx(level, fmt, ...) \
479 vxge_debug_ll(level, VXGE_DEBUG_RX, fmt, __VA_ARGS__)
481 #define vxge_debug_rx(level, fmt, ...)
484 #if (VXGE_DEBUG_MEM & VXGE_DEBUG_MASK)
485 #define vxge_debug_mem(level, fmt, ...) \
486 vxge_debug_ll(level, VXGE_DEBUG_MEM, fmt, __VA_ARGS__)
488 #define vxge_debug_mem(level, fmt, ...)
491 #if (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK)
492 #define vxge_debug_entryexit(level, fmt, ...) \
493 vxge_debug_ll(level, VXGE_DEBUG_ENTRYEXIT, fmt, __VA_ARGS__)
495 #define vxge_debug_entryexit(level, fmt, ...)
498 #if (VXGE_DEBUG_INTR & VXGE_DEBUG_MASK)
499 #define vxge_debug_intr(level, fmt, ...) \
500 vxge_debug_ll(level, VXGE_DEBUG_INTR, fmt, __VA_ARGS__)
502 #define vxge_debug_intr(level, fmt, ...)
505 #define VXGE_DEVICE_DEBUG_LEVEL_SET(level, mask, vdev) {\
506 vxge_hw_device_debug_set((struct __vxge_hw_device *)vdev->devh, \
508 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, \
509 vxge_hw_device_error_level_get((struct __vxge_hw_device *) \
511 vxge_hw_device_trace_level_get((struct __vxge_hw_device *) \
516 #define vxge_tcp_mss(skb) (skb_shinfo(skb)->gso_size)
517 #define vxge_udp_mss(skb) (skb_shinfo(skb)->gso_size)
518 #define vxge_offload_type(skb) (skb_shinfo(skb)->gso_type)