#include "vxge-reg.h"
#include "vxge-version.h"

Data Structures
struct	vxge_hw_mempool_dma

struct	vxge_hw_mempool

struct	vxge_hw_tim_intr_config

struct	vxge_hw_xmac_aggr_stats

struct	vxge_hw_xmac_port_stats

struct	vxge_hw_xmac_vpath_tx_stats

struct	vxge_hw_xmac_vpath_rx_stats

struct	vxge_hw_xmac_stats

struct	vxge_hw_vpath_stats_hw_info

struct	vxge_hw_device_stats_mrpcim_info

struct	vxge_hw_device_stats_hw_info

struct	vxge_hw_vpath_stats_sw_common_info

struct	vxge_hw_vpath_stats_sw_fifo_info

struct	vxge_hw_vpath_stats_sw_ring_info

struct	vxge_hw_vpath_stats_sw_err

struct	vxge_hw_vpath_stats_sw_info

struct	vxge_hw_device_stats_sw_info

struct	vxge_hw_device_stats_sw_err

struct	vxge_hw_device_stats

struct	vxge_hw_ring_rxd_info

struct	__vxge_hw_ring_rxd_priv

struct	vxge_hw_mempool_cbs

Macros
#define	VXGE_HW_DTR_MAX_T_CODE 16

#define	VXGE_HW_ALL_FOXES 0xFFFFFFFFFFFFFFFFULL

#define	VXGE_HW_INTR_MASK_ALL 0xFFFFFFFFFFFFFFFFULL

#define	VXGE_HW_MAX_VIRTUAL_PATHS 17

#define	VXGE_HW_MAC_MAX_MAC_PORT_ID 2

#define	VXGE_HW_DEFAULT_32 0xffffffff

#define	VXGE_HW_HEADER_802_2_SIZE 3

#define	VXGE_HW_HEADER_SNAP_SIZE 5

#define	VXGE_HW_HEADER_VLAN_SIZE 4

#define	VXGE_HW_MAC_HEADER_MAX_SIZE

#define	VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN 2

#define	VXGE_HW_HEADER_802_2_SNAP_ALIGN 2

#define	VXGE_HW_HEADER_802_2_ALIGN 3

#define	VXGE_HW_HEADER_SNAP_ALIGN 1

#define	VXGE_HW_L3_CKSUM_OK 0xFFFF

#define	VXGE_HW_L4_CKSUM_OK 0xFFFF

#define	TRUE 1

#define	FALSE 0

#define	VXGE_HW_EVENT_BASE 0

#define	VXGE_LL_EVENT_BASE 100

#define	VXGE_HW_SET_LEVEL(a, b) (((a) > (b)) ? (a) : (b))

#define	VXGE_HW_MAX_INTR_PER_VP 4

#define	VXGE_HW_VPATH_INTR_TX 0

#define	VXGE_HW_VPATH_INTR_RX 1

#define	VXGE_HW_VPATH_INTR_EINTA 2

#define	VXGE_HW_VPATH_INTR_BMAP 3

#define	VXGE_HW_BLOCK_SIZE 4096

#define	VXGE_HW_TIM_INTR_ENABLE 1

#define	VXGE_HW_TIM_INTR_DISABLE 0

#define	VXGE_HW_TIM_INTR_DEFAULT 0

#define	VXGE_HW_MIN_TIM_BTIMER_VAL 0

#define	VXGE_HW_MAX_TIM_BTIMER_VAL 67108864

#define	VXGE_HW_USE_FLASH_DEFAULT (~0)

#define	VXGE_HW_TIM_TIMER_AC_ENABLE 1

#define	VXGE_HW_TIM_TIMER_AC_DISABLE 0

#define	VXGE_HW_TIM_TIMER_CI_ENABLE 1

#define	VXGE_HW_TIM_TIMER_CI_DISABLE 0

#define	VXGE_HW_TIM_TIMER_RI_ENABLE 1

#define	VXGE_HW_TIM_TIMER_RI_DISABLE 0

#define	VXGE_HW_MIN_TIM_RTIMER_VAL 0

#define	VXGE_HW_MAX_TIM_RTIMER_VAL 67108864

#define	VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL 17

#define	VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL 18

#define	VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_RX_AVE_NET_UTIL 19

#define	VXGE_HW_TIM_UTIL_SEL_PER_VPATH 63

#define	VXGE_HW_MIN_TIM_LTIMER_VAL 0

#define	VXGE_HW_MAX_TIM_LTIMER_VAL 67108864

#define	VXGE_HW_MIN_TIM_URANGE_A 0

#define	VXGE_HW_MAX_TIM_URANGE_A 100

#define	VXGE_HW_MIN_TIM_UEC_A 0

#define	VXGE_HW_MAX_TIM_UEC_A 65535

#define	VXGE_HW_MIN_TIM_URANGE_B 0

#define	VXGE_HW_MAX_TIM_URANGE_B 100

#define	VXGE_HW_MIN_TIM_UEC_B 0

#define	VXGE_HW_MAX_TIM_UEC_B 65535

#define	VXGE_HW_MIN_TIM_URANGE_C 0

#define	VXGE_HW_MAX_TIM_URANGE_C 100

#define	VXGE_HW_MIN_TIM_UEC_C 0

#define	VXGE_HW_MAX_TIM_UEC_C 65535

#define	VXGE_HW_MIN_TIM_UEC_D 0

#define	VXGE_HW_MAX_TIM_UEC_D 65535

#define	VXGE_HW_STATS_OP_READ 0

#define	VXGE_HW_STATS_OP_CLEAR_STAT 1

#define	VXGE_HW_STATS_OP_CLEAR_ALL_VPATH_STATS 2

#define	VXGE_HW_STATS_OP_CLEAR_ALL_STATS_OF_LOC 2

#define	VXGE_HW_STATS_OP_CLEAR_ALL_STATS 3

#define	VXGE_HW_STATS_LOC_AGGR 17

#define	VXGE_HW_STATS_AGGRn_OFFSET 0x00720

#define	VXGE_HW_STATS_VPATH_TX_OFFSET 0x0

#define	VXGE_HW_STATS_VPATH_RX_OFFSET 0x00090

#define	VXGE_HW_STATS_VPATH_PROG_EVENT_VNUM0_OFFSET (0x001d0 >> 3)

#define	VXGE_HW_STATS_GET_VPATH_PROG_EVENT_VNUM0(bits) vxge_bVALn(bits, 0, 32)

#define	VXGE_HW_STATS_GET_VPATH_PROG_EVENT_VNUM1(bits) vxge_bVALn(bits, 32, 32)

#define	VXGE_HW_STATS_VPATH_PROG_EVENT_VNUM2_OFFSET (0x001d8 >> 3)

#define	VXGE_HW_STATS_GET_VPATH_PROG_EVENT_VNUM2(bits) vxge_bVALn(bits, 0, 32)

#define	VXGE_HW_STATS_GET_VPATH_PROG_EVENT_VNUM3(bits) vxge_bVALn(bits, 32, 32)

#define	VXGE_HW_RING_NEXT_BLOCK_POINTER_OFFSET (VXGE_HW_BLOCK_SIZE-8)

#define	VXGE_HW_RING_MEMBLOCK_IDX_OFFSET (VXGE_HW_BLOCK_SIZE-16)

#define	VXGE_HW_VIRTUAL_PATH_HANDLE(vpath) ((struct __vxge_hw_vpath_handle *)(vpath)->vpath_handles.next)

Enumerations
enum	vxge_hw_event { VXGE_HW_EVENT_UNKNOWN = 0, VXGE_HW_EVENT_RESET_START = VXGE_HW_EVENT_BASE + 1, VXGE_HW_EVENT_RESET_COMPLETE = VXGE_HW_EVENT_BASE + 2, VXGE_HW_EVENT_LINK_DOWN = VXGE_HW_EVENT_BASE + 3, VXGE_HW_EVENT_LINK_UP = VXGE_HW_EVENT_BASE + 4, VXGE_HW_EVENT_ALARM_CLEARED = VXGE_HW_EVENT_BASE + 5, VXGE_HW_EVENT_ECCERR = VXGE_HW_EVENT_BASE + 6, VXGE_HW_EVENT_MRPCIM_ECCERR = VXGE_HW_EVENT_BASE + 7, VXGE_HW_EVENT_FIFO_ERR = VXGE_HW_EVENT_BASE + 8, VXGE_HW_EVENT_VPATH_ERR = VXGE_HW_EVENT_BASE + 9, VXGE_HW_EVENT_CRITICAL_ERR = VXGE_HW_EVENT_BASE + 10, VXGE_HW_EVENT_SERR = VXGE_HW_EVENT_BASE + 11, VXGE_HW_EVENT_SRPCIM_SERR = VXGE_HW_EVENT_BASE + 12, VXGE_HW_EVENT_MRPCIM_SERR = VXGE_HW_EVENT_BASE + 13, VXGE_HW_EVENT_SLOT_FREEZE = VXGE_HW_EVENT_BASE + 14 }

enum	vxge_hw_mgmt_reg_type { vxge_hw_mgmt_reg_type_legacy = 0, vxge_hw_mgmt_reg_type_toc = 1, vxge_hw_mgmt_reg_type_common = 2, vxge_hw_mgmt_reg_type_mrpcim = 3, vxge_hw_mgmt_reg_type_srpcim = 4, vxge_hw_mgmt_reg_type_vpmgmt = 5, vxge_hw_mgmt_reg_type_vpath = 6 }

enum	vxge_hw_rxd_state { VXGE_HW_RXD_STATE_NONE = 0, VXGE_HW_RXD_STATE_AVAIL = 1, VXGE_HW_RXD_STATE_POSTED = 2, VXGE_HW_RXD_STATE_FREED = 3 }

enum	vxge_hw_ring_tcode { VXGE_HW_RING_T_CODE_OK = 0x0, VXGE_HW_RING_T_CODE_L3_CKSUM_MISMATCH = 0x1, VXGE_HW_RING_T_CODE_L4_CKSUM_MISMATCH = 0x2, VXGE_HW_RING_T_CODE_L3_L4_CKSUM_MISMATCH = 0x3, VXGE_HW_RING_T_CODE_L3_PKT_ERR = 0x5, VXGE_HW_RING_T_CODE_L2_FRM_ERR = 0x6, VXGE_HW_RING_T_CODE_BUF_SIZE_ERR = 0x7, VXGE_HW_RING_T_CODE_INT_ECC_ERR = 0x8, VXGE_HW_RING_T_CODE_BENIGN_OVFLOW = 0x9, VXGE_HW_RING_T_CODE_ZERO_LEN_BUFF = 0xA, VXGE_HW_RING_T_CODE_FRM_DROP = 0xC, VXGE_HW_RING_T_CODE_UNUSED = 0xE, VXGE_HW_RING_T_CODE_MULTI_ERR = 0xF }

enum	vxge_hw_frame_proto { VXGE_HW_FRAME_PROTO_VLAN_TAGGED = 0x80, VXGE_HW_FRAME_PROTO_IPV4 = 0x10, VXGE_HW_FRAME_PROTO_IPV6 = 0x08, VXGE_HW_FRAME_PROTO_IP_FRAG = 0x04, VXGE_HW_FRAME_PROTO_TCP = 0x02, VXGE_HW_FRAME_PROTO_UDP = 0x01, VXGE_HW_FRAME_PROTO_TCP_OR_UDP }

enum	vxge_hw_fifo_gather_code { VXGE_HW_FIFO_GATHER_CODE_FIRST = 0x2, VXGE_HW_FIFO_GATHER_CODE_MIDDLE = 0x0, VXGE_HW_FIFO_GATHER_CODE_LAST = 0x1, VXGE_HW_FIFO_GATHER_CODE_FIRST_LAST = 0x3 }

enum	vxge_hw_fifo_tcode { VXGE_HW_FIFO_T_CODE_OK = 0x0, VXGE_HW_FIFO_T_CODE_PCI_READ_CORRUPT = 0x1, VXGE_HW_FIFO_T_CODE_PCI_READ_FAIL = 0x2, VXGE_HW_FIFO_T_CODE_INVALID_MSS = 0x3, VXGE_HW_FIFO_T_CODE_LSO_ERROR = 0x4, VXGE_HW_FIFO_T_CODE_UNUSED = 0x7, VXGE_HW_FIFO_T_CODE_MULTI_ERROR = 0x8 }

enum	vxge_hw_vpath_mac_addr_add_mode { VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE = 0, VXGE_HW_VPATH_MAC_ADDR_DISCARD_DUPLICATE = 1, VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE = 2 }

Functions
enum vxge_hw_status	vxge_hw_device_hw_stats_enable (struct __vxge_hw_device *devh)

enum vxge_hw_status	vxge_hw_device_stats_get (struct __vxge_hw_device devh, struct vxge_hw_device_stats_hw_info hw_stats)

enum vxge_hw_status	vxge_hw_driver_stats_get (struct __vxge_hw_device devh, struct vxge_hw_device_stats_sw_info sw_stats)

enum vxge_hw_status	vxge_hw_mrpcim_stats_enable (struct __vxge_hw_device *devh)

enum vxge_hw_status	vxge_hw_mrpcim_stats_disable (struct __vxge_hw_device *devh)

enum vxge_hw_status	vxge_hw_mrpcim_stats_access (struct __vxge_hw_device devh, u32 operation, u32 location, u32 offset, u64 stat)

enum vxge_hw_status	vxge_hw_device_xmac_stats_get (struct __vxge_hw_device devh, struct vxge_hw_xmac_stats xmac_stats)

enum vxge_hw_status	vxge_hw_mgmt_reg_read (struct __vxge_hw_device devh, enum vxge_hw_mgmt_reg_type type, u32 index, u32 offset, u64 value)

enum vxge_hw_status	vxge_hw_mgmt_reg_write (struct __vxge_hw_device *devh, enum vxge_hw_mgmt_reg_type type, u32 index, u32 offset, u64 value)

enum vxge_hw_status	vxge_hw_ring_rxd_reserve (struct __vxge_hw_ring ring_handle, void *rxdh)

void	vxge_hw_ring_rxd_pre_post (struct __vxge_hw_ring ring_handle, void rxdh)

void	vxge_hw_ring_rxd_post_post (struct __vxge_hw_ring ring_handle, void rxdh)

enum vxge_hw_status	vxge_hw_ring_replenish (struct __vxge_hw_ring *ring_handle)

void	vxge_hw_ring_rxd_post_post_wmb (struct __vxge_hw_ring ring_handle, void rxdh)

void	vxge_hw_ring_rxd_post (struct __vxge_hw_ring ring_handle, void rxdh)

enum vxge_hw_status	vxge_hw_ring_rxd_next_completed (struct __vxge_hw_ring ring_handle, void rxdh, u8 t_code)

enum vxge_hw_status	vxge_hw_ring_handle_tcode (struct __vxge_hw_ring ring_handle, void rxdh, u8 t_code)

void	vxge_hw_ring_rxd_free (struct __vxge_hw_ring ring_handle, void rxdh)

enum vxge_hw_status	vxge_hw_fifo_txdl_reserve (struct __vxge_hw_fifo fifoh, void txdlh, void *txdl_priv)

void	vxge_hw_fifo_txdl_buffer_set (struct __vxge_hw_fifo fifo_handle, void txdlh, u32 frag_idx, dma_addr_t dma_pointer, u32 size)

void	vxge_hw_fifo_txdl_post (struct __vxge_hw_fifo fifo_handle, void txdlh)

u32	vxge_hw_fifo_free_txdl_count_get (struct __vxge_hw_fifo *fifo_handle)

enum vxge_hw_status	vxge_hw_fifo_txdl_next_completed (struct __vxge_hw_fifo fifoh, void txdlh, enum vxge_hw_fifo_tcode t_code)

enum vxge_hw_status	vxge_hw_fifo_handle_tcode (struct __vxge_hw_fifo fifoh, void txdlh, enum vxge_hw_fifo_tcode t_code)

void	vxge_hw_fifo_txdl_free (struct __vxge_hw_fifo fifoh, void txdlh)

enum vxge_hw_status	__vxge_hw_vpath_rts_table_get (struct __vxge_hw_vpath_handle vpath_handle, u32 action, u32 rts_table, u32 offset, u64 data1, u64 *data2)

enum vxge_hw_status	__vxge_hw_vpath_rts_table_set (struct __vxge_hw_vpath_handle *vpath_handle, u32 action, u32 rts_table, u32 offset, u64 data1, u64 data2)

enum vxge_hw_status	__vxge_hw_vpath_enable (struct __vxge_hw_device *devh, u32 vp_id)

void	vxge_hw_device_intr_enable (struct __vxge_hw_device *devh)

u32	vxge_hw_device_set_intr_type (struct __vxge_hw_device *devh, u32 intr_mode)

void	vxge_hw_device_intr_disable (struct __vxge_hw_device *devh)

void	vxge_hw_device_mask_all (struct __vxge_hw_device *devh)

void	vxge_hw_device_unmask_all (struct __vxge_hw_device *devh)

enum vxge_hw_status	vxge_hw_device_begin_irq (struct __vxge_hw_device devh, u32 skip_alarms, u64 reason)

void	vxge_hw_device_clear_tx_rx (struct __vxge_hw_device *devh)

void	vxge_hw_vpath_dynamic_rti_rtimer_set (struct __vxge_hw_ring *ring)

void	vxge_hw_vpath_dynamic_tti_rtimer_set (struct __vxge_hw_fifo *fifo)

u32	vxge_hw_vpath_id (struct __vxge_hw_vpath_handle *vpath_handle)

enum vxge_hw_status	vxge_hw_vpath_mac_addr_add (struct __vxge_hw_vpath_handle vpath_handle, u8 macaddr, u8 *macaddr_mask, enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode)

enum vxge_hw_status	vxge_hw_vpath_mac_addr_get (struct __vxge_hw_vpath_handle vpath_handle, u8 macaddr, u8 *macaddr_mask)

enum vxge_hw_status	vxge_hw_vpath_mac_addr_get_next (struct __vxge_hw_vpath_handle vpath_handle, u8 macaddr, u8 *macaddr_mask)

enum vxge_hw_status	vxge_hw_vpath_mac_addr_delete (struct __vxge_hw_vpath_handle vpath_handle, u8 macaddr, u8 *macaddr_mask)

enum vxge_hw_status	vxge_hw_vpath_vid_add (struct __vxge_hw_vpath_handle *vpath_handle, u64 vid)

enum vxge_hw_status	vxge_hw_vpath_vid_get (struct __vxge_hw_vpath_handle vpath_handle, u64 vid)

enum vxge_hw_status	vxge_hw_vpath_vid_delete (struct __vxge_hw_vpath_handle *vpath_handle, u64 vid)

enum vxge_hw_status	vxge_hw_vpath_etype_add (struct __vxge_hw_vpath_handle *vpath_handle, u64 etype)

enum vxge_hw_status	vxge_hw_vpath_etype_get (struct __vxge_hw_vpath_handle vpath_handle, u64 etype)

enum vxge_hw_status	vxge_hw_vpath_etype_get_next (struct __vxge_hw_vpath_handle vpath_handle, u64 etype)

enum vxge_hw_status	vxge_hw_vpath_etype_delete (struct __vxge_hw_vpath_handle *vpath_handle, u64 etype)

enum vxge_hw_status	vxge_hw_vpath_promisc_enable (struct __vxge_hw_vpath_handle *vpath_handle)

enum vxge_hw_status	vxge_hw_vpath_promisc_disable (struct __vxge_hw_vpath_handle *vpath_handle)

enum vxge_hw_status	vxge_hw_vpath_bcast_enable (struct __vxge_hw_vpath_handle *vpath_handle)

enum vxge_hw_status	vxge_hw_vpath_mcast_enable (struct __vxge_hw_vpath_handle *vpath_handle)

enum vxge_hw_status	vxge_hw_vpath_mcast_disable (struct __vxge_hw_vpath_handle *vpath_handle)

enum vxge_hw_status	vxge_hw_vpath_poll_rx (struct __vxge_hw_ring *ringh)

enum vxge_hw_status	vxge_hw_vpath_poll_tx (struct __vxge_hw_fifo fifoh, struct sk_buff *skb_ptr, int nr_skb, int more)

enum vxge_hw_status	vxge_hw_vpath_alarm_process (struct __vxge_hw_vpath_handle *vpath_handle, u32 skip_alarms)

void	vxge_hw_vpath_msix_set (struct __vxge_hw_vpath_handle vpath_handle, int tim_msix_id, int alarm_msix_id)

void	vxge_hw_vpath_msix_mask (struct __vxge_hw_vpath_handle *vpath_handle, int msix_id)

void	vxge_hw_vpath_msix_clear (struct __vxge_hw_vpath_handle *vp, int msix_id)

void	vxge_hw_device_flush_io (struct __vxge_hw_device *devh)

void	vxge_hw_vpath_msix_unmask (struct __vxge_hw_vpath_handle *vpath_handle, int msix_id)

enum vxge_hw_status	vxge_hw_vpath_intr_enable (struct __vxge_hw_vpath_handle *vpath_handle)

enum vxge_hw_status	vxge_hw_vpath_intr_disable (struct __vxge_hw_vpath_handle *vpath_handle)

void	vxge_hw_vpath_inta_mask_tx_rx (struct __vxge_hw_vpath_handle *vpath_handle)

void	vxge_hw_vpath_inta_unmask_tx_rx (struct __vxge_hw_vpath_handle *vpath_handle)

void	vxge_hw_channel_msix_mask (struct __vxge_hw_channel *channelh, int msix_id)

void	vxge_hw_channel_msix_unmask (struct __vxge_hw_channel *channelh, int msix_id)

void	vxge_hw_channel_msix_clear (struct __vxge_hw_channel *channelh, int msix_id)

void	vxge_hw_channel_dtr_try_complete (struct __vxge_hw_channel channel, void *dtrh)

void	vxge_hw_channel_dtr_complete (struct __vxge_hw_channel *channel)

void	vxge_hw_channel_dtr_free (struct __vxge_hw_channel channel, void dtrh)

int	vxge_hw_channel_dtr_count (struct __vxge_hw_channel *channel)

void	vxge_hw_vpath_tti_ci_set (struct __vxge_hw_fifo *fifo)

void	vxge_hw_vpath_dynamic_rti_ci_set (struct __vxge_hw_ring *ring)

Variables
struct vxge_hw_xmac_aggr_stats	__packed

Macro Definition Documentation

#define FALSE 0

Definition at line 63 of file vxge-traffic.h.

#define TRUE 1

Definition at line 59 of file vxge-traffic.h.

#define VXGE_HW_ALL_FOXES 0xFFFFFFFFFFFFFFFFULL

Definition at line 21 of file vxge-traffic.h.

#define VXGE_HW_BLOCK_SIZE 4096

Definition at line 171 of file vxge-traffic.h.

#define VXGE_HW_DEFAULT_32 0xffffffff

Definition at line 27 of file vxge-traffic.h.

#define VXGE_HW_DTR_MAX_T_CODE 16

Definition at line 20 of file vxge-traffic.h.

#define VXGE_HW_EVENT_BASE 0

Definition at line 68 of file vxge-traffic.h.

#define VXGE_HW_HEADER_802_2_ALIGN 3

Definition at line 41 of file vxge-traffic.h.

#define VXGE_HW_HEADER_802_2_SIZE 3

Definition at line 29 of file vxge-traffic.h.

#define VXGE_HW_HEADER_802_2_SNAP_ALIGN 2

Definition at line 40 of file vxge-traffic.h.

#define VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN 2

Definition at line 39 of file vxge-traffic.h.

#define VXGE_HW_HEADER_SNAP_ALIGN 1

Definition at line 42 of file vxge-traffic.h.

#define VXGE_HW_HEADER_SNAP_SIZE 5

Definition at line 30 of file vxge-traffic.h.

#define VXGE_HW_HEADER_VLAN_SIZE 4

Definition at line 31 of file vxge-traffic.h.

#define VXGE_HW_INTR_MASK_ALL 0xFFFFFFFFFFFFFFFFULL

Definition at line 22 of file vxge-traffic.h.

#define VXGE_HW_L3_CKSUM_OK 0xFFFF

Definition at line 44 of file vxge-traffic.h.

#define VXGE_HW_L4_CKSUM_OK 0xFFFF

Definition at line 45 of file vxge-traffic.h.

#define VXGE_HW_MAC_HEADER_MAX_SIZE

Value:

(ETH_HLEN + \
            VXGE_HW_HEADER_802_2_SIZE + \
            VXGE_HW_HEADER_VLAN_SIZE + \
            VXGE_HW_HEADER_SNAP_SIZE)

Definition at line 32 of file vxge-traffic.h.

#define VXGE_HW_MAC_MAX_MAC_PORT_ID 2

Definition at line 25 of file vxge-traffic.h.

#define VXGE_HW_MAX_INTR_PER_VP 4

Definition at line 165 of file vxge-traffic.h.

#define VXGE_HW_MAX_TIM_BTIMER_VAL 67108864

Definition at line 242 of file vxge-traffic.h.

#define VXGE_HW_MAX_TIM_LTIMER_VAL 67108864

Definition at line 269 of file vxge-traffic.h.

#define VXGE_HW_MAX_TIM_RTIMER_VAL 67108864

Definition at line 259 of file vxge-traffic.h.

#define VXGE_HW_MAX_TIM_UEC_A 65535

Definition at line 278 of file vxge-traffic.h.

#define VXGE_HW_MAX_TIM_UEC_B 65535

Definition at line 286 of file vxge-traffic.h.

#define VXGE_HW_MAX_TIM_UEC_C 65535

Definition at line 294 of file vxge-traffic.h.

#define VXGE_HW_MAX_TIM_UEC_D 65535

Definition at line 298 of file vxge-traffic.h.

#define VXGE_HW_MAX_TIM_URANGE_A 100

Definition at line 274 of file vxge-traffic.h.

#define VXGE_HW_MAX_TIM_URANGE_B 100

Definition at line 282 of file vxge-traffic.h.

#define VXGE_HW_MAX_TIM_URANGE_C 100

Definition at line 290 of file vxge-traffic.h.

#define VXGE_HW_MAX_VIRTUAL_PATHS 17

Definition at line 23 of file vxge-traffic.h.

#define VXGE_HW_MIN_TIM_BTIMER_VAL 0

Definition at line 241 of file vxge-traffic.h.

#define VXGE_HW_MIN_TIM_LTIMER_VAL 0

Definition at line 268 of file vxge-traffic.h.

#define VXGE_HW_MIN_TIM_RTIMER_VAL 0

Definition at line 258 of file vxge-traffic.h.

#define VXGE_HW_MIN_TIM_UEC_A 0

Definition at line 277 of file vxge-traffic.h.

#define VXGE_HW_MIN_TIM_UEC_B 0

Definition at line 285 of file vxge-traffic.h.

#define VXGE_HW_MIN_TIM_UEC_C 0

Definition at line 293 of file vxge-traffic.h.

#define VXGE_HW_MIN_TIM_UEC_D 0

Definition at line 297 of file vxge-traffic.h.

#define VXGE_HW_MIN_TIM_URANGE_A 0

Definition at line 273 of file vxge-traffic.h.

#define VXGE_HW_MIN_TIM_URANGE_B 0

Definition at line 281 of file vxge-traffic.h.

#define VXGE_HW_MIN_TIM_URANGE_C 0

Definition at line 289 of file vxge-traffic.h.

#define VXGE_HW_RING_MEMBLOCK_IDX_OFFSET (VXGE_HW_BLOCK_SIZE-16)

Definition at line 2053 of file vxge-traffic.h.

#define VXGE_HW_RING_NEXT_BLOCK_POINTER_OFFSET (VXGE_HW_BLOCK_SIZE-8)

Definition at line 2052 of file vxge-traffic.h.

#define VXGE_HW_SET_LEVEL	(	a,
		b
	)	(((a) > (b)) ? (a) : (b))

Definition at line 111 of file vxge-traffic.h.

#define VXGE_HW_STATS_AGGRn_OFFSET 0x00720

Definition at line 308 of file vxge-traffic.h.

#define VXGE_HW_STATS_GET_VPATH_PROG_EVENT_VNUM0 ( bits ) vxge_bVALn(bits, 0, 32)

Definition at line 314 of file vxge-traffic.h.

#define VXGE_HW_STATS_GET_VPATH_PROG_EVENT_VNUM1 ( bits ) vxge_bVALn(bits, 32, 32)

Definition at line 317 of file vxge-traffic.h.

#define VXGE_HW_STATS_GET_VPATH_PROG_EVENT_VNUM2 ( bits ) vxge_bVALn(bits, 0, 32)

Definition at line 321 of file vxge-traffic.h.

#define VXGE_HW_STATS_GET_VPATH_PROG_EVENT_VNUM3 ( bits ) vxge_bVALn(bits, 32, 32)

Definition at line 324 of file vxge-traffic.h.

#define VXGE_HW_STATS_LOC_AGGR 17

Definition at line 307 of file vxge-traffic.h.

#define VXGE_HW_STATS_OP_CLEAR_ALL_STATS 3

Definition at line 305 of file vxge-traffic.h.

#define VXGE_HW_STATS_OP_CLEAR_ALL_STATS_OF_LOC 2

Definition at line 304 of file vxge-traffic.h.

#define VXGE_HW_STATS_OP_CLEAR_ALL_VPATH_STATS 2

Definition at line 303 of file vxge-traffic.h.

#define VXGE_HW_STATS_OP_CLEAR_STAT 1

Definition at line 302 of file vxge-traffic.h.

#define VXGE_HW_STATS_OP_READ 0

Definition at line 301 of file vxge-traffic.h.

#define VXGE_HW_STATS_VPATH_PROG_EVENT_VNUM0_OFFSET (0x001d0 >> 3)

Definition at line 313 of file vxge-traffic.h.

#define VXGE_HW_STATS_VPATH_PROG_EVENT_VNUM2_OFFSET (0x001d8 >> 3)

Definition at line 320 of file vxge-traffic.h.

#define VXGE_HW_STATS_VPATH_RX_OFFSET 0x00090

Definition at line 311 of file vxge-traffic.h.

#define VXGE_HW_STATS_VPATH_TX_OFFSET 0x0

Definition at line 310 of file vxge-traffic.h.

#define VXGE_HW_TIM_INTR_DEFAULT 0

Definition at line 238 of file vxge-traffic.h.

#define VXGE_HW_TIM_INTR_DISABLE 0

Definition at line 237 of file vxge-traffic.h.

#define VXGE_HW_TIM_INTR_ENABLE 1

Definition at line 236 of file vxge-traffic.h.

#define VXGE_HW_TIM_TIMER_AC_DISABLE 0

Definition at line 247 of file vxge-traffic.h.

#define VXGE_HW_TIM_TIMER_AC_ENABLE 1

Definition at line 246 of file vxge-traffic.h.

#define VXGE_HW_TIM_TIMER_CI_DISABLE 0

Definition at line 251 of file vxge-traffic.h.

#define VXGE_HW_TIM_TIMER_CI_ENABLE 1

Definition at line 250 of file vxge-traffic.h.

#define VXGE_HW_TIM_TIMER_RI_DISABLE 0

Definition at line 255 of file vxge-traffic.h.

#define VXGE_HW_TIM_TIMER_RI_ENABLE 1

Definition at line 254 of file vxge-traffic.h.

#define VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL 18

Definition at line 263 of file vxge-traffic.h.

#define VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL 17

Definition at line 262 of file vxge-traffic.h.

#define VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_RX_AVE_NET_UTIL 19

Definition at line 264 of file vxge-traffic.h.

#define VXGE_HW_TIM_UTIL_SEL_PER_VPATH 63

Definition at line 265 of file vxge-traffic.h.

#define VXGE_HW_USE_FLASH_DEFAULT (~0)

Definition at line 243 of file vxge-traffic.h.

#define VXGE_HW_VIRTUAL_PATH_HANDLE ( vpath ) ((struct __vxge_hw_vpath_handle *)(vpath)->vpath_handles.next)

Definition at line 2093 of file vxge-traffic.h.

#define VXGE_HW_VPATH_INTR_BMAP 3

Definition at line 169 of file vxge-traffic.h.

#define VXGE_HW_VPATH_INTR_EINTA 2

Definition at line 168 of file vxge-traffic.h.

#define VXGE_HW_VPATH_INTR_RX 1

Definition at line 167 of file vxge-traffic.h.

#define VXGE_HW_VPATH_INTR_TX 0

Definition at line 166 of file vxge-traffic.h.

#define VXGE_LL_EVENT_BASE 100

Definition at line 69 of file vxge-traffic.h.

Enumeration Type Documentation

enum vxge_hw_event

enum vxge_hw_event- Enumerates slow-path HW events. : Unknown (and invalid) event. : Serious vpath hardware error event. : vpath ECC error event. : Error local to the respective vpath : FIFO Doorbell fifo error. : srpcim hardware error event. : mrpcim hardware error event. : mrpcim ecc error event. : Privileged entity is starting device reset : Device reset has been completed : Slot-freeze event. Driver tries to distinguish slot-freeze from the rest critical events (e.g. ECC) when it is impossible to PIO read "through" the bus, i.e. when getting all-foxes.

enum vxge_hw_event enumerates slow-path HW eventis.

See also: struct vxge_hw_uld_cbs{}, vxge_uld_link_up_f{}, vxge_uld_link_down_f{}.

Enumerator:

VXGE_HW_EVENT_UNKNOWN
VXGE_HW_EVENT_RESET_START
VXGE_HW_EVENT_RESET_COMPLETE
VXGE_HW_EVENT_LINK_DOWN
VXGE_HW_EVENT_LINK_UP
VXGE_HW_EVENT_ALARM_CLEARED
VXGE_HW_EVENT_ECCERR
VXGE_HW_EVENT_MRPCIM_ECCERR
VXGE_HW_EVENT_FIFO_ERR
VXGE_HW_EVENT_VPATH_ERR
VXGE_HW_EVENT_CRITICAL_ERR
VXGE_HW_EVENT_SERR
VXGE_HW_EVENT_SRPCIM_SERR
VXGE_HW_EVENT_MRPCIM_SERR
VXGE_HW_EVENT_SLOT_FREEZE

Definition at line 92 of file vxge-traffic.h.

enum vxge_hw_fifo_gather_code

enum enum vxge_hw_fifo_gather_code - Gather codes used in fifo TxD : First TxDL : Middle TxDL : Last TxDL : First and Last TxDL.

These gather codes are used to indicate the position of a TxD in a TxD list

Enumerator:

VXGE_HW_FIFO_GATHER_CODE_FIRST
VXGE_HW_FIFO_GATHER_CODE_MIDDLE
VXGE_HW_FIFO_GATHER_CODE_LAST
VXGE_HW_FIFO_GATHER_CODE_FIRST_LAST

Definition at line 1979 of file vxge-traffic.h.

enum vxge_hw_fifo_tcode

enum enum vxge_hw_fifo_tcode - tcodes used in fifo : Transfer OK : PCI read transaction (either TxD or frame data) returned with corrupt data. :PCI read transaction was returned with no data. : The host attempted to send either a frame or LSO MSS that was too long (>9800B). : Error detected during TCP/UDP Large Send Offload operation, due to improper header template, unsupported protocol, etc. : Unused : Set to 1 by the adapter if multiple data buffer transfer errors are encountered (see below). Otherwise it is set to 0.

These tcodes are returned in various API for TxD status

Enumerator:

VXGE_HW_FIFO_T_CODE_OK
VXGE_HW_FIFO_T_CODE_PCI_READ_CORRUPT
VXGE_HW_FIFO_T_CODE_PCI_READ_FAIL
VXGE_HW_FIFO_T_CODE_INVALID_MSS
VXGE_HW_FIFO_T_CODE_LSO_ERROR
VXGE_HW_FIFO_T_CODE_UNUSED
VXGE_HW_FIFO_T_CODE_MULTI_ERROR

Definition at line 2005 of file vxge-traffic.h.

enum vxge_hw_frame_proto

enum enum vxge_hw_frame_proto - Higher-layer ethernet protocols. : VLAN. : IPv4. : IPv6. : IP fragmented. : TCP. : UDP. : TCP or UDP.

Higher layer ethernet protocols and options.

Enumerator:

VXGE_HW_FRAME_PROTO_VLAN_TAGGED
VXGE_HW_FRAME_PROTO_IPV4
VXGE_HW_FRAME_PROTO_IPV6
VXGE_HW_FRAME_PROTO_IP_FRAG
VXGE_HW_FRAME_PROTO_TCP
VXGE_HW_FRAME_PROTO_UDP
VXGE_HW_FRAME_PROTO_TCP_OR_UDP

Definition at line 1959 of file vxge-traffic.h.

enum vxge_hw_mgmt_reg_type

enum enum vxge_hw_mgmt_reg_type - Register types.

: Legacy registers : TOC Registers : Common Registers : mrpcim registers : srpcim registers : vpath management registers : vpath registers

Register type enumaration

Enumerator:

vxge_hw_mgmt_reg_type_legacy
vxge_hw_mgmt_reg_type_toc
vxge_hw_mgmt_reg_type_common
vxge_hw_mgmt_reg_type_mrpcim
vxge_hw_mgmt_reg_type_srpcim
vxge_hw_mgmt_reg_type_vpmgmt
vxge_hw_mgmt_reg_type_vpath

Definition at line 1768 of file vxge-traffic.h.

enum vxge_hw_ring_tcode

enum vxge_hw_ring_tcode - Transfer codes returned by adapter : Transfer ok. : Layer 3 checksum presentation configuration mismatch. : Layer 4 checksum presentation configuration mismatch. : Layer 3 and Layer 4 checksum presentation configuration mismatch. : Layer 3 error unparseable packet, such as unknown IPv6 header. : Layer 2 error frame integrity error, such as FCS or ECC). : Buffer size error the RxD buffer( s) were not appropriately sized and data loss occurred. : Internal ECC error RxD corrupted. : Benign overflow the contents of Segment1 exceeded the capacity of Buffer1 and the remainder was placed in Buffer2. Segment2 now starts in Buffer3. No data loss or errors occurred. : Buffer size 0 one of the RxDs assigned buffers has a size of 0 bytes. : Frame dropped either due to VPath Reset or because of a VPIN mismatch. : Unused : Multiple errors more than one transfer code condition occurred.

Transfer codes returned by adapter.

Enumerator:

VXGE_HW_RING_T_CODE_OK
VXGE_HW_RING_T_CODE_L3_CKSUM_MISMATCH
VXGE_HW_RING_T_CODE_L4_CKSUM_MISMATCH
VXGE_HW_RING_T_CODE_L3_L4_CKSUM_MISMATCH
VXGE_HW_RING_T_CODE_L3_PKT_ERR
VXGE_HW_RING_T_CODE_L2_FRM_ERR
VXGE_HW_RING_T_CODE_BUF_SIZE_ERR
VXGE_HW_RING_T_CODE_INT_ECC_ERR
VXGE_HW_RING_T_CODE_BENIGN_OVFLOW
VXGE_HW_RING_T_CODE_ZERO_LEN_BUFF
VXGE_HW_RING_T_CODE_FRM_DROP
VXGE_HW_RING_T_CODE_UNUSED
VXGE_HW_RING_T_CODE_MULTI_ERR

Definition at line 1891 of file vxge-traffic.h.

enum vxge_hw_rxd_state

enum enum vxge_hw_rxd_state - Descriptor (RXD) state. : Invalid state. : Descriptor is available for reservation. : Descriptor is posted for processing by the device. : Descriptor is free and can be reused for filling-in and posting later.

Titan/HW descriptor states.

Enumerator:

VXGE_HW_RXD_STATE_NONE
VXGE_HW_RXD_STATE_AVAIL
VXGE_HW_RXD_STATE_POSTED
VXGE_HW_RXD_STATE_FREED

Definition at line 1804 of file vxge-traffic.h.

enum vxge_hw_vpath_mac_addr_add_mode

Enumerator:

VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE
VXGE_HW_VPATH_MAC_ADDR_DISCARD_DUPLICATE
VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE

Definition at line 2152 of file vxge-traffic.h.

Function Documentation

enum vxge_hw_status __vxge_hw_vpath_enable	(	struct __vxge_hw_device *	devh,
		u32	vp_id
	)

enum vxge_hw_status __vxge_hw_vpath_rts_table_get	(	struct __vxge_hw_vpath_handle *	vpath_handle,
		u32	action,
		u32	rts_table,
		u32	offset,
		u64 *	data1,
		u64 *	data2
	)

Definition at line 3652 of file vxge-config.c.

enum vxge_hw_status __vxge_hw_vpath_rts_table_set	(	struct __vxge_hw_vpath_handle *	vpath_handle,
		u32	action,
		u32	rts_table,
		u32	offset,
		u64	data1,
		u64	data2
	)

Definition at line 3692 of file vxge-config.c.

void vxge_hw_channel_dtr_complete ( struct __vxge_hw_channel * channel )

Definition at line 1086 of file vxge-traffic.c.

int vxge_hw_channel_dtr_count ( struct __vxge_hw_channel * channel )

Definition at line 1117 of file vxge-traffic.c.

void vxge_hw_channel_dtr_free	(	struct __vxge_hw_channel *	channel,
		void *	dtrh
	)

Definition at line 1105 of file vxge-traffic.c.

void vxge_hw_channel_dtr_try_complete	(	struct __vxge_hw_channel *	channel,
		void **	dtrh
	)

Definition at line 1071 of file vxge-traffic.c.

void vxge_hw_channel_msix_clear	(	struct __vxge_hw_channel *	channel,
		int	msix_id
	)

vxge_hw_channel_msix_clear - Unmask the MSIX Vector. : Channel for rx or tx handle : MSI ID

The function unmasks the msix interrupt for the given msix_id if configured in MSIX oneshot mode

Returns: 0

Definition at line 329 of file vxge-traffic.c.

void vxge_hw_channel_msix_mask	(	struct __vxge_hw_channel *	channel,
		int	msix_id
	)

vxge_hw_channel_msix_mask - Mask MSIX Vector. : Channel for rx or tx handle : MSIX ID

The function masks the msix interrupt for the given msix_id

Returns: 0

Definition at line 293 of file vxge-traffic.c.

void vxge_hw_channel_msix_unmask	(	struct __vxge_hw_channel *	channel,
		int	msix_id
	)

vxge_hw_channel_msix_unmask - Unmask the MSIX Vector. : Channel for rx or tx handle : MSI ID

The function unmasks the msix interrupt for the given msix_id

Returns: 0

Definition at line 311 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_device_begin_irq	(	struct __vxge_hw_device *	hldev,
		u32	skip_alarms,
		u64 *	reason
	)

vxge_hw_device_begin_irq - Begin IRQ processing. : HW device handle. : Do not clear the alarms : "Reason" for the interrupt, the value of Titan's general_int_status register.

The function performs two actions, It first checks whether (shared IRQ) the interrupt was raised by the device. Next, it masks the device interrupts.

Note: vxge_hw_device_begin_irq() does not flush MMIO writes through the bridge. Therefore, two back-to-back interrupts are potentially possible.

Returns: 0, if the interrupt is not "ours" (note that in this case the device remain enabled). Otherwise, vxge_hw_device_begin_irq() returns 64bit general adapter status.

Definition at line 890 of file vxge-traffic.c.

void vxge_hw_device_clear_tx_rx ( struct __vxge_hw_device * hldev )

vxge_hw_device_clear_tx_rx - Acknowledge (that is, clear) the condition that has caused the Tx and RX interrupt. : HW device.

Acknowledge (that is, clear) the condition that has caused the Tx and Rx interrupt. See also: vxge_hw_device_begin_irq(), vxge_hw_device_mask_tx_rx(), vxge_hw_device_unmask_tx_rx().

Definition at line 976 of file vxge-traffic.c.

void vxge_hw_device_flush_io ( struct __vxge_hw_device * hldev )

vxge_hw_device_flush_io - Flush io writes. : HW device handle.

The function performs a read operation to flush io writes.

Returns: void

Definition at line 487 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_device_hw_stats_enable ( struct __vxge_hw_device * devh )

void vxge_hw_device_intr_disable ( struct __vxge_hw_device * hldev )

vxge_hw_device_intr_disable - Disable Titan interrupts. : HW device handle. : One of the enum vxge_hw_device_intr enumerated values specifying the type(s) of interrupts to disable.

Disable Titan interrupts.

See also: vxge_hw_device_mask_all()

Definition at line 468 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_device_xmac_stats_get	(	struct __vxge_hw_device *	devh,
		struct vxge_hw_xmac_stats *	xmac_stats
	)

Definition at line 1803 of file vxge-config.c.

enum vxge_hw_status vxge_hw_driver_stats_get	(	struct __vxge_hw_device *	devh,
		struct vxge_hw_device_stats_sw_info *	sw_stats
	)

Definition at line 1681 of file vxge-config.c.

u32 vxge_hw_fifo_free_txdl_count_get ( struct __vxge_hw_fifo * fifoh )

vxge_hw_fifo_free_txdl_count_get - returns the number of txdls available in the fifo : Handle to the fifo object used for non offload send

Definition at line 1428 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_fifo_handle_tcode	(	struct __vxge_hw_fifo *	fifo,
		void *	txdlh,
		enum vxge_hw_fifo_tcode	t_code
	)

vxge_hw_fifo_handle_tcode - Handle transfer code. : Handle to the fifo object used for non offload send : Descriptor handle. : One of the enumerated (and documented in the Titan user guide) "transfer codes".

Handle descriptor's transfer code. The latter comes with each completed descriptor.

Returns: one of the enum vxge_hw_status{} enumerated types. VXGE_HW_OK - for success. VXGE_HW_ERR_CRITICAL - when encounters critical error.

Definition at line 1676 of file vxge-traffic.c.

void vxge_hw_fifo_txdl_buffer_set	(	struct __vxge_hw_fifo *	fifo,
		void *	txdlh,
		u32	frag_idx,
		dma_addr_t	dma_pointer,
		u32	size
	)

vxge_hw_fifo_txdl_buffer_set - Set transmit buffer pointer in the descriptor. : Handle to the fifo object used for non offload send : Descriptor handle. : Index of the data buffer in the caller's scatter-gather list (of buffers). : DMA address of the data buffer referenced by . : Size of the data buffer (in bytes).

This API is part of the preparation of the transmit descriptor for posting (via vxge_hw_fifo_txdl_post()). The related "preparation" APIs include vxge_hw_fifo_txdl_mss_set() and vxge_hw_fifo_txdl_cksum_set_bits(). All three APIs fill in the fields of the fifo descriptor, in accordance with the Titan specification.

Definition at line 1508 of file vxge-traffic.c.

void vxge_hw_fifo_txdl_free	(	struct __vxge_hw_fifo *	fifo,
		void *	txdlh
	)

vxge_hw_fifo_txdl_free - Free descriptor. : Handle to the fifo object used for non offload send : Descriptor handle.

Free the reserved descriptor. This operation is "symmetrical" to vxge_hw_fifo_txdl_reserve. The "free-ing" completes the descriptor's lifecycle.

After free-ing (see vxge_hw_fifo_txdl_free()) the descriptor again can be:

reserved (vxge_hw_fifo_txdl_reserve);

posted (vxge_hw_fifo_txdl_post);

completed (vxge_hw_fifo_txdl_next_completed);

and recycled again (vxge_hw_fifo_txdl_free).

For alternative state transitions and more details please refer to the design doc.

Definition at line 1719 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_fifo_txdl_next_completed	(	struct __vxge_hw_fifo *	fifo,
		void **	txdlh,
		enum vxge_hw_fifo_tcode *	t_code
	)

vxge_hw_fifo_txdl_next_completed - Retrieve next completed descriptor. : Handle to the fifo object used for non offload send : Descriptor handle. Returned by HW. : Transfer code, as per Titan User Guide, Transmit Descriptor Format. Returned by HW.

Retrieve the next completed descriptor. HW uses channel callback (*vxge_hw_channel_callback_f) to notifiy driver of new completed descriptors. After that the driver can use vxge_hw_fifo_txdl_next_completed to retrieve the rest completions (the very first completion is passed by HW via vxge_hw_channel_callback_f).

Implementation-wise, the driver is free to call vxge_hw_fifo_txdl_next_completed either immediately from inside the channel callback, or in a deferred fashion and separate (from HW) context.

Non-zero means failure to process the descriptor. The failure could happen, for instance, when the link is down, in which case Titan completes the descriptor because it is not able to send the data out.

For details please refer to Titan User Guide.

Returns: VXGE_HW_OK - success. VXGE_HW_INF_NO_MORE_COMPLETED_DESCRIPTORS - No completed descriptors are currently available for processing.

Definition at line 1621 of file vxge-traffic.c.

void vxge_hw_fifo_txdl_post	(	struct __vxge_hw_fifo *	fifo,
		void *	txdlh
	)

vxge_hw_fifo_txdl_post - Post descriptor on the fifo channel. : Handle to the fifo object used for non offload send : Descriptor obtained via vxge_hw_fifo_txdl_reserve() : Number of contiguous buffers that are part of a single transmit operation.

Post descriptor on the 'fifo' type channel for transmission. Prior to posting the descriptor should be filled in accordance with Host/Titan interface specification for a given service (LL, etc.).

Definition at line 1557 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_fifo_txdl_reserve	(	struct __vxge_hw_fifo *	fifo,
		void **	txdlh,
		void **	txdl_priv
	)

vxge_hw_fifo_txdl_reserve - Reserve fifo descriptor. : Handle to the fifo object used for non offload send : Reserved descriptor. On success HW fills this "out" parameter with a valid handle. : Buffer to return the pointer to per txdl space

Reserve a single TxDL (that is, fifo descriptor) for the subsequent filling-in by driver) and posting on the corresponding channel () via vxge_hw_fifo_txdl_post().

Note: it is the responsibility of driver to reserve multiple descriptors for lengthy (e.g., LSO) transmit operation. A single fifo descriptor carries up to configured number (fifo.max_frags) of contiguous buffers.

Returns: VXGE_HW_OK - success; VXGE_HW_INF_OUT_OF_DESCRIPTORS - Currently no descriptors available

Definition at line 1453 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_mgmt_reg_read	(	struct __vxge_hw_device *	devh,
		enum vxge_hw_mgmt_reg_type	type,
		u32	index,
		u32	offset,
		u64 *	value
	)

Definition at line 3123 of file vxge-config.c.

enum vxge_hw_status vxge_hw_mgmt_reg_write	(	struct __vxge_hw_device *	devh,
		enum vxge_hw_mgmt_reg_type	type,
		u32	index,
		u32	offset,
		u64	value
	)

Definition at line 3250 of file vxge-config.c.

enum vxge_hw_status vxge_hw_mrpcim_stats_access	(	struct __vxge_hw_device *	devh,
		u32	operation,
		u32	location,
		u32	offset,
		u64 *	stat
	)

Definition at line 1699 of file vxge-config.c.

enum vxge_hw_status vxge_hw_mrpcim_stats_disable ( struct __vxge_hw_device * devh )

enum vxge_hw_status vxge_hw_mrpcim_stats_enable ( struct __vxge_hw_device * devh )

enum vxge_hw_status vxge_hw_ring_handle_tcode	(	struct __vxge_hw_ring *	ring,
		void *	rxdh,
		u8	t_code
	)

vxge_hw_ring_handle_tcode - Handle transfer code. : Handle to the ring object used for receive : Descriptor handle. : One of the enumerated (and documented in the Titan user guide) "transfer codes".

Handle descriptor's transfer code. The latter comes with each completed descriptor.

Returns: one of the enum vxge_hw_status{} enumerated types. VXGE_HW_OK - for success. VXGE_HW_ERR_CRITICAL - when encounters critical error.

Definition at line 1364 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_ring_replenish ( struct __vxge_hw_ring * ring_handle )

Definition at line 2152 of file vxge-config.c.

void vxge_hw_ring_rxd_free	(	struct __vxge_hw_ring *	ring,
		void *	rxdh
	)

vxge_hw_ring_rxd_free - Free descriptor. : Handle to the ring object used for receive : Descriptor handle.

Free the reserved descriptor. This operation is "symmetrical" to vxge_hw_ring_rxd_reserve. The "free-ing" completes the descriptor's lifecycle.

After free-ing (see vxge_hw_ring_rxd_free()) the descriptor again can be:

reserved (vxge_hw_ring_rxd_reserve);

posted (vxge_hw_ring_rxd_post);

completed (vxge_hw_ring_rxd_next_completed);

and recycled again (vxge_hw_ring_rxd_free).

For alternative state transitions and more details please refer to the design doc.

Definition at line 1181 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_ring_rxd_next_completed	(	struct __vxge_hw_ring *	ring,
		void **	rxdh,
		u8 *	t_code
	)

vxge_hw_ring_rxd_next_completed - Get the next completed descriptor. : Handle to the ring object used for receive : Descriptor handle. Returned by HW. : Transfer code, as per Titan User Guide, Receive Descriptor Format. Returned by HW.

Retrieve the next completed descriptor. HW uses ring callback (*vxge_hw_ring_callback_f) to notifiy driver of new completed descriptors. After that the driver can use vxge_hw_ring_rxd_next_completed to retrieve the rest completions (the very first completion is passed by HW via vxge_hw_ring_callback_f).

Implementation-wise, the driver is free to call vxge_hw_ring_rxd_next_completed either immediately from inside the ring callback, or in a deferred fashion and separate (from HW) context.

Non-zero means failure to fill-in receive buffer(s) of the descriptor. For instance, parity error detected during the data transfer. In this case Titan will complete the descriptor and indicate for the host that the received data is not to be used. For details please refer to Titan User Guide.

Returns: VXGE_HW_OK - success. VXGE_HW_INF_NO_MORE_COMPLETED_DESCRIPTORS - No completed descriptors are currently available for processing.

See also: vxge_hw_ring_callback_f{}, vxge_hw_fifo_rxd_next_completed(), enum vxge_hw_status{}.

Definition at line 1299 of file vxge-traffic.c.

void vxge_hw_ring_rxd_post	(	struct __vxge_hw_ring *	ring,
		void *	rxdh
	)

vxge_hw_ring_rxd_post - Post descriptor on the ring. : Handle to the ring object used for receive : Descriptor obtained via vxge_hw_ring_rxd_reserve().

Post descriptor on the ring. Prior to posting the descriptor should be filled in accordance with Host/Titan interface specification for a given service (LL, etc.).

Definition at line 1237 of file vxge-traffic.c.

void vxge_hw_ring_rxd_post_post	(	struct __vxge_hw_ring *	ring,
		void *	rxdh
	)

vxge_hw_ring_rxd_post_post - Process rxd after post. : Handle to the ring object used for receive : Descriptor handle.

Processes rxd after post

Definition at line 1214 of file vxge-traffic.c.

void vxge_hw_ring_rxd_post_post_wmb	(	struct __vxge_hw_ring *	ring,
		void *	rxdh
	)

vxge_hw_ring_rxd_post_post_wmb - Process rxd after post with memory barrier. : Handle to the ring object used for receive : Descriptor handle.

Processes rxd after post with memory barrier.

Definition at line 1260 of file vxge-traffic.c.

void vxge_hw_ring_rxd_pre_post	(	struct __vxge_hw_ring *	ring,
		void *	rxdh
	)

vxge_hw_ring_rxd_pre_post - Prepare rxd and post : Handle to the ring object used for receive : Descriptor handle.

This routine prepares a rxd and posts

Definition at line 1198 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_ring_rxd_reserve	(	struct __vxge_hw_ring *	ring,
		void **	rxdh
	)

vxge_hw_ring_rxd_reserve - Reserve ring descriptor. : Handle to the ring object used for receive : Reserved descriptor. On success HW fills this "out" parameter with a valid handle.

Reserve Rx descriptor for the subsequent filling-in driver and posting on the corresponding channel () via vxge_hw_ring_rxd_post().

Returns: VXGE_HW_OK - success. VXGE_HW_INF_OUT_OF_DESCRIPTORS - Currently no descriptors available.

Definition at line 1137 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_vpath_alarm_process	(	struct __vxge_hw_vpath_handle *	vpath_handle,
		u32	skip_alarms
	)

Definition at line 2222 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_vpath_bcast_enable ( struct __vxge_hw_vpath_handle * vpath_handle )

Definition at line 2125 of file vxge-traffic.c.

void vxge_hw_vpath_dynamic_rti_ci_set ( struct __vxge_hw_ring * ring )

Definition at line 243 of file vxge-traffic.c.

void vxge_hw_vpath_dynamic_rti_rtimer_set ( struct __vxge_hw_ring * ring )

Definition at line 268 of file vxge-traffic.c.

void vxge_hw_vpath_dynamic_tti_rtimer_set ( struct __vxge_hw_fifo * fifo )

Definition at line 252 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_vpath_etype_add	(	struct __vxge_hw_vpath_handle *	vpath_handle,
		u64	etype
	)

enum vxge_hw_status vxge_hw_vpath_etype_delete	(	struct __vxge_hw_vpath_handle *	vpath_handle,
		u64	etype
	)

enum vxge_hw_status vxge_hw_vpath_etype_get	(	struct __vxge_hw_vpath_handle *	vpath_handle,
		u64 *	etype
	)

enum vxge_hw_status vxge_hw_vpath_etype_get_next	(	struct __vxge_hw_vpath_handle *	vpath_handle,
		u64 *	etype
	)

u32 vxge_hw_vpath_id ( struct __vxge_hw_vpath_handle * vpath_handle )

void vxge_hw_vpath_inta_mask_tx_rx ( struct __vxge_hw_vpath_handle * vp )

vxge_hw_vpath_inta_mask_tx_rx - Mask Tx and Rx interrupts. : Virtual Path handle.

Mask Tx and Rx vpath interrupts.

Definition at line 2360 of file vxge-traffic.c.

void vxge_hw_vpath_inta_unmask_tx_rx ( struct __vxge_hw_vpath_handle * vp )

vxge_hw_vpath_inta_unmask_tx_rx - Unmask Tx and Rx interrupts. : Virtual Path handle.

Unmask Tx and Rx vpath interrupts.

Definition at line 2398 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_vpath_intr_disable ( struct __vxge_hw_vpath_handle * vpath_handle )

Definition at line 156 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_vpath_intr_enable ( struct __vxge_hw_vpath_handle * vpath_handle )

Definition at line 30 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_vpath_mac_addr_add	(	struct __vxge_hw_vpath_handle *	vpath_handle,
		u8 *	macaddr,
		u8 *	macaddr_mask,
		enum vxge_hw_vpath_mac_addr_add_mode	duplicate_mode
	)

enum vxge_hw_status vxge_hw_vpath_mac_addr_delete	(	struct __vxge_hw_vpath_handle *	vpath_handle,
		u8 *	macaddr,
		u8 *	macaddr_mask
	)

enum vxge_hw_status vxge_hw_vpath_mac_addr_get	(	struct __vxge_hw_vpath_handle *	vpath_handle,
		u8 *	macaddr,
		u8 *	macaddr_mask
	)

enum vxge_hw_status vxge_hw_vpath_mac_addr_get_next	(	struct __vxge_hw_vpath_handle *	vpath_handle,
		u8 *	macaddr,
		u8 *	macaddr_mask
	)

enum vxge_hw_status vxge_hw_vpath_mcast_disable ( struct __vxge_hw_vpath_handle * vp )

vxge_hw_vpath_mcast_disable - Disable multicast addresses. : Vpath handle.

Disable Titan-e multicast addresses. Returns: VXGE_HW_OK - success. VXGE_HW_ERR_INVALID_HANDLE - Invalid handle

Definition at line 2191 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_vpath_mcast_enable ( struct __vxge_hw_vpath_handle * vp )

vxge_hw_vpath_mcast_enable - Enable multicast addresses. : Vpath handle.

Enable Titan-e multicast addresses. Returns: VXGE_HW_OK on success.

Definition at line 2157 of file vxge-traffic.c.

void vxge_hw_vpath_msix_clear	(	struct __vxge_hw_vpath_handle *	vp,
		int	msix_id
	)

vxge_hw_vpath_msix_clear - Clear MSIX Vector. : Virtual Path handle. : MSI ID

The function clears the msix interrupt for the given msix_id

Returns: 0, Otherwise, VXGE_HW_ERR_WRONG_IRQ if the msix index is out of range status. See also:

Definition at line 2317 of file vxge-traffic.c.

void vxge_hw_vpath_msix_mask	(	struct __vxge_hw_vpath_handle *	vp,
		int	msix_id
	)

vxge_hw_vpath_msix_mask - Mask MSIX Vector. : Virtual Path handle. : MSIX ID

The function masks the msix interrupt for the given msix_id

Returns: 0, Otherwise, VXGE_HW_ERR_WRONG_IRQ if the msix index is out of range status. See also:

Definition at line 2297 of file vxge-traffic.c.

void vxge_hw_vpath_msix_set	(	struct __vxge_hw_vpath_handle *	vp,
		int *	tim_msix_id,
		int	alarm_msix_id
	)

vxge_hw_vpath_msix_set - Associate MSIX vectors with TIM interrupts and alrms : Virtual Path handle. : MSIX vectors associated with VXGE_HW_MAX_INTR_PER_VP number of interrupts(Can be repeated). If fifo or ring are not enabled the MSIX vector for that should be set to 0 : MSIX vector for alarm.

This API will associate a given MSIX vector numbers with the four TIM interrupts and alarm interrupt.

Definition at line 2251 of file vxge-traffic.c.

void vxge_hw_vpath_msix_unmask	(	struct __vxge_hw_vpath_handle *	vp,
		int	msix_id
	)

vxge_hw_vpath_msix_unmask - Unmask the MSIX Vector. : Virtual Path handle. : MSI ID

The function unmasks the msix interrupt for the given msix_id

Returns: 0, Otherwise, VXGE_HW_ERR_WRONG_IRQ if the msix index is out of range status. See also:

Definition at line 2344 of file vxge-traffic.c.

enum vxge_hw_status vxge_hw_vpath_poll_rx ( struct __vxge_hw_ring * ring )

vxge_hw_vpath_poll_rx - Poll Rx Virtual Path for completed descriptors and process the same. : Handle to the ring object used for receive

The function polls the Rx for the completed descriptors and calls the driver via supplied completion callback.

Returns: VXGE_HW_OK, if the polling is completed successful. VXGE_HW_COMPLETIONS_REMAIN: There are still more completed descriptors available which are yet to be processed.

Variable Documentation

struct vxge_hw_device_stats_mrpcim_info __packed

u32 vxge_hw_device_set_intr_type	(	struct __vxge_hw_device *	hldev,
		u32	intr_mode
	)

enum vxge_hw_status vxge_hw_device_stats_get	(	struct __vxge_hw_device *	devh,
		struct vxge_hw_device_stats_hw_info *	hw_stats
	)

enum vxge_hw_status vxge_hw_vpath_poll_tx	(	struct __vxge_hw_fifo *	fifo,
		struct sk_buff ***	skb_ptr,
		int	nr_skb,
		int *	more
	)

enum vxge_hw_status vxge_hw_vpath_vid_add	(	struct __vxge_hw_vpath_handle *	vp,
		u64	vid
	)

enum vxge_hw_status vxge_hw_vpath_vid_delete	(	struct __vxge_hw_vpath_handle *	vp,
		u64	vid
	)

enum vxge_hw_status vxge_hw_vpath_vid_get	(	struct __vxge_hw_vpath_handle *	vp,
		u64 *	vid
	)

Data Structures

Macros

Enumerations

Functions

Variables

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation

Variable Documentation