LLVM API Documentation

AArch64RegisterInfo.h
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00001 //==- AArch64RegisterInfo.h - AArch64 Register Information Impl --*- C++ -*-==//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file contains the AArch64 implementation of the MRegisterInfo class.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERINFO_H
00015 #define LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERINFO_H
00016 
00017 #define GET_REGINFO_HEADER
00018 #include "AArch64GenRegisterInfo.inc"
00019 
00020 namespace llvm {
00021 
00022 class AArch64InstrInfo;
00023 class AArch64Subtarget;
00024 class MachineFunction;
00025 class RegScavenger;
00026 class TargetRegisterClass;
00027 
00028 struct AArch64RegisterInfo : public AArch64GenRegisterInfo {
00029 private:
00030   const AArch64InstrInfo *TII;
00031   const AArch64Subtarget *STI;
00032 
00033 public:
00034   AArch64RegisterInfo(const AArch64InstrInfo *tii, const AArch64Subtarget *sti);
00035 
00036   bool isReservedReg(const MachineFunction &MF, unsigned Reg) const;
00037 
00038   /// Code Generation virtual methods...
00039   const MCPhysReg *
00040   getCalleeSavedRegs(const MachineFunction *MF = nullptr) const override;
00041   const uint32_t *getCallPreservedMask(CallingConv::ID) const override;
00042 
00043   unsigned getCSRFirstUseCost() const override {
00044     // The cost will be compared against BlockFrequency where entry has the
00045     // value of 1 << 14. A value of 5 will choose to spill or split really
00046     // cold path instead of using a callee-saved register.
00047     return 5;
00048   }
00049 
00050   // Calls involved in thread-local variable lookup save more registers than
00051   // normal calls, so they need a different mask to represent this.
00052   const uint32_t *getTLSCallPreservedMask() const;
00053 
00054   /// getThisReturnPreservedMask - Returns a call preserved mask specific to the
00055   /// case that 'returned' is on an i64 first argument if the calling convention
00056   /// is one that can (partially) model this attribute with a preserved mask
00057   /// (i.e. it is a calling convention that uses the same register for the first
00058   /// i64 argument and an i64 return value)
00059   ///
00060   /// Should return NULL in the case that the calling convention does not have
00061   /// this property
00062   const uint32_t *getThisReturnPreservedMask(CallingConv::ID) const;
00063 
00064   BitVector getReservedRegs(const MachineFunction &MF) const override;
00065   const TargetRegisterClass *
00066   getPointerRegClass(const MachineFunction &MF,
00067                      unsigned Kind = 0) const override;
00068   const TargetRegisterClass *
00069   getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
00070 
00071   bool requiresRegisterScavenging(const MachineFunction &MF) const override;
00072   bool useFPForScavengingIndex(const MachineFunction &MF) const override;
00073   bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
00074 
00075   bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
00076   bool isFrameOffsetLegal(const MachineInstr *MI,
00077                           int64_t Offset) const override;
00078   void materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg,
00079                                     int FrameIdx,
00080                                     int64_t Offset) const override;
00081   void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
00082                          int64_t Offset) const override;
00083   void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
00084                            unsigned FIOperandNum,
00085                            RegScavenger *RS = nullptr) const override;
00086   bool cannotEliminateFrame(const MachineFunction &MF) const;
00087 
00088   bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override;
00089   bool hasBasePointer(const MachineFunction &MF) const;
00090   unsigned getBaseRegister() const;
00091 
00092   // Debug information queries.
00093   unsigned getFrameRegister(const MachineFunction &MF) const override;
00094 
00095   unsigned getRegPressureLimit(const TargetRegisterClass *RC,
00096                                MachineFunction &MF) const override;
00097 };
00098 
00099 } // end namespace llvm
00100 
00101 #endif