LLVM API Documentation

AMDGPUSubtarget.cpp
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00001 //===-- AMDGPUSubtarget.cpp - AMDGPU Subtarget Information ----------------===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 /// \file
00011 /// \brief Implements the AMDGPU specific subclass of TargetSubtarget.
00012 //
00013 //===----------------------------------------------------------------------===//
00014 
00015 #include "AMDGPUSubtarget.h"
00016 #include "R600ISelLowering.h"
00017 #include "R600InstrInfo.h"
00018 #include "R600MachineScheduler.h"
00019 #include "SIInstrInfo.h"
00020 #include "SIISelLowering.h"
00021 #include "llvm/ADT/SmallString.h"
00022 
00023 #include "llvm/ADT/SmallString.h"
00024 
00025 using namespace llvm;
00026 
00027 #define DEBUG_TYPE "amdgpu-subtarget"
00028 
00029 #define GET_SUBTARGETINFO_ENUM
00030 #define GET_SUBTARGETINFO_TARGET_DESC
00031 #define GET_SUBTARGETINFO_CTOR
00032 #include "AMDGPUGenSubtargetInfo.inc"
00033 
00034 static std::string computeDataLayout(const AMDGPUSubtarget &ST) {
00035   std::string Ret = "e-p:32:32";
00036 
00037   if (ST.is64bit()) {
00038     // 32-bit private, local, and region pointers. 64-bit global and constant.
00039     Ret += "-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-p24:64:64";
00040   }
00041 
00042   Ret += "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256"
00043          "-v512:512-v1024:1024-v2048:2048-n32:64";
00044 
00045   return Ret;
00046 }
00047 
00048 AMDGPUSubtarget &
00049 AMDGPUSubtarget::initializeSubtargetDependencies(StringRef GPU, StringRef FS) {
00050   // Determine default and user-specified characteristics
00051   // On SI+, we want FP64 denormals to be on by default. FP32 denormals can be
00052   // enabled, but some instructions do not respect them and they run at the
00053   // double precision rate, so don't enable by default.
00054   //
00055   // We want to be able to turn these off, but making this a subtarget feature
00056   // for SI has the unhelpful behavior that it unsets everything else if you
00057   // disable it.
00058 
00059   SmallString<256> FullFS("+promote-alloca,+fp64-denormals,");
00060   FullFS += FS;
00061 
00062   ParseSubtargetFeatures(GPU, FullFS);
00063 
00064   // FIXME: I don't think think Evergreen has any useful support for
00065   // denormals, but should be checked. Should we issue a warning somewhere
00066   // if someone tries to enable these?
00067   if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) {
00068     FP32Denormals = false;
00069     FP64Denormals = false;
00070   }
00071   return *this;
00072 }
00073 
00074 AMDGPUSubtarget::AMDGPUSubtarget(StringRef TT, StringRef GPU, StringRef FS,
00075                                  TargetMachine &TM)
00076     : AMDGPUGenSubtargetInfo(TT, GPU, FS), DevName(GPU), Is64bit(false),
00077       DumpCode(false), R600ALUInst(false), HasVertexCache(false),
00078       TexVTXClauseSize(0), Gen(AMDGPUSubtarget::R600), FP64(false),
00079       FP64Denormals(false), FP32Denormals(false), CaymanISA(false),
00080       FlatAddressSpace(false), EnableIRStructurizer(true),
00081       EnablePromoteAlloca(false), EnableIfCvt(true),
00082       WavefrontSize(0), CFALUBug(false), LocalMemorySize(0),
00083       DL(computeDataLayout(initializeSubtargetDependencies(GPU, FS))),
00084       FrameLowering(TargetFrameLowering::StackGrowsUp,
00085                     64 * 16, // Maximum stack alignment (long16)
00086                     0),
00087       InstrItins(getInstrItineraryForCPU(GPU)) {
00088   if (getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) {
00089     InstrInfo.reset(new R600InstrInfo(*this));
00090     TLInfo.reset(new R600TargetLowering(TM));
00091   } else {
00092     InstrInfo.reset(new SIInstrInfo(*this));
00093     TLInfo.reset(new SITargetLowering(TM));
00094   }
00095 }
00096 
00097 unsigned AMDGPUSubtarget::getStackEntrySize() const {
00098   assert(getGeneration() <= NORTHERN_ISLANDS);
00099   switch(getWavefrontSize()) {
00100   case 16:
00101     return 8;
00102   case 32:
00103     return hasCaymanISA() ? 4 : 8;
00104   case 64:
00105     return 4;
00106   default:
00107     llvm_unreachable("Illegal wavefront size.");
00108   }
00109 }