LLVM API Documentation
00001 //===- llvm/CodeGen/LivePhysRegs.h - Live Physical Register Set -*- C++ -*-===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file implements the LivePhysRegs utility for tracking liveness of 00011 // physical registers. This can be used for ad-hoc liveness tracking after 00012 // register allocation. You can start with the live-ins/live-outs at the 00013 // beginning/end of a block and update the information while walking the 00014 // instructions inside the block. This implementation tracks the liveness on a 00015 // sub-register granularity. 00016 // 00017 // We assume that the high bits of a physical super-register are not preserved 00018 // unless the instruction has an implicit-use operand reading the super- 00019 // register. 00020 // 00021 // X86 Example: 00022 // %YMM0<def> = ... 00023 // %XMM0<def> = ... (Kills %XMM0, all %XMM0s sub-registers, and %YMM0) 00024 // 00025 // %YMM0<def> = ... 00026 // %XMM0<def> = ..., %YMM0<imp-use> (%YMM0 and all its sub-registers are alive) 00027 //===----------------------------------------------------------------------===// 00028 00029 #ifndef LLVM_CODEGEN_LIVEPHYSREGS_H 00030 #define LLVM_CODEGEN_LIVEPHYSREGS_H 00031 00032 #include "llvm/ADT/SparseSet.h" 00033 #include "llvm/CodeGen/MachineBasicBlock.h" 00034 #include "llvm/Target/TargetRegisterInfo.h" 00035 #include <cassert> 00036 00037 namespace llvm { 00038 00039 class MachineInstr; 00040 00041 /// \brief A set of live physical registers with functions to track liveness 00042 /// when walking backward/forward through a basic block. 00043 class LivePhysRegs { 00044 const TargetRegisterInfo *TRI; 00045 SparseSet<unsigned> LiveRegs; 00046 00047 LivePhysRegs(const LivePhysRegs&) LLVM_DELETED_FUNCTION; 00048 LivePhysRegs &operator=(const LivePhysRegs&) LLVM_DELETED_FUNCTION; 00049 public: 00050 /// \brief Constructs a new empty LivePhysRegs set. 00051 LivePhysRegs() : TRI(nullptr), LiveRegs() {} 00052 00053 /// \brief Constructs and initialize an empty LivePhysRegs set. 00054 LivePhysRegs(const TargetRegisterInfo *TRI) : TRI(TRI) { 00055 assert(TRI && "Invalid TargetRegisterInfo pointer."); 00056 LiveRegs.setUniverse(TRI->getNumRegs()); 00057 } 00058 00059 /// \brief Clear and initialize the LivePhysRegs set. 00060 void init(const TargetRegisterInfo *_TRI) { 00061 assert(_TRI && "Invalid TargetRegisterInfo pointer."); 00062 TRI = _TRI; 00063 LiveRegs.clear(); 00064 LiveRegs.setUniverse(TRI->getNumRegs()); 00065 } 00066 00067 /// \brief Clears the LivePhysRegs set. 00068 void clear() { LiveRegs.clear(); } 00069 00070 /// \brief Returns true if the set is empty. 00071 bool empty() const { return LiveRegs.empty(); } 00072 00073 /// \brief Adds a physical register and all its sub-registers to the set. 00074 void addReg(unsigned Reg) { 00075 assert(TRI && "LivePhysRegs is not initialized."); 00076 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); 00077 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); 00078 SubRegs.isValid(); ++SubRegs) 00079 LiveRegs.insert(*SubRegs); 00080 } 00081 00082 /// \brief Removes a physical register, all its sub-registers, and all its 00083 /// super-registers from the set. 00084 void removeReg(unsigned Reg) { 00085 assert(TRI && "LivePhysRegs is not initialized."); 00086 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); 00087 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); 00088 SubRegs.isValid(); ++SubRegs) 00089 LiveRegs.erase(*SubRegs); 00090 for (MCSuperRegIterator SuperRegs(Reg, TRI, /*IncludeSelf=*/false); 00091 SuperRegs.isValid(); ++SuperRegs) 00092 LiveRegs.erase(*SuperRegs); 00093 } 00094 00095 /// \brief Removes physical registers clobbered by the regmask operand @p MO. 00096 void removeRegsInMask(const MachineOperand &MO); 00097 00098 /// \brief Returns true if register @p Reg is contained in the set. This also 00099 /// works if only the super register of @p Reg has been defined, because we 00100 /// always add also all sub-registers to the set. 00101 bool contains(unsigned Reg) const { return LiveRegs.count(Reg); } 00102 00103 /// \brief Simulates liveness when stepping backwards over an 00104 /// instruction(bundle): Remove Defs, add uses. This is the recommended way of 00105 /// calculating liveness. 00106 void stepBackward(const MachineInstr &MI); 00107 00108 /// \brief Simulates liveness when stepping forward over an 00109 /// instruction(bundle): Remove killed-uses, add defs. This is the not 00110 /// recommended way, because it depends on accurate kill flags. If possible 00111 /// use stepBackwards() instead of this function. 00112 void stepForward(const MachineInstr &MI); 00113 00114 /// \brief Adds all live-in registers of basic block @p MBB. 00115 void addLiveIns(const MachineBasicBlock *MBB) { 00116 for (MachineBasicBlock::livein_iterator LI = MBB->livein_begin(), 00117 LE = MBB->livein_end(); LI != LE; ++LI) 00118 addReg(*LI); 00119 } 00120 00121 /// \brief Adds all live-out registers of basic block @p MBB. 00122 void addLiveOuts(const MachineBasicBlock *MBB) { 00123 for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(), 00124 SE = MBB->succ_end(); SI != SE; ++SI) 00125 addLiveIns(*SI); 00126 } 00127 00128 typedef SparseSet<unsigned>::const_iterator const_iterator; 00129 const_iterator begin() const { return LiveRegs.begin(); } 00130 const_iterator end() const { return LiveRegs.end(); } 00131 00132 /// \brief Prints the currently live registers to @p OS. 00133 void print(raw_ostream &OS) const; 00134 00135 /// \brief Dumps the currently live registers to the debug output. 00136 void dump() const; 00137 }; 00138 00139 inline raw_ostream &operator<<(raw_ostream &OS, const LivePhysRegs& LR) { 00140 LR.print(OS); 00141 return OS; 00142 } 00143 00144 } // namespace llvm 00145 00146 #endif