LLVM API Documentation

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llvm::MachineOperand Class Reference

#include <MachineOperand.h>

Collaboration diagram for llvm::MachineOperand:
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List of all members.

Public Types

enum  MachineOperandType {
  MO_Register, MO_Immediate, MO_CImmediate, MO_FPImmediate,
  MO_MachineBasicBlock, MO_FrameIndex, MO_ConstantPoolIndex, MO_TargetIndex,
  MO_JumpTableIndex, MO_ExternalSymbol, MO_GlobalAddress, MO_BlockAddress,
  MO_RegisterMask, MO_RegisterLiveOut, MO_Metadata, MO_MCSymbol,
  MO_CFIIndex
}

Public Member Functions

MachineOperandType getType () const
unsigned getTargetFlags () const
void setTargetFlags (unsigned F)
void addTargetFlag (unsigned F)
MachineInstrgetParent ()
const MachineInstrgetParent () const
void clearParent ()
void print (raw_ostream &os, const TargetMachine *TM=nullptr) const
bool isReg () const
 isReg - Tests if this is a MO_Register operand.
bool isImm () const
 isImm - Tests if this is a MO_Immediate operand.
bool isCImm () const
 isCImm - Test if this is a MO_CImmediate operand.
bool isFPImm () const
 isFPImm - Tests if this is a MO_FPImmediate operand.
bool isMBB () const
 isMBB - Tests if this is a MO_MachineBasicBlock operand.
bool isFI () const
 isFI - Tests if this is a MO_FrameIndex operand.
bool isCPI () const
 isCPI - Tests if this is a MO_ConstantPoolIndex operand.
bool isTargetIndex () const
 isTargetIndex - Tests if this is a MO_TargetIndex operand.
bool isJTI () const
 isJTI - Tests if this is a MO_JumpTableIndex operand.
bool isGlobal () const
 isGlobal - Tests if this is a MO_GlobalAddress operand.
bool isSymbol () const
 isSymbol - Tests if this is a MO_ExternalSymbol operand.
bool isBlockAddress () const
 isBlockAddress - Tests if this is a MO_BlockAddress operand.
bool isRegMask () const
 isRegMask - Tests if this is a MO_RegisterMask operand.
bool isRegLiveOut () const
 isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
bool isMetadata () const
 isMetadata - Tests if this is a MO_Metadata operand.
bool isMCSymbol () const
bool isCFIIndex () const
unsigned getReg () const
 getReg - Returns the register number.
unsigned getSubReg () const
bool isUse () const
bool isDef () const
bool isImplicit () const
bool isDead () const
bool isKill () const
bool isUndef () const
bool isInternalRead () const
bool isEarlyClobber () const
bool isTied () const
bool isDebug () const
bool readsReg () const
void setReg (unsigned Reg)
void setSubReg (unsigned subReg)
void substVirtReg (unsigned Reg, unsigned SubIdx, const TargetRegisterInfo &)
void substPhysReg (unsigned Reg, const TargetRegisterInfo &)
void setIsUse (bool Val=true)
void setIsDef (bool Val=true)
 Change a def to a use, or a use to a def.
void setImplicit (bool Val=true)
void setIsKill (bool Val=true)
void setIsDead (bool Val=true)
void setIsUndef (bool Val=true)
void setIsInternalRead (bool Val=true)
void setIsEarlyClobber (bool Val=true)
void setIsDebug (bool Val=true)
int64_t getImm () const
const ConstantIntgetCImm () const
const ConstantFPgetFPImm () const
MachineBasicBlockgetMBB () const
int getIndex () const
const GlobalValuegetGlobal () const
const BlockAddressgetBlockAddress () const
MCSymbolgetMCSymbol () const
unsigned getCFIIndex () const
int64_t getOffset () const
const char * getSymbolName () const
bool clobbersPhysReg (unsigned PhysReg) const
 clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
const uint32_t * getRegMask () const
const uint32_t * getRegLiveOut () const
 getRegLiveOut - Returns a bit mask of live-out registers.
const MDNodegetMetadata () const
void setImm (int64_t immVal)
void setOffset (int64_t Offset)
void setIndex (int Idx)
void setMBB (MachineBasicBlock *MBB)
bool isIdenticalTo (const MachineOperand &Other) const
void ChangeToImmediate (int64_t ImmVal)
void ChangeToRegister (unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isDebug=false)

Static Public Member Functions

static bool clobbersPhysReg (const uint32_t *RegMask, unsigned PhysReg)
static MachineOperand CreateImm (int64_t Val)
static MachineOperand CreateCImm (const ConstantInt *CI)
static MachineOperand CreateFPImm (const ConstantFP *CFP)
static MachineOperand CreateReg (unsigned Reg, bool isDef, bool isImp=false, bool isKill=false, bool isDead=false, bool isUndef=false, bool isEarlyClobber=false, unsigned SubReg=0, bool isDebug=false, bool isInternalRead=false)
static MachineOperand CreateMBB (MachineBasicBlock *MBB, unsigned char TargetFlags=0)
static MachineOperand CreateFI (int Idx)
static MachineOperand CreateCPI (unsigned Idx, int Offset, unsigned char TargetFlags=0)
static MachineOperand CreateTargetIndex (unsigned Idx, int64_t Offset, unsigned char TargetFlags=0)
static MachineOperand CreateJTI (unsigned Idx, unsigned char TargetFlags=0)
static MachineOperand CreateGA (const GlobalValue *GV, int64_t Offset, unsigned char TargetFlags=0)
static MachineOperand CreateES (const char *SymName, unsigned char TargetFlags=0)
static MachineOperand CreateBA (const BlockAddress *BA, int64_t Offset, unsigned char TargetFlags=0)
static MachineOperand CreateRegMask (const uint32_t *Mask)
static MachineOperand CreateRegLiveOut (const uint32_t *Mask)
static MachineOperand CreateMetadata (const MDNode *Meta)
static MachineOperand CreateMCSymbol (MCSymbol *Sym)
static MachineOperand CreateCFIIndex (unsigned CFIIndex)

Friends

class MachineInstr
class MachineRegisterInfo
hash_code hash_value (const MachineOperand &MO)
 MachineOperand hash_value overload.

Detailed Description

MachineOperand class - Representation of each machine instruction operand.

This class isn't a POD type because it has a private constructor, but its destructor must be trivial. Functions like MachineInstr::addOperand(), MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on not having to call the MachineOperand destructor.

Definition at line 43 of file MachineOperand.h.


Member Enumeration Documentation

Enumerator:
MO_Register 

Register operand.

MO_Immediate 

Immediate operand.

MO_CImmediate 

Immediate >64bit operand.

MO_FPImmediate 

Floating-point immediate operand.

MO_MachineBasicBlock 

MachineBasicBlock reference.

MO_FrameIndex 

Abstract Stack Frame Index.

MO_ConstantPoolIndex 

Address of indexed Constant in Constant Pool.

MO_TargetIndex 

Target-dependent index+offset operand.

MO_JumpTableIndex 

Address of indexed Jump Table for switch.

MO_ExternalSymbol 

Name of external global symbol.

MO_GlobalAddress 

Address of a global value.

MO_BlockAddress 

Address of a basic block.

MO_RegisterMask 

Mask of preserved registers.

MO_RegisterLiveOut 

Mask of live-out registers.

MO_Metadata 

Metadata reference (for debug info)

MO_MCSymbol 

MCSymbol reference (for debug/eh info)

MO_CFIIndex 

MCCFIInstruction index.

Definition at line 45 of file MachineOperand.h.


Member Function Documentation

Definition at line 198 of file MachineOperand.h.

References F(), and isReg().

Referenced by llvm::HexagonInstrInfo::immediateExtend().

void MachineOperand::ChangeToImmediate ( int64_t  ImmVal)
void MachineOperand::ChangeToRegister ( unsigned  Reg,
bool  isDef,
bool  isImp = false,
bool  isKill = false,
bool  isDead = false,
bool  isUndef = false,
bool  isDebug = false 
)

clearParent - Reset the parent pointer.

The MachineOperand copy constructor also copies ParentMI, expecting the original to be deleted. If a MachineOperand is ever stored outside a MachineInstr, the parent pointer must be cleared.

Never call clearParent() on an operand in a MachineInstr.

Definition at line 218 of file MachineOperand.h.

static bool llvm::MachineOperand::clobbersPhysReg ( const uint32_t *  RegMask,
unsigned  PhysReg 
) [inline, static]

clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.

Definition at line 478 of file MachineOperand.h.

References clobbersPhysReg(), and getRegMask().

static MachineOperand llvm::MachineOperand::CreateBA ( const BlockAddress BA,
int64_t  Offset,
unsigned char  TargetFlags = 0 
) [inline, static]
static MachineOperand llvm::MachineOperand::CreateCFIIndex ( unsigned  CFIIndex) [inline, static]

Definition at line 696 of file MachineOperand.h.

References CFIIndex, and MO_CFIIndex.

Referenced by llvm::MachineInstrBuilder::addCFIIndex().

Definition at line 564 of file MachineOperand.h.

References CI, and MO_CImmediate.

Referenced by llvm::MachineInstrBuilder::addCImm().

static MachineOperand llvm::MachineOperand::CreateCPI ( unsigned  Idx,
int  Offset,
unsigned char  TargetFlags = 0 
) [inline, static]
static MachineOperand llvm::MachineOperand::CreateES ( const char *  SymName,
unsigned char  TargetFlags = 0 
) [inline, static]
static MachineOperand llvm::MachineOperand::CreateFI ( int  Idx) [inline, static]

Definition at line 570 of file MachineOperand.h.

References CFP, and MO_FPImmediate.

Referenced by llvm::MachineInstrBuilder::addFPImm().

static MachineOperand llvm::MachineOperand::CreateGA ( const GlobalValue GV,
int64_t  Offset,
unsigned char  TargetFlags = 0 
) [inline, static]
static MachineOperand llvm::MachineOperand::CreateImm ( int64_t  Val) [inline, static]
static MachineOperand llvm::MachineOperand::CreateJTI ( unsigned  Idx,
unsigned char  TargetFlags = 0 
) [inline, static]
static MachineOperand llvm::MachineOperand::CreateMBB ( MachineBasicBlock MBB,
unsigned char  TargetFlags = 0 
) [inline, static]

Definition at line 601 of file MachineOperand.h.

References MO_MachineBasicBlock, setMBB(), and setTargetFlags().

Referenced by llvm::MachineInstrBuilder::addMBB().

static MachineOperand llvm::MachineOperand::CreateMCSymbol ( MCSymbol Sym) [inline, static]

Definition at line 690 of file MachineOperand.h.

References MO_MCSymbol, and Sym.

Referenced by llvm::MachineInstrBuilder::addSym().

static MachineOperand llvm::MachineOperand::CreateMetadata ( const MDNode Meta) [inline, static]

Definition at line 684 of file MachineOperand.h.

References MD, and MO_Metadata.

Referenced by llvm::MachineInstrBuilder::addMetadata().

static MachineOperand llvm::MachineOperand::CreateReg ( unsigned  Reg,
bool  isDef,
bool  isImp = false,
bool  isKill = false,
bool  isDead = false,
bool  isUndef = false,
bool  isEarlyClobber = false,
unsigned  SubReg = 0,
bool  isDebug = false,
bool  isInternalRead = false 
) [inline, static]
static MachineOperand llvm::MachineOperand::CreateRegLiveOut ( const uint32_t *  Mask) [inline, static]

Definition at line 678 of file MachineOperand.h.

References MO_RegisterLiveOut, and RegMask.

static MachineOperand llvm::MachineOperand::CreateRegMask ( const uint32_t *  Mask) [inline, static]

CreateRegMask - Creates a register mask operand referencing Mask. The operand does not take ownership of the memory referenced by Mask, it must remain valid for the lifetime of the operand.

A RegMask operand represents a set of non-clobbered physical registers on an instruction that clobbers many registers, typically a call. The bit mask has a bit set for each physreg that is preserved by this instruction, as described in the documentation for TargetRegisterInfo::getCallPreservedMask().

Any physreg with a 0 bit in the mask is clobbered by the instruction.

Definition at line 672 of file MachineOperand.h.

References MO_RegisterMask, and RegMask.

Referenced by llvm::MachineInstrBuilder::addRegMask(), and llvm::FastISel::selectPatchpoint().

static MachineOperand llvm::MachineOperand::CreateTargetIndex ( unsigned  Idx,
int64_t  Offset,
unsigned char  TargetFlags = 0 
) [inline, static]

Definition at line 448 of file MachineOperand.h.

References isCFIIndex().

Referenced by llvm::AsmPrinter::emitCFIInstruction(), llvm::hash_value(), and isIdenticalTo().

Definition at line 412 of file MachineOperand.h.

References isCImm().

Referenced by emitDebugValueComment(), getDebugLocValue(), llvm::hash_value(), and isIdenticalTo().

int64_t llvm::MachineOperand::getImm ( ) const [inline]

Definition at line 407 of file MachineOperand.h.

References isImm().

Referenced by llvm::DwarfUnit::addConstantValue(), llvm::MachineInstrBuilder::addDisp(), llvm::R600InstrInfo::addFlag(), adjustDefLatency(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::HexagonInstrInfo::analyzeCompare(), llvm::SystemZInstrInfo::analyzeCompare(), llvm::AArch64InstrInfo::analyzeCompare(), llvm::PPCInstrInfo::analyzeCompare(), llvm::ARMBaseInstrInfo::analyzeCompare(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canCompareBeNewValueJump(), canFoldIntoCSel(), canShrink(), llvm::R600InstrInfo::clearFlag(), llvm::SIInstrInfo::commuteInstruction(), llvm::PPCInstrInfo::commuteInstruction(), compareMachineOp(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::SystemZInstrInfo::convertToThreeAddress(), llvm::SparcFrameLowering::eliminateCallFramePseudoInstr(), llvm::MSP430FrameLowering::eliminateCallFramePseudoInstr(), llvm::XCoreFrameLowering::eliminateCallFramePseudoInstr(), llvm::Thumb1FrameLowering::eliminateCallFramePseudoInstr(), llvm::MSP430RegisterInfo::eliminateFrameIndex(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::SparcRegisterInfo::eliminateFrameIndex(), llvm::NVPTXRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), emitDebugValueComment(), llvm::PPCFrameLowering::emitEpilogue(), llvm::AArch64FrameLowering::emitEpilogue(), llvm::X86FrameLowering::emitEpilogue(), llvm::AArch64TargetLowering::EmitF128CSEL(), EmitGCCInlineAsmStr(), llvm::SystemZAsmPrinter::EmitInstruction(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::X86AsmPrinter::EmitInstruction(), llvm::MipsAsmPrinter::EmitInstruction(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::MSP430TargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::ARMAsmPrinter::EmitJump2Table(), llvm::ARMAsmPrinter::EmitJumpTable(), EmitMSInlineAsmStr(), llvm::SparcTargetLowering::expandSelectCC(), llvm::MachineInstr::findInlineAsmFlagIdx(), llvm::MachineInstr::findTiedOperandIdx(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldImmediates(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), llvm::SystemZInstrInfo::getBranchInfo(), llvm::SystemZInstrInfo::getCompareAndBranch(), getDebugLocValue(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseRegisterInfo::getFrameIndexInstrOffset(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), llvm::getInstrPredicate(), llvm::MipsInstrInfo::GetInstSizeInBytes(), llvm::ARMBaseInstrInfo::GetInstSizeInBytes(), llvm::SIInstrInfo::getLdStBaseRegImmOfs(), llvm::AArch64InstrInfo::getLdStBaseRegImmOfs(), llvm::AArch64InstrInfo::getLdStBaseRegImmOfsWidth(), llvm::NVPTXInstrInfo::getLdStCodeAddrSpace(), getMemoryOpOffset(), getNumMicroOpsSwiftLdSt(), llvm::ARMBaseInstrInfo::getPredicate(), llvm::TargetInstrInfo::getRegSequenceInputs(), getSrcFromCopy(), llvm::R600InstrInfo::getSrcs(), getTruncatedShiftCount(), llvm::PatchPointOpers::getVarIdx(), llvm::AArch64InstrInfo::hasExtendedReg(), llvm::hash_value(), HashMachineInstr(), llvm::AArch64InstrInfo::hasShiftedReg(), llvm::HexagonLowerToMC(), INITIALIZE_PASS(), invertBccCondition(), llvm::isAArch64FrameOffsetLegal(), llvm::AArch64InstrInfo::isAsCheapAsAMove(), llvm::AArch64InstrInfo::isCoalescableExtInstr(), isCompareZero(), llvm::HexagonInstrInfo::isConstExtended(), llvm::PPCRegisterInfo::isFrameOffsetLegal(), llvm::AArch64InstrInfo::isGPRCopy(), llvm::AArch64InstrInfo::isGPRZero(), isGreaterThan6BitTFRI(), isGreaterThan8BitTFRI(), isIdenticalTo(), llvm::SIInstrInfo::isInlineConstant(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), isMatchingDecrement(), isMatchingIncrement(), isMatchingUpdateInsn(), llvm::isParamLoad(), llvm::HexagonInstrInfo::isPredicable(), llvm::R600InstrInfo::isPredicable(), llvm::ARMBaseInstrInfo::isPredicated(), isRedundantFlagInstr(), llvm::isScale(), llvm::AArch64InstrInfo::isScaledAddr(), isShift(), isSimpleBD12Move(), isSimpleMove(), llvm::SystemZInstrInfo::isStackSlotCopy(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), isSuitableForMask(), llvm::ARMBaseInstrInfo::isSwiftFastImmShift(), isZeroImm(), llvm::MipsInstrInfo::isZeroImm(), llvm::SIInstrInfo::legalizeOperands(), llvm::MSP430MCInstLower::Lower(), llvm::XCoreMCInstLower::LowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::SystemZMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), lowerRIEfLow(), lowerRIHigh(), lowerRILow(), llvm::MachineInstr::mayLoad(), llvm::MachineInstr::mayStore(), llvm::SIInstrInfo::moveSMRDToVALU(), llvm::SIInstrInfo::moveToVALU(), llvm::PPCRegisterInfo::needsFrameBaseReg(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::HexagonInstrInfo::PredicateInstruction(), llvm::MachineInstr::print(), llvm::SystemZAsmPrinter::PrintAsmMemoryOperand(), llvm::HexagonAsmPrinter::PrintAsmMemoryOperand(), llvm::SystemZAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), llvm::AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::printFCCOperand(), printIntelMemReference(), printLeaMemReference(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printOperand(), printPCRelImm(), llvm::MipsAsmPrinter::printUnsignedImm(), llvm::MipsAsmPrinter::printUnsignedImm8(), llvm::StackMaps::recordStackMap(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::R600InstrInfo::ReverseBranchCondition(), llvm::rewriteAArch64FrameIndex(), llvm::rewriteARMFrameIndex(), llvm::Thumb1RegisterInfo::rewriteFrameIndex(), llvm::rewriteT2FrameIndex(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::AArch64InstrInfo::shouldClusterLoads(), and llvm::SIInstrInfo::splitSMRD().

int llvm::MachineOperand::getIndex ( ) const [inline]

Definition at line 427 of file MachineOperand.h.

References isCPI(), isFI(), isJTI(), and isTargetIndex().

Referenced by llvm::ARMBaseInstrInfo::duplicate(), llvm::SIRegisterInfo::eliminateFrameIndex(), llvm::MSP430RegisterInfo::eliminateFrameIndex(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::SparcRegisterInfo::eliminateFrameIndex(), llvm::NVPTXRegisterInfo::eliminateFrameIndex(), llvm::Thumb1RegisterInfo::eliminateFrameIndex(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::MipsRegisterInfo::eliminateFrameIndex(), llvm::AArch64RegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), emitDebugValueComment(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::X86AsmPrinter::EmitInstruction(), llvm::MipsAsmPrinter::EmitInstruction(), llvm::ARMAsmPrinter::EmitJump2Table(), llvm::ARMAsmPrinter::EmitJumpTable(), llvm::TargetLoweringBase::emitPatchPoint(), llvm::MSP430MCInstLower::GetConstantPoolIndexSymbol(), llvm::SystemZMCInstLower::getExpr(), llvm::ARMBaseInstrInfo::GetInstSizeInBytes(), llvm::MSP430MCInstLower::GetJumpTableSymbol(), llvm::hash_value(), HashMachineInstr(), llvm::HexagonLowerToMC(), isIdenticalTo(), llvm::MipsSEInstrInfo::isLoadFromStackSlot(), llvm::XCoreInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), isSimpleMove(), llvm::SystemZInstrInfo::isStackSlotCopy(), llvm::MipsSEInstrInfo::isStoreToStackSlot(), llvm::XCoreInstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), llvm::AArch64MCInstLower::lowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), LowerSymbolOperand(), MatchingStackOffset(), llvm::BranchFolder::OptimizeFunction(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printSymbolOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), and llvm::ARMBaseInstrInfo::reMaterialize().

Definition at line 443 of file MachineOperand.h.

References isMCSymbol().

Referenced by llvm::hash_value(), and isIdenticalTo().

int64_t llvm::MachineOperand::getOffset ( ) const [inline]

Definition at line 208 of file MachineOperand.h.

getReg - Returns the register number.

Definition at line 264 of file MachineOperand.h.

References isReg().

Referenced by addLiveInRegs(), llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), llvm::MachineRegisterInfo::addRegOperandToUseList(), llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), llvm::ScheduleDAGInstrs::addVRegDefDeps(), llvm::ScheduleDAGInstrs::addVRegUseDeps(), llvm::SITargetLowering::AdjustInstrPostInstrSelection(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::HexagonInstrInfo::analyzeCompare(), llvm::SystemZInstrInfo::analyzeCompare(), llvm::AArch64InstrInfo::analyzeCompare(), llvm::PPCInstrInfo::analyzeCompare(), llvm::ARMBaseInstrInfo::analyzeCompare(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), biasPhysRegCopy(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::ARMBaseInstrInfo::breakPartialRegDependency(), llvm::ScheduleDAGInstrs::buildSchedGraph(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canCombineWithMUL(), canCompareBeNewValueJump(), canFoldCopy(), canFoldIntoCSel(), canFoldIntoMOVCC(), llvm::MachineInstr::clearRegisterKills(), clobbersCTR(), RegisterOperands::collect(), collectDebugValues(), llvm::SIInstrInfo::commuteInstruction(), llvm::PPCInstrInfo::commuteInstruction(), llvm::TargetInstrInfo::commuteInstruction(), compareMachineOp(), computeOthers(), llvm::TargetSchedModel::computeOutputLatency(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::SystemZInstrInfo::convertToThreeAddress(), copyHint(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::CreateEmptyPHI(), definesCPSR(), llvm::HexagonInstrInfo::DefinesPredicate(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), llvm::MSP430RegisterInfo::eliminateFrameIndex(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::SparcRegisterInfo::eliminateFrameIndex(), llvm::Thumb1RegisterInfo::eliminateFrameIndex(), llvm::HexagonRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::ARMBaseRegisterInfo::eliminateFrameIndex(), llvm::PPCTargetLowering::EmitAtomicBinary(), emitDebugValueComment(), llvm::PPCTargetLowering::emitEHSjLjLongJmp(), llvm::PPCTargetLowering::emitEHSjLjSetJmp(), llvm::ARMFrameLowering::emitEpilogue(), llvm::X86FrameLowering::emitEpilogue(), llvm::AArch64TargetLowering::EmitF128CSEL(), llvm::AsmPrinter::emitImplicitDef(), llvm::SystemZAsmPrinter::EmitInstruction(), llvm::ARMAsmPrinter::EmitInstruction(), llvm::X86AsmPrinter::EmitInstruction(), llvm::R600TargetLowering::EmitInstrWithCustomInserter(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::XCoreTargetLowering::EmitInstrWithCustomInserter(), llvm::MSP430TargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), emitKill(), EmitMonitor(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), EmitPCMPSTRI(), EmitPCMPSTRM(), llvm::MSP430TargetLowering::EmitShiftInstr(), EmitXBegin(), llvm::MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval(), eraseGPOpnd(), eraseIfDead(), Expand2AddrUndef(), llvm::SparcTargetLowering::expandAtomicRMW(), expandLoadStackGuard(), llvm::SparcTargetLowering::expandSelectCC(), findDeadCallerSavedReg(), findHoistingInsertPosAndDeps(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::MachineInstr::findRegisterUseOperandIdx(), finishConvertToThreeAddress(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldImmediates(), llvm::TargetInstrInfo::foldMemoryOperand(), llvm::AArch64InstrInfo::foldMemoryOperandImpl(), llvm::SystemZInstrInfo::foldMemoryOperandImpl(), foldPatchpoint(), forceReg(), llvm::RegScavenger::forward(), genMadd(), genMaddR(), getCallTargetRegOpnd(), getDebugLocValue(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::ARMBaseInstrInfo::getExtractSubregLikeInputs(), getFPReg(), llvm::MachineInstrExpressionTrait::getHashValue(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::ARMBaseInstrInfo::getInsertSubregLikeInputs(), llvm::getInstrPredicate(), llvm::SIInstrInfo::getLdStBaseRegImmOfs(), llvm::AArch64InstrInfo::getLdStBaseRegImmOfs(), llvm::AArch64InstrInfo::getLdStBaseRegImmOfsWidth(), getNumMicroOpsSwiftLdSt(), llvm::PPCInstrInfo::getOperandLatency(), llvm::ARMBaseInstrInfo::getOperandLatency(), llvm::SIInstrInfo::getOpRegClass(), llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance(), getPHIDeps(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::GetPHIValue(), GetPostIncrementOperand(), getPredicatedRegister(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::ARMBaseInstrInfo::getRegSequenceLikeInputs(), getSrcFromCopy(), llvm::R600InstrInfo::getSrcs(), llvm::SSAUpdaterTraits< MachineSSAUpdater >::GetUndefVal(), llvm::MachineSSAUpdater::GetValueInMiddleOfBlock(), HandleVRSaveUpdate(), llvm::hash_value(), HashMachineInstr(), hasLiveCondCodeDef(), hasRAWHazard(), hasVGPROperands(), hasYmmReg(), llvm::HexagonLowerToMC(), INITIALIZE_PASS(), insertDivByZeroTrap(), isCandidateStore(), llvm::AArch64InstrInfo::isCoalescableExtInstr(), llvm::PPCInstrInfo::isCoalescableExtInstr(), llvm::MachineInstr::isConstantValuePHI(), isCopyToReg(), llvm::IsCPSRDead< MachineInstr >(), isCSRestore(), llvm::isDescribedByReg(), llvm::AArch64InstrInfo::isFPRCopy(), isFullCopyOf(), llvm::AArch64InstrInfo::isGPRCopy(), llvm::AArch64InstrInfo::isGPRZero(), isIdenticalTo(), llvm::MachineInstr::isIdenticalTo(), llvm::MachineInstr::isIdentityCopy(), llvm::MipsSEInstrInfo::isLoadFromStackSlot(), llvm::XCoreInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), isLocalCopy(), isMatchingDecrement(), isMatchingIncrement(), isMatchingUpdateInsn(), llvm::NVPTXInstrInfo::isMoveInstr(), isNopCopy(), isOperandKill(), llvm::SIInstrInfo::isOperandLegal(), isPartialRegisterLoad(), isPhysicalRegCopy(), llvm::R600InstrInfo::isPredicated(), isRedundantFlagInstr(), IsSafeAndProfitableToMove(), isShift(), isSimpleBD12Move(), isSimpleMove(), isSourceDefinedByImplicitDef(), llvm::MipsSEInstrInfo::isStoreToStackSlot(), llvm::XCoreInstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), isSuitableForMask(), isTwoAddrUse(), isVGPR(), llvm::final< T >::isX86_64ExtendedReg(), llvm::SIInstrInfo::legalizeOperands(), llvm::Mips16InstrInfo::loadImmediate(), llvm::MSP430MCInstLower::Lower(), llvm::PPCRegisterInfo::lowerCRBitRestore(), llvm::PPCRegisterInfo::lowerCRBitSpilling(), llvm::PPCRegisterInfo::lowerCRRestore(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), llvm::XCoreMCInstLower::LowerOperand(), llvm::MipsMCInstLower::LowerOperand(), llvm::SystemZMCInstLower::lowerOperand(), llvm::AArch64MCInstLower::lowerOperand(), LowerOperand(), llvm::ARMAsmPrinter::lowerOperand(), llvm::LowerPPCMachineInstrToMCInst(), lowerRIEfLow(), lowerRIHigh(), lowerRILow(), llvm::PPCRegisterInfo::lowerVRSAVERestore(), llvm::PPCRegisterInfo::lowerVRSAVESpilling(), MaySpeculate(), MIIsInTerminatorSequence(), llvm::MachineRegisterInfo::moveOperands(), llvm::SIInstrInfo::moveSMRDToVALU(), llvm::SIInstrInfo::moveToVALU(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::PPCInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeSelect(), llvm::HexagonInstrInfo::PredicateInstruction(), print(), llvm::MachineInstr::print(), llvm::SystemZAsmPrinter::PrintAsmMemoryOperand(), llvm::ARMAsmPrinter::PrintAsmMemoryOperand(), llvm::MipsAsmPrinter::PrintAsmMemoryOperand(), printAsmMRegister(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), printIntelMemReference(), printLeaMemReference(), printMemReference(), llvm::HexagonAsmPrinter::printOperand(), llvm::ARMAsmPrinter::printOperand(), llvm::MipsAsmPrinter::printOperand(), printOperand(), llvm::ARMBaseInstrInfo::produceSameValue(), llvm::MachineInstr::readsWritesVirtualRegister(), registerADRCandidate(), llvm::ARMBaseInstrInfo::reMaterialize(), llvm::TargetInstrInfo::reMaterialize(), removeCopies(), removeIPMBasedCompare(), removeKillInfo(), llvm::MachineRegisterInfo::removeRegOperandFromUseList(), llvm::LiveVariables::removeVirtualRegisterDead(), llvm::LiveVariables::removeVirtualRegisterKilled(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::LiveIntervals::repairIntervalsInRange(), llvm::PPCFrameLowering::replaceFPWithRealFP(), resultTests(), llvm::R600InstrInfo::ReverseBranchCondition(), llvm::rewriteAArch64FrameIndex(), llvm::Thumb1RegisterInfo::rewriteFrameIndex(), llvm::rewriteT2FrameIndex(), llvm::SelectionDAGISel::runOnMachineFunction(), llvm::Thumb1RegisterInfo::saveScavengerRegister(), llvm::RegScavenger::scavengeRegister(), llvm::R600SchedStrategy::schedNode(), llvm::FastISel::selectIntrinsicCall(), llvm::ARMBaseInstrInfo::setExecutionDomain(), llvm::MachineInstr::setPhysRegsDeadExcept(), setReg(), llvm::MachineBasicBlock::SplitCriticalEdge(), llvm::MachineInstr::substituteRegister(), llvm::ScheduleDAGInstrs::toggleKillFlag(), TrackDefUses(), trackRegDefsUses(), transferImpOps(), llvm::tryFoldSPUpdateIntoPushPop(), tryOrrMovk(), trySequenceOfOnes(), tryToreplicateChunks(), UpdateCPSRDef(), UpdateCPSRUse(), llvm::AntiDepBreaker::UpdateDbgValue(), UpdateOperandRegClass(), updatePhysDepsDownwards(), updatePhysDepsUpwards(), llvm::SIInstrInfo::verifyInstruction(), VerifyLowRegs(), and llvm::MachineRegisterInfo::verifyUseList().

const uint32_t* llvm::MachineOperand::getRegLiveOut ( ) const [inline]

getRegLiveOut - Returns a bit mask of live-out registers.

Definition at line 490 of file MachineOperand.h.

References isRegLiveOut().

const uint32_t* llvm::MachineOperand::getRegMask ( ) const [inline]

getRegMask - Returns a bit mask of registers preserved by this RegMask operand.

Definition at line 484 of file MachineOperand.h.

References isRegMask().

Referenced by clobbersPhysReg(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::hash_value(), isIdenticalTo(), and trackRegDefsUses().

const char* llvm::MachineOperand::getSymbolName ( ) const [inline]

isBlockAddress - Tests if this is a MO_BlockAddress operand.

Definition at line 249 of file MachineOperand.h.

References MO_BlockAddress.

Referenced by getBlockAddress(), getOffset(), and setOffset().

Definition at line 257 of file MachineOperand.h.

References MO_CFIIndex.

Referenced by getCFIIndex().

bool llvm::MachineOperand::isCImm ( ) const [inline]

isCImm - Test if this is a MO_CImmediate operand.

Definition at line 231 of file MachineOperand.h.

References MO_CImmediate.

Referenced by emitDebugValueComment(), getCImm(), and getDebugLocValue().

bool llvm::MachineOperand::isCPI ( ) const [inline]

isCPI - Tests if this is a MO_ConstantPoolIndex operand.

Definition at line 239 of file MachineOperand.h.

References MO_ConstantPoolIndex.

Referenced by canFoldIntoMOVCC(), llvm::X86AsmPrinter::EmitInstruction(), getIndex(), getOffset(), llvm::isLeaMem(), setIndex(), and setOffset().

bool llvm::MachineOperand::isDead ( ) const [inline]
bool llvm::MachineOperand::isDebug ( ) const [inline]
bool llvm::MachineOperand::isDef ( ) const [inline]

Definition at line 279 of file MachineOperand.h.

References isReg().

Referenced by addLiveInRegs(), llvm::ScheduleDAGInstrs::addPhysRegDataDeps(), llvm::ScheduleDAGInstrs::addPhysRegDeps(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineRegisterInfo::addRegOperandToUseList(), llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::ScheduleDAGInstrs::buildSchedGraph(), canFoldIntoMOVCC(), ChangeToRegister(), clobbersCTR(), RegisterOperands::collect(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), CreateReg(), definesCPSR(), llvm::HexagonInstrInfo::DefinesPredicate(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), emitKill(), llvm::MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval(), findDeadCallerSavedReg(), findDefIdx(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::RegScavenger::forward(), llvm::MachineInstrExpressionTrait::getHashValue(), llvm::PatchPointOpers::getNextScratchIdx(), GetPostIncrementOperand(), llvm::hash_value(), hasLiveCondCodeDef(), INITIALIZE_PASS(), isIdenticalTo(), llvm::MachineInstr::isIdenticalTo(), llvm::MachineInstr::isRegTiedToUseOperand(), IsSafeAndProfitableToMove(), llvm::Mips16InstrInfo::loadImmediate(), MaySpeculate(), MIIsInTerminatorSequence(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::PatchPointOpers::PatchPointOpers(), llvm::HexagonInstrInfo::PredicateInstruction(), print(), llvm::MachineInstr::print(), llvm::LiveVariables::removeVirtualRegisterDead(), llvm::LiveIntervals::repairIntervalsInRange(), resultTests(), llvm::MachineInstr::setPhysRegsDeadExcept(), llvm::MachineInstr::tieOperands(), trackRegDefsUses(), and UpdateCPSRUse().

bool llvm::MachineOperand::isFI ( ) const [inline]

isFI - Tests if this is a MO_FrameIndex operand.

Definition at line 237 of file MachineOperand.h.

References MO_FrameIndex.

Referenced by canFoldIntoMOVCC(), emitDebugValueComment(), llvm::TargetLoweringBase::emitPatchPoint(), getFrameIndexOperandNum(), getIndex(), isCSRestore(), llvm::PPCRegisterInfo::isFrameOffsetLegal(), llvm::ARMBaseRegisterInfo::isFrameOffsetLegal(), llvm::isLeaMem(), llvm::MipsSEInstrInfo::isLoadFromStackSlot(), llvm::XCoreInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::isMem(), llvm::SIInstrInfo::isOperandLegal(), isSimpleMove(), llvm::SystemZInstrInfo::isStackSlotCopy(), llvm::MipsSEInstrInfo::isStoreToStackSlot(), llvm::XCoreInstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), MatchingStackOffset(), llvm::AArch64RegisterInfo::needsFrameBaseReg(), llvm::ARMBaseRegisterInfo::needsFrameBaseReg(), llvm::Thumb1RegisterInfo::resolveFrameIndex(), llvm::AArch64RegisterInfo::resolveFrameIndex(), llvm::PPCRegisterInfo::resolveFrameIndex(), llvm::ARMBaseRegisterInfo::resolveFrameIndex(), llvm::SelectionDAGISel::runOnMachineFunction(), setIndex(), UpdateOperandRegClass(), and llvm::SIInstrInfo::verifyInstruction().

bool llvm::MachineOperand::isFPImm ( ) const [inline]

isIdenticalTo - Return true if this operand is identical to the specified operand. Note: This method ignores isKill and isDead properties.

isIdenticalTo - Return true if this operand is identical to the specified operand. Note that this should stay in sync with the hash_value overload below.

Definition at line 170 of file MachineInstr.cpp.

References getBlockAddress(), getCFIIndex(), getCImm(), getFPImm(), getGlobal(), getImm(), getIndex(), getMBB(), getMCSymbol(), getMetadata(), getOffset(), getReg(), getRegMask(), getSubReg(), getSymbolName(), getTargetFlags(), getType(), isDef(), llvm_unreachable, MO_BlockAddress, MO_CFIIndex, MO_CImmediate, MO_ConstantPoolIndex, MO_ExternalSymbol, MO_FPImmediate, MO_FrameIndex, MO_GlobalAddress, MO_Immediate, MO_JumpTableIndex, MO_MachineBasicBlock, MO_MCSymbol, MO_Metadata, MO_Register, MO_RegisterLiveOut, MO_RegisterMask, MO_TargetIndex, and llvm::LibFunc::strcmp.

Referenced by llvm::MachineInstr::isIdenticalTo(), and llvm::ARMBaseInstrInfo::produceSameValue().

bool llvm::MachineOperand::isImm ( ) const [inline]

isImm - Tests if this is a MO_Immediate operand.

Definition at line 229 of file MachineOperand.h.

References MO_Immediate.

Referenced by llvm::DwarfUnit::addConstantValue(), llvm::SystemZInstrInfo::analyzeCompare(), llvm::R600InstrInfo::buildSlotOfVectorInstruction(), canFoldIntoCSel(), emitDebugValueComment(), llvm::PPCFrameLowering::emitEpilogue(), llvm::X86FrameLowering::emitEpilogue(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), llvm::HexagonFrameLowering::emitPrologue(), llvm::MachineInstr::findInlineAsmFlagIdx(), llvm::MachineInstr::findTiedOperandIdx(), llvm::PPCInstrInfo::FoldImmediate(), llvm::ARMBaseInstrInfo::FoldImmediate(), foldImmediates(), llvm::AArch64InstrInfo::genAlternativeCodeSequence(), getDebugLocValue(), llvm::TargetInstrInfo::getExtractSubregInputs(), llvm::R600InstrInfo::getFlagOp(), getImm(), llvm::TargetInstrInfo::getInsertSubregInputs(), llvm::AArch64InstrInfo::getLdStBaseRegImmOfs(), llvm::AArch64InstrInfo::getLdStBaseRegImmOfsWidth(), llvm::TargetInstrInfo::getRegSequenceInputs(), llvm::AArch64InstrInfo::hasExtendedReg(), llvm::AArch64InstrInfo::hasShiftedReg(), llvm::HexagonInstrInfo::immediateExtend(), isCompareZero(), llvm::HexagonInstrInfo::isConstExtended(), llvm::AArch64InstrInfo::isGPRZero(), llvm::SIInstrInfo::isImmOperandLegal(), llvm::MachineInstr::isIndirectDebugValue(), llvm::SIInstrInfo::isInlineConstant(), llvm::isLeaMem(), llvm::SIInstrInfo::isLiteralConstant(), llvm::MipsSEInstrInfo::isLoadFromStackSlot(), llvm::XCoreInstrInfo::isLoadFromStackSlot(), llvm::HexagonInstrInfo::isLoadFromStackSlot(), llvm::SparcInstrInfo::isLoadFromStackSlot(), llvm::AArch64InstrInfo::isLoadFromStackSlot(), llvm::PPCInstrInfo::isLoadFromStackSlot(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), isMatchingUpdateInsn(), llvm::SIInstrInfo::isOperandLegal(), llvm::isParamLoad(), llvm::isScale(), llvm::MipsSEInstrInfo::isStoreToStackSlot(), llvm::XCoreInstrInfo::isStoreToStackSlot(), llvm::HexagonInstrInfo::isStoreToStackSlot(), llvm::AArch64InstrInfo::isStoreToStackSlot(), llvm::SparcInstrInfo::isStoreToStackSlot(), llvm::PPCInstrInfo::isStoreToStackSlot(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), llvm::SIInstrInfo::isTriviallyReMaterializable(), isZeroImm(), llvm::MipsInstrInfo::isZeroImm(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::moveSMRDToVALU(), llvm::SIInstrInfo::moveToVALU(), llvm::HexagonInstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::MachineInstr::print(), llvm::HexagonAsmPrinter::PrintAsmMemoryOperand(), llvm::SystemZAsmPrinter::PrintAsmOperand(), llvm::HexagonAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), printIntelMemReference(), llvm::MipsAsmPrinter::printUnsignedImm(), llvm::MipsAsmPrinter::printUnsignedImm8(), setImm(), llvm::R600InstrInfo::setImmOperand(), and llvm::SIInstrInfo::verifyInstruction().

Definition at line 304 of file MachineOperand.h.

References isReg().

Referenced by CreateReg(), INITIALIZE_PASS(), print(), and readsReg().

bool llvm::MachineOperand::isJTI ( ) const [inline]
bool llvm::MachineOperand::isKill ( ) const [inline]
bool llvm::MachineOperand::isMBB ( ) const [inline]

Definition at line 256 of file MachineOperand.h.

References MO_MCSymbol.

Referenced by getMCSymbol().

isMetadata - Tests if this is a MO_Metadata operand.

Definition at line 255 of file MachineOperand.h.

References MO_Metadata.

Referenced by llvm::MachineInstr::emitError(), EmitGCCInlineAsmStr(), EmitMSInlineAsmStr(), getMetadata(), and llvm::MachineInstr::print().

bool llvm::MachineOperand::isReg ( ) const [inline]

isReg - Tests if this is a MO_Register operand.

Definition at line 227 of file MachineOperand.h.

References MO_Register.

Referenced by addLiveInRegs(), llvm::MachineInstr::addOperand(), llvm::MachineInstr::addRegisterDead(), llvm::MachineInstr::addRegisterDefined(), llvm::MachineInstr::addRegisterKilled(), llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), addTargetFlag(), llvm::ARMTargetLowering::AdjustInstrPostInstrSelection(), llvm::MachineInstr::allDefsAreDead(), llvm::SystemZInstrInfo::analyzeCompare(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), llvm::CriticalAntiDepBreaker::BreakAntiDependencies(), llvm::ScheduleDAGInstrs::buildSchedGraph(), canCombineWithMUL(), canFoldIntoMOVCC(), ChangeToImmediate(), ChangeToRegister(), llvm::MachineInstr::clearKillInfo(), llvm::MachineInstr::clearRegisterKills(), clobbersCTR(), RegisterOperands::collect(), collectDebugValues(), llvm::SIInstrInfo::commuteInstruction(), llvm::TargetInstrInfo::commuteInstruction(), llvm::ARMBaseInstrInfo::convertToThreeAddress(), llvm::MachineInstr::copyImplicitOps(), definesCPSR(), llvm::HexagonInstrInfo::DefinesPredicate(), llvm::ARMBaseInstrInfo::DefinesPredicate(), llvm::PPCInstrInfo::DefinesPredicate(), earlyUseOperand(), emitDebugValueComment(), llvm::X86FrameLowering::emitEpilogue(), llvm::X86AsmPrinter::EmitInstruction(), llvm::SITargetLowering::EmitInstrWithCustomInserter(), emitKill(), EmitPCMPSTRI(), EmitPCMPSTRM(), llvm::MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval(), eraseGPOpnd(), llvm::TargetInstrInfo::findCommutedOpIndices(), findDeadCallerSavedReg(), findDefIdx(), findHoistingInsertPosAndDeps(), llvm::MachineInstr::findRegisterDefOperandIdx(), llvm::MachineInstr::findRegisterUseOperandIdx(), llvm::MachineInstr::findTiedOperandIdx(), findUseIdx(), finishConvertToThreeAddress(), llvm::ScheduleDAGInstrs::fixupKills(), llvm::PPCInstrInfo::FoldImmediate(), foldImmediates(), forceReg(), llvm::RegScavenger::forward(), FuseInst(), getCallTargetRegOpnd(), getDebugLocValue(), getFPReg(), llvm::MachineInstrExpressionTrait::getHashValue(), llvm::AArch64InstrInfo::getLdStBaseRegImmOfs(), llvm::AArch64InstrInfo::getLdStBaseRegImmOfsWidth(), llvm::PatchPointOpers::getNextScratchIdx(), llvm::MachineInstr::getNumExplicitOperands(), GetPostIncrementOperand(), getPredicatedRegister(), getReg(), llvm::MachineInstr::getRegClassConstraint(), llvm::MachineInstr::getRegClassConstraintEffect(), getSubReg(), getTargetFlags(), llvm::SIInstrInfo::getVALUOp(), HandleVRSaveUpdate(), hasLiveCondCodeDef(), llvm::AArch64InstrInfo::hasPattern(), hasVGPROperands(), hasYmmReg(), INITIALIZE_PASS(), llvm::IsCPSRDead< MachineInstr >(), isDead(), isDebug(), isDef(), llvm::isDescribedByReg(), isEarlyClobber(), llvm::AArch64InstrInfo::isFPRCopy(), llvm::MachineInstr::isIdenticalTo(), isImplicit(), llvm::MachineInstr::isIndirectDebugValue(), isInternalRead(), isKill(), llvm::isLeaMem(), llvm::ARMBaseInstrInfo::isLoadFromStackSlot(), llvm::isMem(), isMemoryOp(), llvm::NVPTXInstrInfo::isMoveInstr(), llvm::SIInstrInfo::isOperandLegal(), llvm::MachineInstr::isRegTiedToDefOperand(), llvm::MachineInstr::isRegTiedToUseOperand(), IsSafeAndProfitableToMove(), llvm::ARMBaseInstrInfo::isStoreToStackSlot(), isTied(), isTwoAddrUse(), isUndef(), isUse(), isVGPR(), llvm::final< T >::isX86_64ExtendedReg(), llvm::SIInstrInfo::legalizeOperands(), llvm::SIInstrInfo::legalizeOpWithMove(), llvm::Mips16InstrInfo::loadImmediate(), llvm::SystemZMCInstLower::lower(), MaySpeculate(), MIIsInTerminatorSequence(), llvm::MachineRegisterInfo::moveOperands(), llvm::SIInstrInfo::moveSMRDToVALU(), llvm::SIInstrInfo::moveToVALU(), llvm::AArch64InstrInfo::optimizeCompareInstr(), llvm::ARMBaseInstrInfo::optimizeCompareInstr(), llvm::HexagonInstrInfo::PredicateInstruction(), llvm::TargetInstrInfo::PredicateInstruction(), llvm::MachineInstr::print(), llvm::HexagonAsmPrinter::PrintAsmMemoryOperand(), llvm::ARMAsmPrinter::PrintAsmMemoryOperand(), llvm::MipsAsmPrinter::PrintAsmMemoryOperand(), llvm::HexagonAsmPrinter::PrintAsmOperand(), llvm::ARMAsmPrinter::PrintAsmOperand(), llvm::X86AsmPrinter::PrintAsmOperand(), llvm::MipsAsmPrinter::PrintAsmOperand(), readsReg(), llvm::MachineInstr::readsWritesVirtualRegister(), removeKillInfo(), llvm::MachineInstr::RemoveOperand(), llvm::LiveVariables::removeVirtualRegisterDead(), llvm::LiveVariables::removeVirtualRegisterKilled(), llvm::LiveVariables::removeVirtualRegistersKilled(), llvm::LiveIntervals::repairIntervalsInRange(), llvm::PPCFrameLowering::replaceFPWithRealFP(), resultTests(), llvm::Thumb1RegisterInfo::saveScavengerRegister(), llvm::RegScavenger::scavengeRegister(), llvm::R600SchedStrategy::schedNode(), llvm::FastISel::selectIntrinsicCall(), setImplicit(), setIsDead(), setIsDebug(), setIsDef(), setIsEarlyClobber(), setIsInternalRead(), setIsKill(), setIsUndef(), llvm::MachineInstr::setPhysRegsDeadExcept(), setSubReg(), setTargetFlags(), llvm::MachineInstr::substituteRegister(), TrackDefUses(), trackRegDefsUses(), transferImpOps(), UpdateCPSRDef(), UpdateCPSRUse(), llvm::AntiDepBreaker::UpdateDbgValue(), UpdateOperandRegClass(), llvm::SIInstrInfo::verifyInstruction(), VerifyLowRegs(), and llvm::MachineRegisterInfo::verifyUseList().

isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.

Definition at line 253 of file MachineOperand.h.

References MO_RegisterLiveOut.

Referenced by getRegLiveOut().

isTargetIndex - Tests if this is a MO_TargetIndex operand.

Definition at line 241 of file MachineOperand.h.

References MO_TargetIndex.

Referenced by getIndex(), getOffset(), llvm::SIInstrInfo::isOperandLegal(), setIndex(), and setOffset().

bool llvm::MachineOperand::isTied ( ) const [inline]
bool llvm::MachineOperand::isUndef ( ) const [inline]
bool llvm::MachineOperand::isUse ( ) const [inline]
void MachineOperand::print ( raw_ostream OS,
const TargetMachine TM = nullptr 
) const

readsReg - Returns true if this operand reads the previous value of its register. A use operand with the <undef> flag set doesn't read its register. A sub-register def implicitly reads the other parts of the register being redefined unless the <undef> flag is set.

This refers to reading the register value from before the current instruction or bundle. Internal bundle reads are not included.

Definition at line 331 of file MachineOperand.h.

References getSubReg(), isInternalRead(), isReg(), isUndef(), and isUse().

Referenced by llvm::ScheduleDAGInstrs::addSchedBarrierDeps(), llvm::MachineOperandIteratorBase::analyzePhysReg(), llvm::MachineOperandIteratorBase::analyzeVirtReg(), llvm::ScheduleDAGInstrs::buildSchedGraph(), RegisterOperands::collect(), llvm::ConnectedVNInfoEqClasses::Distribute(), findUseIdx(), and llvm::ARMBaseInstrInfo::getPartialRegUpdateClearance().

void llvm::MachineOperand::setImm ( int64_t  immVal) [inline]
void llvm::MachineOperand::setImplicit ( bool  Val = true) [inline]

Definition at line 367 of file MachineOperand.h.

References isReg(), and Val.

Referenced by llvm::ARMBaseInstrInfo::optimizeSelect().

void llvm::MachineOperand::setIndex ( int  Idx) [inline]
void llvm::MachineOperand::setIsDead ( bool  Val = true) [inline]
void llvm::MachineOperand::setIsDebug ( bool  Val = true) [inline]

Definition at line 398 of file MachineOperand.h.

References isReg(), and Val.

Referenced by llvm::FastISel::selectIntrinsicCall().

Definition at line 393 of file MachineOperand.h.

References isReg(), and Val.

Referenced by llvm::MachineInstr::addOperand().

Definition at line 388 of file MachineOperand.h.

References isReg(), and Val.

Referenced by INITIALIZE_PASS().

void llvm::MachineOperand::setIsKill ( bool  Val = true) [inline]
void llvm::MachineOperand::setIsUndef ( bool  Val = true) [inline]

Definition at line 383 of file MachineOperand.h.

References isReg(), and Val.

void llvm::MachineOperand::setIsUse ( bool  Val = true) [inline]

Definition at line 363 of file MachineOperand.h.

References setIsDef(), and Val.

void llvm::MachineOperand::setOffset ( int64_t  Offset) [inline]
void llvm::MachineOperand::setSubReg ( unsigned  subReg) [inline]

Definition at line 193 of file MachineOperand.h.

References F(), and isReg().

Referenced by CreateBA(), CreateCPI(), CreateES(), CreateGA(), CreateJTI(), CreateMBB(), and CreateTargetIndex().

substPhysReg - Substitute the current register with the physical register Reg, taking any existing SubReg into account. For instance, substPhysReg(EAX) will change reg1024:sub_8bit to AL.

Definition at line 79 of file MachineInstr.cpp.

References getSubReg(), llvm::MCRegisterInfo::getSubReg(), llvm::TargetRegisterInfo::isPhysicalRegister(), setReg(), and setSubReg().

Referenced by llvm::MachineRegisterInfo::replaceRegWith(), and llvm::MachineInstr::substituteRegister().

substVirtReg - Substitute the current register with the virtual subregister Reg:SubReg. Take any existing SubReg index into account, using TargetRegisterInfo to compose the subreg indices if necessary. Reg must be a virtual register, SubIdx can be 0.

Definition at line 69 of file MachineInstr.cpp.

References llvm::TargetRegisterInfo::composeSubRegIndices(), getSubReg(), llvm::TargetRegisterInfo::isVirtualRegister(), setReg(), and setSubReg().

Referenced by llvm::MachineInstr::substituteRegister().


Friends And Related Function Documentation

MachineOperand hash_value overload.

Note that this includes the same information in the hash that isIdenticalTo uses for comparison. It is thus suited for use in hash tables which use that function for equality comparisons only.

Referenced by llvm::MachineInstrExpressionTrait::getHashValue().

friend class MachineInstr [friend]

Definition at line 702 of file MachineOperand.h.

friend class MachineRegisterInfo [friend]

Definition at line 703 of file MachineOperand.h.


Member Data Documentation

Definition at line 176 of file MachineOperand.h.

Referenced by CreateBA().

Definition at line 161 of file MachineOperand.h.

Referenced by CreateCFIIndex().

Definition at line 155 of file MachineOperand.h.

Referenced by CreateFPImm().

Definition at line 156 of file MachineOperand.h.

Referenced by CreateCImm(), and llvm::MachineInstr::emitError().

Definition at line 175 of file MachineOperand.h.

Referenced by CreateGA().

Definition at line 157 of file MachineOperand.h.

Referenced by ChangeToImmediate().

Definition at line 173 of file MachineOperand.h.

Definition at line 159 of file MachineOperand.h.

Referenced by CreateMetadata(), and llvm::MachineInstr::print().

Definition at line 166 of file MachineOperand.h.

OffsetedInfo - This struct contains the offset and an object identifier. this represent the object as with an optional offset from it.

Referenced by CreateBA(), CreateES(), and CreateGA().

Definition at line 179 of file MachineOperand.h.

Definition at line 145 of file MachineOperand.h.

Definition at line 165 of file MachineOperand.h.

struct { ... } llvm::MachineOperand::Reg

Definition at line 158 of file MachineOperand.h.

Referenced by CreateRegLiveOut(), and CreateRegMask().

Definition at line 144 of file MachineOperand.h.

Referenced by CreateReg().

Definition at line 160 of file MachineOperand.h.

Referenced by CreateMCSymbol().

Definition at line 174 of file MachineOperand.h.


The documentation for this class was generated from the following files: