LLVM API Documentation
00001 //===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 00010 #include "MCTargetDesc/PPCMCTargetDesc.h" 00011 #include "MCTargetDesc/PPCFixupKinds.h" 00012 #include "llvm/MC/MCAssembler.h" 00013 #include "llvm/MC/MCAsmBackend.h" 00014 #include "llvm/MC/MCELF.h" 00015 #include "llvm/MC/MCELFObjectWriter.h" 00016 #include "llvm/MC/MCFixupKindInfo.h" 00017 #include "llvm/MC/MCMachObjectWriter.h" 00018 #include "llvm/MC/MCObjectWriter.h" 00019 #include "llvm/MC/MCSectionMachO.h" 00020 #include "llvm/MC/MCValue.h" 00021 #include "llvm/Support/ELF.h" 00022 #include "llvm/Support/ErrorHandling.h" 00023 #include "llvm/Support/MachO.h" 00024 #include "llvm/Support/TargetRegistry.h" 00025 using namespace llvm; 00026 00027 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) { 00028 switch (Kind) { 00029 default: 00030 llvm_unreachable("Unknown fixup kind!"); 00031 case FK_Data_1: 00032 case FK_Data_2: 00033 case FK_Data_4: 00034 case FK_Data_8: 00035 case PPC::fixup_ppc_nofixup: 00036 return Value; 00037 case PPC::fixup_ppc_brcond14: 00038 case PPC::fixup_ppc_brcond14abs: 00039 return Value & 0xfffc; 00040 case PPC::fixup_ppc_br24: 00041 case PPC::fixup_ppc_br24abs: 00042 return Value & 0x3fffffc; 00043 case PPC::fixup_ppc_half16: 00044 return Value & 0xffff; 00045 case PPC::fixup_ppc_half16ds: 00046 return Value & 0xfffc; 00047 } 00048 } 00049 00050 static unsigned getFixupKindNumBytes(unsigned Kind) { 00051 switch (Kind) { 00052 default: 00053 llvm_unreachable("Unknown fixup kind!"); 00054 case FK_Data_1: 00055 return 1; 00056 case FK_Data_2: 00057 case PPC::fixup_ppc_half16: 00058 case PPC::fixup_ppc_half16ds: 00059 return 2; 00060 case FK_Data_4: 00061 case PPC::fixup_ppc_brcond14: 00062 case PPC::fixup_ppc_brcond14abs: 00063 case PPC::fixup_ppc_br24: 00064 case PPC::fixup_ppc_br24abs: 00065 return 4; 00066 case FK_Data_8: 00067 return 8; 00068 case PPC::fixup_ppc_nofixup: 00069 return 0; 00070 } 00071 } 00072 00073 namespace { 00074 00075 class PPCAsmBackend : public MCAsmBackend { 00076 const Target &TheTarget; 00077 bool IsLittleEndian; 00078 public: 00079 PPCAsmBackend(const Target &T, bool isLittle) : MCAsmBackend(), TheTarget(T), 00080 IsLittleEndian(isLittle) {} 00081 00082 unsigned getNumFixupKinds() const override { 00083 return PPC::NumTargetFixupKinds; 00084 } 00085 00086 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override { 00087 const static MCFixupKindInfo InfosBE[PPC::NumTargetFixupKinds] = { 00088 // name offset bits flags 00089 { "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel }, 00090 { "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel }, 00091 { "fixup_ppc_br24abs", 6, 24, 0 }, 00092 { "fixup_ppc_brcond14abs", 16, 14, 0 }, 00093 { "fixup_ppc_half16", 0, 16, 0 }, 00094 { "fixup_ppc_half16ds", 0, 14, 0 }, 00095 { "fixup_ppc_nofixup", 0, 0, 0 } 00096 }; 00097 const static MCFixupKindInfo InfosLE[PPC::NumTargetFixupKinds] = { 00098 // name offset bits flags 00099 { "fixup_ppc_br24", 2, 24, MCFixupKindInfo::FKF_IsPCRel }, 00100 { "fixup_ppc_brcond14", 2, 14, MCFixupKindInfo::FKF_IsPCRel }, 00101 { "fixup_ppc_br24abs", 2, 24, 0 }, 00102 { "fixup_ppc_brcond14abs", 2, 14, 0 }, 00103 { "fixup_ppc_half16", 0, 16, 0 }, 00104 { "fixup_ppc_half16ds", 2, 14, 0 }, 00105 { "fixup_ppc_nofixup", 0, 0, 0 } 00106 }; 00107 00108 if (Kind < FirstTargetFixupKind) 00109 return MCAsmBackend::getFixupKindInfo(Kind); 00110 00111 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() && 00112 "Invalid kind!"); 00113 return (IsLittleEndian? InfosLE : InfosBE)[Kind - FirstTargetFixupKind]; 00114 } 00115 00116 void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize, 00117 uint64_t Value, bool IsPCRel) const override { 00118 Value = adjustFixupValue(Fixup.getKind(), Value); 00119 if (!Value) return; // Doesn't change encoding. 00120 00121 unsigned Offset = Fixup.getOffset(); 00122 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind()); 00123 00124 // For each byte of the fragment that the fixup touches, mask in the bits 00125 // from the fixup value. The Value has been "split up" into the appropriate 00126 // bitfields above. 00127 for (unsigned i = 0; i != NumBytes; ++i) { 00128 unsigned Idx = IsLittleEndian ? i : (NumBytes - 1 - i); 00129 Data[Offset + i] |= uint8_t((Value >> (Idx * 8)) & 0xff); 00130 } 00131 } 00132 00133 void processFixupValue(const MCAssembler &Asm, const MCAsmLayout &Layout, 00134 const MCFixup &Fixup, const MCFragment *DF, 00135 const MCValue &Target, uint64_t &Value, 00136 bool &IsResolved) override { 00137 switch ((PPC::Fixups)Fixup.getKind()) { 00138 default: break; 00139 case PPC::fixup_ppc_br24: 00140 case PPC::fixup_ppc_br24abs: 00141 // If the target symbol has a local entry point we must not attempt 00142 // to resolve the fixup directly. Emit a relocation and leave 00143 // resolution of the final target address to the linker. 00144 if (const MCSymbolRefExpr *A = Target.getSymA()) { 00145 const MCSymbolData &Data = Asm.getSymbolData(A->getSymbol()); 00146 // The "other" values are stored in the last 6 bits of the second byte. 00147 // The traditional defines for STO values assume the full byte and thus 00148 // the shift to pack it. 00149 unsigned Other = MCELF::getOther(Data) << 2; 00150 if ((Other & ELF::STO_PPC64_LOCAL_MASK) != 0) 00151 IsResolved = false; 00152 } 00153 break; 00154 } 00155 } 00156 00157 bool mayNeedRelaxation(const MCInst &Inst) const override { 00158 // FIXME. 00159 return false; 00160 } 00161 00162 bool fixupNeedsRelaxation(const MCFixup &Fixup, 00163 uint64_t Value, 00164 const MCRelaxableFragment *DF, 00165 const MCAsmLayout &Layout) const override { 00166 // FIXME. 00167 llvm_unreachable("relaxInstruction() unimplemented"); 00168 } 00169 00170 00171 void relaxInstruction(const MCInst &Inst, MCInst &Res) const override { 00172 // FIXME. 00173 llvm_unreachable("relaxInstruction() unimplemented"); 00174 } 00175 00176 bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override { 00177 uint64_t NumNops = Count / 4; 00178 for (uint64_t i = 0; i != NumNops; ++i) 00179 OW->Write32(0x60000000); 00180 00181 switch (Count % 4) { 00182 default: break; // No leftover bytes to write 00183 case 1: OW->Write8(0); break; 00184 case 2: OW->Write16(0); break; 00185 case 3: OW->Write16(0); OW->Write8(0); break; 00186 } 00187 00188 return true; 00189 } 00190 00191 unsigned getPointerSize() const { 00192 StringRef Name = TheTarget.getName(); 00193 if (Name == "ppc64" || Name == "ppc64le") return 8; 00194 assert(Name == "ppc32" && "Unknown target name!"); 00195 return 4; 00196 } 00197 00198 bool isLittleEndian() const { 00199 return IsLittleEndian; 00200 } 00201 }; 00202 } // end anonymous namespace 00203 00204 00205 // FIXME: This should be in a separate file. 00206 namespace { 00207 class DarwinPPCAsmBackend : public PPCAsmBackend { 00208 public: 00209 DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T, false) { } 00210 00211 MCObjectWriter *createObjectWriter(raw_ostream &OS) const override { 00212 bool is64 = getPointerSize() == 8; 00213 return createPPCMachObjectWriter( 00214 OS, 00215 /*Is64Bit=*/is64, 00216 (is64 ? MachO::CPU_TYPE_POWERPC64 : MachO::CPU_TYPE_POWERPC), 00217 MachO::CPU_SUBTYPE_POWERPC_ALL); 00218 } 00219 }; 00220 00221 class ELFPPCAsmBackend : public PPCAsmBackend { 00222 uint8_t OSABI; 00223 public: 00224 ELFPPCAsmBackend(const Target &T, bool IsLittleEndian, uint8_t OSABI) : 00225 PPCAsmBackend(T, IsLittleEndian), OSABI(OSABI) { } 00226 00227 00228 MCObjectWriter *createObjectWriter(raw_ostream &OS) const override { 00229 bool is64 = getPointerSize() == 8; 00230 return createPPCELFObjectWriter(OS, is64, isLittleEndian(), OSABI); 00231 } 00232 }; 00233 00234 } // end anonymous namespace 00235 00236 MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, 00237 const MCRegisterInfo &MRI, 00238 StringRef TT, StringRef CPU) { 00239 if (Triple(TT).isOSDarwin()) 00240 return new DarwinPPCAsmBackend(T); 00241 00242 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS()); 00243 bool IsLittleEndian = Triple(TT).getArch() == Triple::ppc64le; 00244 return new ELFPPCAsmBackend(T, IsLittleEndian, OSABI); 00245 }