LLVM API Documentation

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ARMAsmParser.cpp File Reference
#include "ARMFPUName.h"
#include "ARMFeatures.h"
#include "MCTargetDesc/ARMAddressingModes.h"
#include "MCTargetDesc/ARMArchName.h"
#include "MCTargetDesc/ARMBaseInfo.h"
#include "MCTargetDesc/ARMMCExpr.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringSwitch.h"
#include "llvm/ADT/Twine.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCAssembler.h"
#include "llvm/MC/MCContext.h"
#include "llvm/MC/MCDisassembler.h"
#include "llvm/MC/MCELFStreamer.h"
#include "llvm/MC/MCExpr.h"
#include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCObjectFileInfo.h"
#include "llvm/MC/MCParser/MCAsmLexer.h"
#include "llvm/MC/MCParser/MCAsmParser.h"
#include "llvm/MC/MCParser/MCParsedAsmOperand.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSection.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/MCTargetAsmParser.h"
#include "llvm/Support/ARMBuildAttributes.h"
#include "llvm/Support/ARMEHABI.h"
#include "llvm/Support/COFF.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ELF.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Support/SourceMgr.h"
#include "llvm/Support/TargetRegistry.h"
#include "llvm/Support/raw_ostream.h"
#include "ARMGenAsmMatcher.inc"
#include "MCTargetDesc/ARMArchName.def"
#include "ARMFPUName.def"
Include dependency graph for ARMAsmParser.cpp:

Go to the source code of this file.

Namespaces

namespace  llvm
 

List of target independent CodeGen pass IDs.


Defines

#define GET_OPERAND_DIAGNOSTIC_TYPES
#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH)   .Case(NAME, ARM::ID)
#define ARM_ARCH_ALIAS(NAME, ID)   .Case(NAME, ARM::ID)
#define ARM_FPU_NAME(NAME, ID)   .Case(NAME, ARM::ID)
#define ARM_ARCH_NAME(NAME, ID, DEFAULT_CPU_NAME, DEFAULT_CPU_ARCH)   .Case(NAME, ARM::ID)
#define ARM_ARCH_ALIAS(NAME, ID)   .Case(NAME, ARM::ID)
Auto-generated Match Functions

{

#define GET_ASSEMBLER_HEADER

Enumerations

enum  VectorLaneTy

Functions

template<>
bool llvm::IsCPSRDead< MCInst > (MCInst *Instr)

Auto-generated Match Functions

{

#define GET_REGISTER_MATCHER
#define GET_SUBTARGET_FEATURE_NAME
#define GET_MATCHER_IMPLEMENTATION
struct {
   const unsigned   Fpu
   const uint64_t   Enabled
   const uint64_t   Disabled
Fpus []
struct {
   const char *   Name
   const unsigned   ArchCheck
   const uint64_t   Features
Extensions []
static unsigned MatchRegisterName (StringRef Name)
static int MatchCoprocessorOperandName (StringRef Name, char CoprocOp)
static unsigned getNextRegister (unsigned Reg)
static unsigned getDRegFromQReg (unsigned QReg)
static bool isDataTypeToken (StringRef Tok)
static bool doesIgnoreDataTypeSuffix (StringRef Mnemonic, StringRef DT)
static void applyMnemonicAliases (StringRef &Mnemonic, uint64_t Features, unsigned VariantID)
static bool RequiresVFPRegListValidation (StringRef Inst, bool &AcceptSinglePrecisionOnly, bool &AcceptDoublePrecisionOnly)
static bool checkLowRegisterList (MCInst Inst, unsigned OpNo, unsigned Reg, unsigned HiReg, bool &containsReg)
static bool listContainsReg (MCInst &Inst, unsigned OpNo, unsigned Reg)
static bool instIsBreakpoint (const MCInst &Inst)
static unsigned getRealVSTOpcode (unsigned Opc, unsigned &Spacing)
static unsigned getRealVLDOpcode (unsigned Opc, unsigned &Spacing)
static const char * getSubtargetFeatureName (uint64_t Val)
void LLVMInitializeARMAsmParser ()
 Force static initialization.

Define Documentation

#define ARM_ARCH_ALIAS (   NAME,
  ID 
)    .Case(NAME, ARM::ID)
#define ARM_ARCH_ALIAS (   NAME,
  ID 
)    .Case(NAME, ARM::ID)
#define ARM_ARCH_NAME (   NAME,
  ID,
  DEFAULT_CPU_NAME,
  DEFAULT_CPU_ARCH 
)    .Case(NAME, ARM::ID)
#define ARM_ARCH_NAME (   NAME,
  ID,
  DEFAULT_CPU_NAME,
  DEFAULT_CPU_ARCH 
)    .Case(NAME, ARM::ID)
#define ARM_FPU_NAME (   NAME,
  ID 
)    .Case(NAME, ARM::ID)

Definition at line 285 of file ARMAsmParser.cpp.

Definition at line 9528 of file ARMAsmParser.cpp.

Definition at line 333 of file ARMAsmParser.cpp.

Definition at line 9526 of file ARMAsmParser.cpp.

Definition at line 9527 of file ARMAsmParser.cpp.


Enumeration Type Documentation

Definition at line 56 of file ARMAsmParser.cpp.


Function Documentation

static void applyMnemonicAliases ( StringRef Mnemonic,
uint64_t  Features,
unsigned  VariantID 
) [static]
static bool checkLowRegisterList ( MCInst  Inst,
unsigned  OpNo,
unsigned  Reg,
unsigned  HiReg,
bool containsReg 
) [static]
static bool doesIgnoreDataTypeSuffix ( StringRef  Mnemonic,
StringRef  DT 
) [static]

Definition at line 5370 of file ARMAsmParser.cpp.

References llvm::StringRef::startswith().

static unsigned getDRegFromQReg ( unsigned  QReg) [static]

Definition at line 3303 of file ARMAsmParser.cpp.

References llvm_unreachable.

static unsigned getNextRegister ( unsigned  Reg) [static]

Definition at line 3283 of file ARMAsmParser.cpp.

References contains(), and llvm_unreachable.

static unsigned getRealVLDOpcode ( unsigned  Opc,
unsigned Spacing 
) [static]

Definition at line 6167 of file ARMAsmParser.cpp.

References llvm_unreachable.

static unsigned getRealVSTOpcode ( unsigned  Opc,
unsigned Spacing 
) [static]

Definition at line 6058 of file ARMAsmParser.cpp.

References llvm_unreachable.

static const char* getSubtargetFeatureName ( uint64_t  Val) [static]
static bool instIsBreakpoint ( const MCInst Inst) [static]

Definition at line 5717 of file ARMAsmParser.cpp.

References llvm::MCInst::getOpcode().

static bool isDataTypeToken ( StringRef  Tok) [static]

Definition at line 5358 of file ARMAsmParser.cpp.

static bool listContainsReg ( MCInst Inst,
unsigned  OpNo,
unsigned  Reg 
) [static]

Force static initialization.

Definition at line 9519 of file ARMAsmParser.cpp.

References llvm::ARM_PROC::A, llvm::TheARMBETarget, llvm::TheARMLETarget, llvm::TheThumbBETarget, llvm::TheThumbLETarget, llvm::X, and Y.

static int MatchCoprocessorOperandName ( StringRef  Name,
char  CoprocOp 
) [static]

MatchCoprocessorOperandName - Try to parse an coprocessor related instruction with a symbolic operand name. We accept "crN" syntax for GAS compatibility. <operand-name> ::= <prefix><number> If CoprocOp is 'c', then: <prefix> ::= c | cr If CoprocOp is 'p', then : <prefix> ::= p <number> ::= integer in range [0, 15]

Definition at line 3130 of file ARMAsmParser.cpp.

References llvm::StringRef::drop_front(), and llvm::StringRef::size().

static unsigned MatchRegisterName ( StringRef  Name) [static]
static bool RequiresVFPRegListValidation ( StringRef  Inst,
bool AcceptSinglePrecisionOnly,
bool AcceptDoublePrecisionOnly 
) [static]

Variable Documentation

Definition at line 9533 of file ARMAsmParser.cpp.

const uint64_t Disabled
const uint64_t Enabled
struct { ... } Extensions[] [static]
const uint64_t Features

Definition at line 8766 of file ARMAsmParser.cpp.

struct { ... } Fpus[] [static]
const char* Name

Definition at line 9532 of file ARMAsmParser.cpp.

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llvm::IRBuilder< true, TargetFolder >::CreateConstGEP2_32(), llvm::IRBuilder< true, TargetFolder >::CreateConstGEP2_64(), llvm::IRBuilder< true, TargetFolder >::CreateConstInBoundsGEP1_32(), llvm::IRBuilder< true, TargetFolder >::CreateConstInBoundsGEP1_64(), llvm::IRBuilder< true, TargetFolder >::CreateConstInBoundsGEP2_32(), llvm::IRBuilder< true, TargetFolder >::CreateConstInBoundsGEP2_64(), llvm::IRBuilder< true, TargetFolder >::CreateExtractElement(), llvm::IRBuilder< true, TargetFolder >::CreateExtractValue(), llvm::IRBuilder< true, TargetFolder >::CreateFAdd(), llvm::IRBuilder< true, TargetFolder >::CreateFCmp(), llvm::IRBuilder< true, TargetFolder >::CreateFDiv(), llvm::IRBuilder< true, TargetFolder >::CreateFMul(), llvm::IRBuilder< true, TargetFolder >::CreateFNeg(), llvm::IRBuilder< true, TargetFolder >::CreateFPCast(), createFPFnStub(), llvm::IRBuilder< true, TargetFolder >::CreateFRem(), llvm::IRBuilder< true, TargetFolder >::CreateFSub(), llvm::DIBuilder::createFunction(), llvm::IRBuilder< true, TargetFolder >::CreateGEP(), llvm::IRBuilder< true, TargetFolder >::CreateICmp(), llvm::DIBuilder::createImportedDeclaration(), llvm::IRBuilder< true, TargetFolder >::CreateInBoundsGEP(), llvm::IRBuilder< true, TargetFolder >::CreateInsertElement(), llvm::IRBuilder< true, TargetFolder >::CreateInsertValue(), llvm::IRBuilder< true, TargetFolder >::CreateIntCast(), llvm::IRBuilder< true, TargetFolder >::CreateInvoke(), llvm::IRBuilder< true, TargetFolder >::CreateInvoke3(), llvm::IRBuilder< true, TargetFolder >::CreateLShr(), llvm::IRBuilder< true, TargetFolder >::CreateMul(), llvm::IRBuilder< true, TargetFolder >::CreateNeg(), llvm::IRBuilder< true, TargetFolder >::CreateNot(), llvm::IRBuilder< true, TargetFolder >::CreateOr(), llvm::IRBuilder< true, TargetFolder >::CreatePointerBitCastOrAddrSpaceCast(), llvm::IRBuilder< true, TargetFolder >::CreatePointerCast(), llvm::IRBuilder< true, TargetFolder >::CreateSDiv(), llvm::IRBuilder< true, TargetFolder >::CreateSelect(), llvm::IRBuilder< true, TargetFolder >::CreateSExtOrBitCast(), llvm::IRBuilder< true, TargetFolder >::CreateShl(), llvm::IRBuilder< true, TargetFolder >::CreateShuffleVector(), llvm::IRBuilder< true, TargetFolder >::CreateSRem(), llvm::IRBuilder< true, TargetFolder >::CreateSub(), llvm::IRBuilder< true, TargetFolder >::CreateTruncOrBitCast(), llvm::IRBuilder< true, TargetFolder >::CreateUDiv(), llvm::IRBuilder< true, TargetFolder >::CreateURem(), llvm::IRBuilder< true, TargetFolder >::CreateXor(), llvm::IRBuilder< true, TargetFolder >::CreateZExtOrBitCast(), llvm::DISubprogram::describes(), llvm::AsmPrinter::doFinalization(), llvm::GCOVFunction::dump(), llvm::DWARFDebugInfoEntryMinimal::dumpAttribute(), llvm::DWARFContextInMemory::DWARFContextInMemory(), llvm::MCDwarfLineTableHeader::Emit(), llvm::RuntimeDyldImpl::emitCommonSymbols(), emitDebugValueComment(), EmitGenDwarfInfo(), llvm::RuntimeDyldImpl::emitSection(), llvm::RuntimeDyldELF::finalizeLoad(), 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