LLVM API Documentation

ResourcePriorityQueue.h
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00001 //===----- ResourcePriorityQueue.h - A DFA-oriented priority queue -------===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file implements the ResourcePriorityQueue class, which is a
00011 // SchedulingPriorityQueue that schedules using DFA state to
00012 // reduce the length of the critical path through the basic block
00013 // on VLIW platforms.
00014 //
00015 //===----------------------------------------------------------------------===//
00016 
00017 #ifndef LLVM_CODEGEN_RESOURCEPRIORITYQUEUE_H
00018 #define LLVM_CODEGEN_RESOURCEPRIORITYQUEUE_H
00019 
00020 #include "llvm/CodeGen/DFAPacketizer.h"
00021 #include "llvm/CodeGen/ScheduleDAG.h"
00022 #include "llvm/CodeGen/SelectionDAGISel.h"
00023 #include "llvm/MC/MCInstrItineraries.h"
00024 #include "llvm/Target/TargetInstrInfo.h"
00025 #include "llvm/Target/TargetRegisterInfo.h"
00026 
00027 namespace llvm {
00028   class ResourcePriorityQueue;
00029 
00030   /// Sorting functions for the Available queue.
00031   struct resource_sort : public std::binary_function<SUnit*, SUnit*, bool> {
00032     ResourcePriorityQueue *PQ;
00033     explicit resource_sort(ResourcePriorityQueue *pq) : PQ(pq) {}
00034 
00035     bool operator()(const SUnit* left, const SUnit* right) const;
00036   };
00037 
00038   class ResourcePriorityQueue : public SchedulingPriorityQueue {
00039     /// SUnits - The SUnits for the current graph.
00040     std::vector<SUnit> *SUnits;
00041 
00042     /// NumNodesSolelyBlocking - This vector contains, for every node in the
00043     /// Queue, the number of nodes that the node is the sole unscheduled
00044     /// predecessor for.  This is used as a tie-breaker heuristic for better
00045     /// mobility.
00046     std::vector<unsigned> NumNodesSolelyBlocking;
00047 
00048     /// Queue - The queue.
00049     std::vector<SUnit*> Queue;
00050 
00051     /// RegPressure - Tracking current reg pressure per register class.
00052     ///
00053     std::vector<unsigned> RegPressure;
00054 
00055     /// RegLimit - Tracking the number of allocatable registers per register
00056     /// class.
00057     std::vector<unsigned> RegLimit;
00058 
00059     resource_sort Picker;
00060     const TargetRegisterInfo *TRI;
00061     const TargetLowering *TLI;
00062     const TargetInstrInfo *TII;
00063     const InstrItineraryData* InstrItins;
00064     /// ResourcesModel - Represents VLIW state.
00065     /// Not limited to VLIW targets per say, but assumes
00066     /// definition of DFA by a target.
00067     DFAPacketizer *ResourcesModel;
00068 
00069     /// Resource model - packet/bundle model. Purely
00070     /// internal at the time.
00071     std::vector<SUnit*> Packet;
00072 
00073     /// Heuristics for estimating register pressure.
00074     unsigned ParallelLiveRanges;
00075     signed HorizontalVerticalBalance;
00076 
00077   public:
00078     ResourcePriorityQueue(SelectionDAGISel *IS);
00079 
00080     ~ResourcePriorityQueue() {
00081       delete ResourcesModel;
00082     }
00083 
00084     bool isBottomUp() const override { return false; }
00085 
00086     void initNodes(std::vector<SUnit> &sunits) override;
00087 
00088     void addNode(const SUnit *SU) override {
00089       NumNodesSolelyBlocking.resize(SUnits->size(), 0);
00090     }
00091 
00092     void updateNode(const SUnit *SU) override {}
00093 
00094     void releaseState() override {
00095       SUnits = nullptr;
00096     }
00097 
00098     unsigned getLatency(unsigned NodeNum) const {
00099       assert(NodeNum < (*SUnits).size());
00100       return (*SUnits)[NodeNum].getHeight();
00101     }
00102 
00103     unsigned getNumSolelyBlockNodes(unsigned NodeNum) const {
00104       assert(NodeNum < NumNodesSolelyBlocking.size());
00105       return NumNodesSolelyBlocking[NodeNum];
00106     }
00107 
00108     /// Single cost function reflecting benefit of scheduling SU
00109     /// in the current cycle.
00110     signed SUSchedulingCost (SUnit *SU);
00111 
00112     /// InitNumRegDefsLeft - Determine the # of regs defined by this node.
00113     ///
00114     void initNumRegDefsLeft(SUnit *SU);
00115     void updateNumRegDefsLeft(SUnit *SU);
00116     signed regPressureDelta(SUnit *SU, bool RawPressure = false);
00117     signed rawRegPressureDelta (SUnit *SU, unsigned RCId);
00118 
00119     bool empty() const override { return Queue.empty(); }
00120 
00121     void push(SUnit *U) override;
00122 
00123     SUnit *pop() override;
00124 
00125     void remove(SUnit *SU) override;
00126 
00127     void dump(ScheduleDAG* DAG) const override;
00128 
00129     /// scheduledNode - Main resource tracking point.
00130     void scheduledNode(SUnit *Node) override;
00131     bool isResourceAvailable(SUnit *SU);
00132     void reserveResources(SUnit *SU);
00133 
00134 private:
00135     void adjustPriorityOfUnscheduledPreds(SUnit *SU);
00136     SUnit *getSingleUnscheduledPred(SUnit *SU);
00137     unsigned numberRCValPredInSU (SUnit *SU, unsigned RCId);
00138     unsigned numberRCValSuccInSU (SUnit *SU, unsigned RCId);
00139   };
00140 }
00141 
00142 #endif