TargetLowering.h File Reference

#include "llvm/ADT/DenseMap.h"
#include "llvm/CodeGen/DAGCombine.h"
#include "llvm/CodeGen/RuntimeLibcalls.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/IR/Attributes.h"
#include "llvm/IR/CallSite.h"
#include "llvm/IR/CallingConv.h"
#include "llvm/IR/InlineAsm.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/IRBuilder.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Target/TargetCallingConv.h"
#include "llvm/Target/TargetMachine.h"
#include <climits>
#include <map>
#include <vector>

Include dependency graph for TargetLowering.h:

Go to the source code of this file.

Classes
class	llvm::TargetLoweringBase
class	llvm::TargetLoweringBase::ValueTypeActionImpl
struct	llvm::TargetLoweringBase::IntrinsicInfo
struct	llvm::TargetLoweringBase::AddrMode
class	llvm::TargetLowering
struct	llvm::TargetLowering::TargetLoweringOpt
struct	llvm::TargetLowering::DAGCombinerInfo
struct	llvm::TargetLowering::ArgListEntry
struct	llvm::TargetLowering::CallLoweringInfo
struct	llvm::TargetLowering::AsmOperandInfo
	This contains information for each constraint that we are lowering. More...
Namespaces
namespace	llvm
	List of target independent CodeGen pass IDs.
namespace	llvm::Sched
Enumerations
enum	llvm::Sched::Preference {   llvm::Sched::None, llvm::Sched::Source, llvm::Sched::RegPressure, llvm::Sched::Hybrid,   llvm::Sched::ILP, llvm::Sched::VLIW }
Functions
void	llvm::GetReturnInfo (Type *ReturnType, AttributeSet attr, SmallVectorImpl< ISD::OutputArg > &Outs, const TargetLowering &TLI)

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Detailed Description

This file describes how to lower LLVM code to machine code. This has two main components:

1. Which ValueTypes are natively supported by the target. 2. Which operations are supported for supported ValueTypes. 3. Cost thresholds for alternative implementations of certain operations.

In addition it has a few other components, like information about FP immediates.

Definition in file TargetLowering.h.