LLVM API Documentation

Public Types | Public Member Functions
llvm::SDep Class Reference

#include <ScheduleDAG.h>

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List of all members.

Public Types

enum  Kind { Data, Anti, Output, Order }
 Kind - These are the different kinds of scheduling dependencies. More...
enum  OrderKind {
  Barrier, MayAliasMem, MustAliasMem, Artificial,
  Weak, Cluster
}

Public Member Functions

 SDep ()
 SDep (SUnit *S, Kind kind, unsigned Reg)
 SDep - Construct an SDep with the specified values.
 SDep (SUnit *S, OrderKind kind)
bool overlaps (const SDep &Other) const
 Return true if the specified SDep is equivalent except for latency.
bool operator== (const SDep &Other) const
bool operator!= (const SDep &Other) const
unsigned getLatency () const
void setLatency (unsigned Lat)
 setLatency - Set the latency for this edge.
SUnitgetSUnit () const
void setSUnit (SUnit *SU)
Kind getKind () const
 getKind - Return an enum value representing the kind of the dependence.
bool isCtrl () const
 isCtrl - Shorthand for getKind() != SDep::Data.
bool isNormalMemory () const
bool isBarrier () const
bool isMustAlias () const
bool isWeak () const
bool isArtificial () const
bool isCluster () const
bool isAssignedRegDep () const
unsigned getReg () const
void setReg (unsigned Reg)

Detailed Description

SDep - Scheduling dependency. This represents one direction of an edge in the scheduling DAG.

Definition at line 45 of file ScheduleDAG.h.


Member Enumeration Documentation

Kind - These are the different kinds of scheduling dependencies.

Enumerator:
Data 

Regular data dependence (aka true-dependence).

Anti 

A register anti-dependedence (aka WAR).

Output 

A register output-dependence (aka WAW).

Order 

Any other ordering dependency.

Definition at line 48 of file ScheduleDAG.h.

Enumerator:
Barrier 

An unknown scheduling barrier.

MayAliasMem 

Nonvolatile load/Store instructions that may alias.

MustAliasMem 

Nonvolatile load/Store instructions that must alias.

Artificial 

Arbitrary strong DAG edge (no real dependence).

Weak 

Arbitrary weak DAG edge.

Cluster 

Weak DAG edge linking a chain of clustered instrs.

Definition at line 64 of file ScheduleDAG.h.


Constructor & Destructor Documentation

llvm::SDep::SDep ( ) [inline]

SDep - Construct a null SDep. This is only for use by container classes which require default constructors. SUnits may not have null SDep edges.

Definition at line 98 of file ScheduleDAG.h.

llvm::SDep::SDep ( SUnit S,
Kind  kind,
unsigned  Reg 
) [inline]

SDep - Construct an SDep with the specified values.

Definition at line 101 of file ScheduleDAG.h.

References Anti, Data, llvm_unreachable, Output, and Reg.

llvm::SDep::SDep ( SUnit S,
OrderKind  kind 
) [inline]

Definition at line 119 of file ScheduleDAG.h.


Member Function Documentation

Kind llvm::SDep::getKind ( ) const [inline]
unsigned llvm::SDep::getLatency ( ) const [inline]

getLatency - Return the latency value for this edge, which roughly means the minimum number of cycles that must elapse between the predecessor and the successor, given that they have this edge between them.

Definition at line 150 of file ScheduleDAG.h.

Referenced by llvm::SUnit::addPred(), llvm::ScheduleDAGMI::releasePred(), and llvm::ScheduleDAGMI::releaseSucc().

unsigned llvm::SDep::getReg ( ) const [inline]

getReg - Return the register associated with this edge. This is only valid on Data, Anti, and Output edges. On Data edges, this value may be zero, meaning there is no associated register.

Definition at line 229 of file ScheduleDAG.h.

References Anti, Data, getKind(), and Output.

Referenced by llvm::AggressiveAntiDepBreaker::BreakAntiDependencies().

SUnit* llvm::SDep::getSUnit ( ) const [inline]
bool llvm::SDep::isArtificial ( ) const [inline]

isArtificial - Test if this is an Order dependence that is marked as "artificial", meaning it isn't necessary for correctness.

Definition at line 210 of file ScheduleDAG.h.

References Artificial, getKind(), and Order.

Referenced by llvm::ScheduleDAGMI::addEdge(), and llvm::SUnitIterator::isArtificialDep().

bool llvm::SDep::isAssignedRegDep ( ) const [inline]

isAssignedRegDep - Test if this is a Data dependence that is associated with a register.

Definition at line 222 of file ScheduleDAG.h.

References Data, and getKind().

bool llvm::SDep::isBarrier ( ) const [inline]

isBarrier - Test if this is an Order dependence that is marked as a barrier.

Definition at line 189 of file ScheduleDAG.h.

References Barrier, getKind(), and Order.

bool llvm::SDep::isCluster ( ) const [inline]

isCluster - Test if this is an Order dependence that is marked as "cluster", meaning it is artificial and wants to be adjacent.

Definition at line 216 of file ScheduleDAG.h.

References Cluster, getKind(), and Order.

Referenced by llvm::ScheduleDAGMI::releasePred(), and llvm::ScheduleDAGMI::releaseSucc().

bool llvm::SDep::isCtrl ( ) const [inline]

isCtrl - Shorthand for getKind() != SDep::Data.

Definition at line 175 of file ScheduleDAG.h.

References Data, and getKind().

Referenced by llvm::SUnitIterator::isCtrlDep().

bool llvm::SDep::isMustAlias ( ) const [inline]

isMustAlias - Test if this is an Order dependence that is marked as "must alias", meaning that the SUnits at either end of the edge have a memory dependence on a known memory location.

Definition at line 196 of file ScheduleDAG.h.

References getKind(), MustAliasMem, and Order.

bool llvm::SDep::isNormalMemory ( ) const [inline]

isNormalMemory - Test if this is an Order dependence between two memory accesses where both sides of the dependence access memory in non-volatile and fully modeled ways.

Definition at line 182 of file ScheduleDAG.h.

References getKind(), MayAliasMem, MustAliasMem, and Order.

bool llvm::SDep::isWeak ( ) const [inline]

isWeak - Test if this a weak dependence. Weak dependencies are considered DAG edges for height computation and other heuristics, but do not force ordering. Breaking a weak edge may require the scheduler to compensate, for example by inserting a copy.

Definition at line 204 of file ScheduleDAG.h.

References getKind(), Order, and Weak.

Referenced by llvm::SUnit::addPred(), llvm::ScheduleDAGMI::releasePred(), llvm::ScheduleDAGMI::releaseSucc(), and llvm::SUnit::removePred().

bool llvm::SDep::operator!= ( const SDep Other) const [inline]

Definition at line 142 of file ScheduleDAG.h.

References operator==().

bool llvm::SDep::operator== ( const SDep Other) const [inline]

Definition at line 138 of file ScheduleDAG.h.

References overlaps().

Referenced by operator!=().

bool llvm::SDep::overlaps ( const SDep Other) const [inline]

Return true if the specified SDep is equivalent except for latency.

Definition at line 125 of file ScheduleDAG.h.

References Anti, Data, llvm::PointerIntPair< PointerTy, IntBits, IntType, PtrTraits >::getInt(), llvm_unreachable, Order, OrdKind, Output, and Reg.

Referenced by operator==().

void llvm::SDep::setLatency ( unsigned  Lat) [inline]
void llvm::SDep::setReg ( unsigned  Reg) [inline]

setReg - Assign the associated register for this edge. This is only valid on Data, Anti, and Output edges. On Anti and Output edges, this value must not be zero. On Data edges, the value may be zero, which would mean that no specific register is associated with this edge.

Definition at line 240 of file ScheduleDAG.h.

References Anti, Data, getKind(), Output, and Reg.

void llvm::SDep::setSUnit ( SUnit SU) [inline]

Member Data Documentation

Order - Additional information about Order dependencies.

Definition at line 86 of file ScheduleDAG.h.

Referenced by overlaps().

Reg - For Data, Anti, and Output dependencies, the associated register. For Data dependencies that don't currently have a register assigned, this is set to zero.

Definition at line 83 of file ScheduleDAG.h.

Referenced by overlaps(), SDep(), and setReg().


The documentation for this class was generated from the following file: