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ad7793.c
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1 /*
2  * AD7785/AD7792/AD7793/AD7794/AD7795 SPI ADC driver
3  *
4  * Copyright 2011-2012 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2.
7  */
8 
9 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/sysfs.h>
14 #include <linux/spi/spi.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/err.h>
17 #include <linux/sched.h>
18 #include <linux/delay.h>
19 #include <linux/module.h>
20 
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/buffer.h>
24 #include <linux/iio/trigger.h>
25 #include <linux/iio/trigger_consumer.h>
26 #include <linux/iio/triggered_buffer.h>
27 #include <linux/iio/adc/ad_sigma_delta.h>
28 
29 #include "ad7793.h"
30 
31 /* NOTE:
32  * The AD7792/AD7793 features a dual use data out ready DOUT/RDY output.
33  * In order to avoid contentions on the SPI bus, it's therefore necessary
34  * to use spi bus locking.
35  *
36  * The DOUT/RDY output must also be wired to an interrupt capable GPIO.
37  */
38 
39 struct ad7793_chip_info {
40  const struct iio_chan_spec *channels;
41  unsigned int num_channels;
42 };
43 
44 struct ad7793_state {
45  const struct ad7793_chip_info *chip_info;
46  struct regulator *reg;
47  u16 int_vref_mv;
48  u16 mode;
49  u16 conf;
50  u32 scale_avail[8][2];
51 
52  struct ad_sigma_delta sd;
53 
54 };
55 
56 enum ad7793_supported_device_ids {
57  ID_AD7785,
58  ID_AD7792,
59  ID_AD7793,
60  ID_AD7794,
61  ID_AD7795,
62 };
63 
64 static struct ad7793_state *ad_sigma_delta_to_ad7793(struct ad_sigma_delta *sd)
65 {
66  return container_of(sd, struct ad7793_state, sd);
67 }
68 
69 static int ad7793_set_channel(struct ad_sigma_delta *sd, unsigned int channel)
70 {
71  struct ad7793_state *st = ad_sigma_delta_to_ad7793(sd);
72 
73  st->conf &= ~AD7793_CONF_CHAN_MASK;
74  st->conf |= AD7793_CONF_CHAN(channel);
75 
76  return ad_sd_write_reg(&st->sd, AD7793_REG_CONF, 2, st->conf);
77 }
78 
79 static int ad7793_set_mode(struct ad_sigma_delta *sd,
80  enum ad_sigma_delta_mode mode)
81 {
82  struct ad7793_state *st = ad_sigma_delta_to_ad7793(sd);
83 
84  st->mode &= ~AD7793_MODE_SEL_MASK;
85  st->mode |= AD7793_MODE_SEL(mode);
86 
87  return ad_sd_write_reg(&st->sd, AD7793_REG_MODE, 2, st->mode);
88 }
89 
90 static const struct ad_sigma_delta_info ad7793_sigma_delta_info = {
91  .set_channel = ad7793_set_channel,
92  .set_mode = ad7793_set_mode,
93  .has_registers = true,
94  .addr_shift = 3,
95  .read_mask = BIT(6),
96 };
97 
98 static const struct ad_sd_calib_data ad7793_calib_arr[6] = {
99  {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN1P_AIN1M},
100  {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN1P_AIN1M},
101  {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN2P_AIN2M},
102  {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN2P_AIN2M},
103  {AD7793_MODE_CAL_INT_ZERO, AD7793_CH_AIN3P_AIN3M},
104  {AD7793_MODE_CAL_INT_FULL, AD7793_CH_AIN3P_AIN3M}
105 };
106 
107 static int ad7793_calibrate_all(struct ad7793_state *st)
108 {
109  return ad_sd_calibrate_all(&st->sd, ad7793_calib_arr,
110  ARRAY_SIZE(ad7793_calib_arr));
111 }
112 
113 static int ad7793_setup(struct iio_dev *indio_dev,
114  const struct ad7793_platform_data *pdata)
115 {
116  struct ad7793_state *st = iio_priv(indio_dev);
117  int i, ret = -1;
118  unsigned long long scale_uv;
119  u32 id;
120 
121  /* reset the serial interface */
122  ret = spi_write(st->sd.spi, (u8 *)&ret, sizeof(ret));
123  if (ret < 0)
124  goto out;
125  msleep(1); /* Wait for at least 500us */
126 
127  /* write/read test for device presence */
128  ret = ad_sd_read_reg(&st->sd, AD7793_REG_ID, 1, &id);
129  if (ret)
130  goto out;
131 
132  id &= AD7793_ID_MASK;
133 
134  if (!((id == AD7792_ID) || (id == AD7793_ID) || (id == AD7795_ID))) {
135  dev_err(&st->sd.spi->dev, "device ID query failed\n");
136  goto out;
137  }
138 
139  st->mode = pdata->mode;
140  st->conf = pdata->conf;
141 
142  ret = ad7793_set_mode(&st->sd, AD_SD_MODE_IDLE);
143  if (ret)
144  goto out;
145 
146  ret = ad7793_set_channel(&st->sd, 0);
147  if (ret)
148  goto out;
149 
150  ret = ad_sd_write_reg(&st->sd, AD7793_REG_IO,
151  sizeof(pdata->io), pdata->io);
152  if (ret)
153  goto out;
154 
155  ret = ad7793_calibrate_all(st);
156  if (ret)
157  goto out;
158 
159  /* Populate available ADC input ranges */
160  for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++) {
161  scale_uv = ((u64)st->int_vref_mv * 100000000)
162  >> (st->chip_info->channels[0].scan_type.realbits -
163  (!!(st->conf & AD7793_CONF_UNIPOLAR) ? 0 : 1));
164  scale_uv >>= i;
165 
166  st->scale_avail[i][1] = do_div(scale_uv, 100000000) * 10;
167  st->scale_avail[i][0] = scale_uv;
168  }
169 
170  return 0;
171 out:
172  dev_err(&st->sd.spi->dev, "setup failed\n");
173  return ret;
174 }
175 
176 static const u16 sample_freq_avail[16] = {0, 470, 242, 123, 62, 50, 39, 33, 19,
177  17, 16, 12, 10, 8, 6, 4};
178 
179 static ssize_t ad7793_read_frequency(struct device *dev,
180  struct device_attribute *attr,
181  char *buf)
182 {
183  struct iio_dev *indio_dev = dev_to_iio_dev(dev);
184  struct ad7793_state *st = iio_priv(indio_dev);
185 
186  return sprintf(buf, "%d\n",
187  sample_freq_avail[AD7793_MODE_RATE(st->mode)]);
188 }
189 
190 static ssize_t ad7793_write_frequency(struct device *dev,
191  struct device_attribute *attr,
192  const char *buf,
193  size_t len)
194 {
195  struct iio_dev *indio_dev = dev_to_iio_dev(dev);
196  struct ad7793_state *st = iio_priv(indio_dev);
197  long lval;
198  int i, ret;
199 
200  mutex_lock(&indio_dev->mlock);
201  if (iio_buffer_enabled(indio_dev)) {
202  mutex_unlock(&indio_dev->mlock);
203  return -EBUSY;
204  }
205  mutex_unlock(&indio_dev->mlock);
206 
207  ret = strict_strtol(buf, 10, &lval);
208  if (ret)
209  return ret;
210 
211  ret = -EINVAL;
212 
213  for (i = 0; i < ARRAY_SIZE(sample_freq_avail); i++)
214  if (lval == sample_freq_avail[i]) {
215  mutex_lock(&indio_dev->mlock);
216  st->mode &= ~AD7793_MODE_RATE(-1);
217  st->mode |= AD7793_MODE_RATE(i);
218  ad_sd_write_reg(&st->sd, AD7793_REG_MODE,
219  sizeof(st->mode), st->mode);
220  mutex_unlock(&indio_dev->mlock);
221  ret = 0;
222  }
223 
224  return ret ? ret : len;
225 }
226 
227 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
228  ad7793_read_frequency,
229  ad7793_write_frequency);
230 
231 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
232  "470 242 123 62 50 39 33 19 17 16 12 10 8 6 4");
233 
234 static ssize_t ad7793_show_scale_available(struct device *dev,
235  struct device_attribute *attr, char *buf)
236 {
237  struct iio_dev *indio_dev = dev_to_iio_dev(dev);
238  struct ad7793_state *st = iio_priv(indio_dev);
239  int i, len = 0;
240 
241  for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
242  len += sprintf(buf + len, "%d.%09u ", st->scale_avail[i][0],
243  st->scale_avail[i][1]);
244 
245  len += sprintf(buf + len, "\n");
246 
247  return len;
248 }
249 
250 static IIO_DEVICE_ATTR_NAMED(in_m_in_scale_available,
251  in_voltage-voltage_scale_available, S_IRUGO,
252  ad7793_show_scale_available, NULL, 0);
253 
254 static struct attribute *ad7793_attributes[] = {
255  &iio_dev_attr_sampling_frequency.dev_attr.attr,
256  &iio_const_attr_sampling_frequency_available.dev_attr.attr,
257  &iio_dev_attr_in_m_in_scale_available.dev_attr.attr,
258  NULL
259 };
260 
261 static const struct attribute_group ad7793_attribute_group = {
262  .attrs = ad7793_attributes,
263 };
264 
265 static int ad7793_read_raw(struct iio_dev *indio_dev,
266  struct iio_chan_spec const *chan,
267  int *val,
268  int *val2,
269  long m)
270 {
271  struct ad7793_state *st = iio_priv(indio_dev);
272  int ret;
273  unsigned long long scale_uv;
274  bool unipolar = !!(st->conf & AD7793_CONF_UNIPOLAR);
275 
276  switch (m) {
277  case IIO_CHAN_INFO_RAW:
278  ret = ad_sigma_delta_single_conversion(indio_dev, chan, val);
279  if (ret < 0)
280  return ret;
281 
282  return IIO_VAL_INT;
283 
284  case IIO_CHAN_INFO_SCALE:
285  switch (chan->type) {
286  case IIO_VOLTAGE:
287  if (chan->differential) {
288  *val = st->
289  scale_avail[(st->conf >> 8) & 0x7][0];
290  *val2 = st->
291  scale_avail[(st->conf >> 8) & 0x7][1];
292  return IIO_VAL_INT_PLUS_NANO;
293  } else {
294  /* 1170mV / 2^23 * 6 */
295  scale_uv = (1170ULL * 100000000ULL * 6ULL);
296  }
297  break;
298  case IIO_TEMP:
299  /* 1170mV / 0.81 mV/C / 2^23 */
300  scale_uv = 1444444444444ULL;
301  break;
302  default:
303  return -EINVAL;
304  }
305 
306  scale_uv >>= (chan->scan_type.realbits - (unipolar ? 0 : 1));
307  *val = 0;
308  *val2 = scale_uv;
309  return IIO_VAL_INT_PLUS_NANO;
310  case IIO_CHAN_INFO_OFFSET:
311  if (!unipolar)
312  *val = -(1 << (chan->scan_type.realbits - 1));
313  else
314  *val = 0;
315 
316  /* Kelvin to Celsius */
317  if (chan->type == IIO_TEMP) {
318  unsigned long long offset;
319  unsigned int shift;
320 
321  shift = chan->scan_type.realbits - (unipolar ? 0 : 1);
322  offset = 273ULL << shift;
323  do_div(offset, 1444);
324  *val -= offset;
325  }
326  return IIO_VAL_INT;
327  }
328  return -EINVAL;
329 }
330 
331 static int ad7793_write_raw(struct iio_dev *indio_dev,
332  struct iio_chan_spec const *chan,
333  int val,
334  int val2,
335  long mask)
336 {
337  struct ad7793_state *st = iio_priv(indio_dev);
338  int ret, i;
339  unsigned int tmp;
340 
341  mutex_lock(&indio_dev->mlock);
342  if (iio_buffer_enabled(indio_dev)) {
343  mutex_unlock(&indio_dev->mlock);
344  return -EBUSY;
345  }
346 
347  switch (mask) {
348  case IIO_CHAN_INFO_SCALE:
349  ret = -EINVAL;
350  for (i = 0; i < ARRAY_SIZE(st->scale_avail); i++)
351  if (val2 == st->scale_avail[i][1]) {
352  ret = 0;
353  tmp = st->conf;
354  st->conf &= ~AD7793_CONF_GAIN(-1);
355  st->conf |= AD7793_CONF_GAIN(i);
356 
357  if (tmp == st->conf)
358  break;
359 
360  ad_sd_write_reg(&st->sd, AD7793_REG_CONF,
361  sizeof(st->conf), st->conf);
362  ad7793_calibrate_all(st);
363  break;
364  }
365  break;
366  default:
367  ret = -EINVAL;
368  }
369 
370  mutex_unlock(&indio_dev->mlock);
371  return ret;
372 }
373 
374 static int ad7793_write_raw_get_fmt(struct iio_dev *indio_dev,
375  struct iio_chan_spec const *chan,
376  long mask)
377 {
378  return IIO_VAL_INT_PLUS_NANO;
379 }
380 
381 static const struct iio_info ad7793_info = {
382  .read_raw = &ad7793_read_raw,
383  .write_raw = &ad7793_write_raw,
384  .write_raw_get_fmt = &ad7793_write_raw_get_fmt,
385  .attrs = &ad7793_attribute_group,
386  .validate_trigger = ad_sd_validate_trigger,
387  .driver_module = THIS_MODULE,
388 };
389 
390 #define DECLARE_AD7793_CHANNELS(_name, _b, _sb, _s) \
391 const struct iio_chan_spec _name##_channels[] = { \
392  AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), (_s)), \
393  AD_SD_DIFF_CHANNEL(1, 1, 1, AD7793_CH_AIN2P_AIN2M, (_b), (_sb), (_s)), \
394  AD_SD_DIFF_CHANNEL(2, 2, 2, AD7793_CH_AIN3P_AIN3M, (_b), (_sb), (_s)), \
395  AD_SD_SHORTED_CHANNEL(3, 0, AD7793_CH_AIN1M_AIN1M, (_b), (_sb), (_s)), \
396  AD_SD_TEMP_CHANNEL(4, AD7793_CH_TEMP, (_b), (_sb), (_s)), \
397  AD_SD_SUPPLY_CHANNEL(5, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), (_s)), \
398  IIO_CHAN_SOFT_TIMESTAMP(6), \
399 }
400 
401 #define DECLARE_AD7795_CHANNELS(_name, _b, _sb) \
402 const struct iio_chan_spec _name##_channels[] = { \
403  AD_SD_DIFF_CHANNEL(0, 0, 0, AD7793_CH_AIN1P_AIN1M, (_b), (_sb), 0), \
404  AD_SD_DIFF_CHANNEL(1, 1, 1, AD7793_CH_AIN2P_AIN2M, (_b), (_sb), 0), \
405  AD_SD_DIFF_CHANNEL(2, 2, 2, AD7793_CH_AIN3P_AIN3M, (_b), (_sb), 0), \
406  AD_SD_DIFF_CHANNEL(3, 3, 3, AD7795_CH_AIN4P_AIN4M, (_b), (_sb), 0), \
407  AD_SD_DIFF_CHANNEL(4, 4, 4, AD7795_CH_AIN5P_AIN5M, (_b), (_sb), 0), \
408  AD_SD_DIFF_CHANNEL(5, 5, 5, AD7795_CH_AIN6P_AIN6M, (_b), (_sb), 0), \
409  AD_SD_SHORTED_CHANNEL(6, 0, AD7795_CH_AIN1M_AIN1M, (_b), (_sb), 0), \
410  AD_SD_TEMP_CHANNEL(7, AD7793_CH_TEMP, (_b), (_sb), 0), \
411  AD_SD_SUPPLY_CHANNEL(8, 3, AD7793_CH_AVDD_MONITOR, (_b), (_sb), 0), \
412  IIO_CHAN_SOFT_TIMESTAMP(9), \
413 }
414 
415 static DECLARE_AD7793_CHANNELS(ad7785, 20, 32, 4);
416 static DECLARE_AD7793_CHANNELS(ad7792, 16, 32, 0);
417 static DECLARE_AD7793_CHANNELS(ad7793, 24, 32, 0);
418 static DECLARE_AD7795_CHANNELS(ad7794, 16, 32);
419 static DECLARE_AD7795_CHANNELS(ad7795, 24, 32);
420 
421 static const struct ad7793_chip_info ad7793_chip_info_tbl[] = {
422  [ID_AD7785] = {
423  .channels = ad7785_channels,
424  .num_channels = ARRAY_SIZE(ad7785_channels),
425  },
426  [ID_AD7792] = {
427  .channels = ad7792_channels,
428  .num_channels = ARRAY_SIZE(ad7792_channels),
429  },
430  [ID_AD7793] = {
431  .channels = ad7793_channels,
432  .num_channels = ARRAY_SIZE(ad7793_channels),
433  },
434  [ID_AD7794] = {
435  .channels = ad7794_channels,
436  .num_channels = ARRAY_SIZE(ad7794_channels),
437  },
438  [ID_AD7795] = {
439  .channels = ad7795_channels,
440  .num_channels = ARRAY_SIZE(ad7795_channels),
441  },
442 };
443 
444 static int __devinit ad7793_probe(struct spi_device *spi)
445 {
446  const struct ad7793_platform_data *pdata = spi->dev.platform_data;
447  struct ad7793_state *st;
448  struct iio_dev *indio_dev;
449  int ret, voltage_uv = 0;
450 
451  if (!pdata) {
452  dev_err(&spi->dev, "no platform data?\n");
453  return -ENODEV;
454  }
455 
456  if (!spi->irq) {
457  dev_err(&spi->dev, "no IRQ?\n");
458  return -ENODEV;
459  }
460 
461  indio_dev = iio_device_alloc(sizeof(*st));
462  if (indio_dev == NULL)
463  return -ENOMEM;
464 
465  st = iio_priv(indio_dev);
466 
467  ad_sd_init(&st->sd, indio_dev, spi, &ad7793_sigma_delta_info);
468 
469  st->reg = regulator_get(&spi->dev, "vcc");
470  if (!IS_ERR(st->reg)) {
471  ret = regulator_enable(st->reg);
472  if (ret)
473  goto error_put_reg;
474 
475  voltage_uv = regulator_get_voltage(st->reg);
476  }
477 
478  st->chip_info =
479  &ad7793_chip_info_tbl[spi_get_device_id(spi)->driver_data];
480 
481  if (pdata && pdata->vref_mv)
482  st->int_vref_mv = pdata->vref_mv;
483  else if (voltage_uv)
484  st->int_vref_mv = voltage_uv / 1000;
485  else
486  st->int_vref_mv = 1170; /* Build-in ref */
487 
488  spi_set_drvdata(spi, indio_dev);
489 
490  indio_dev->dev.parent = &spi->dev;
491  indio_dev->name = spi_get_device_id(spi)->name;
492  indio_dev->modes = INDIO_DIRECT_MODE;
493  indio_dev->channels = st->chip_info->channels;
494  indio_dev->num_channels = st->chip_info->num_channels;
495  indio_dev->info = &ad7793_info;
496 
497  ret = ad_sd_setup_buffer_and_trigger(indio_dev);
498  if (ret)
499  goto error_disable_reg;
500 
501  ret = ad7793_setup(indio_dev, pdata);
502  if (ret)
503  goto error_remove_trigger;
504 
505  ret = iio_device_register(indio_dev);
506  if (ret)
507  goto error_remove_trigger;
508 
509  return 0;
510 
511 error_remove_trigger:
512  ad_sd_cleanup_buffer_and_trigger(indio_dev);
513 error_disable_reg:
514  if (!IS_ERR(st->reg))
515  regulator_disable(st->reg);
516 error_put_reg:
517  if (!IS_ERR(st->reg))
518  regulator_put(st->reg);
519 
520  iio_device_free(indio_dev);
521 
522  return ret;
523 }
524 
525 static int __devexit ad7793_remove(struct spi_device *spi)
526 {
527  struct iio_dev *indio_dev = spi_get_drvdata(spi);
528  struct ad7793_state *st = iio_priv(indio_dev);
529 
530  iio_device_unregister(indio_dev);
531  ad_sd_cleanup_buffer_and_trigger(indio_dev);
532 
533  if (!IS_ERR(st->reg)) {
534  regulator_disable(st->reg);
535  regulator_put(st->reg);
536  }
537 
538  iio_device_free(indio_dev);
539 
540  return 0;
541 }
542 
543 static const struct spi_device_id ad7793_id[] = {
544  {"ad7785", ID_AD7785},
545  {"ad7792", ID_AD7792},
546  {"ad7793", ID_AD7793},
547  {"ad7794", ID_AD7794},
548  {"ad7795", ID_AD7795},
549  {}
550 };
551 MODULE_DEVICE_TABLE(spi, ad7793_id);
552 
553 static struct spi_driver ad7793_driver = {
554  .driver = {
555  .name = "ad7793",
556  .owner = THIS_MODULE,
557  },
558  .probe = ad7793_probe,
559  .remove = __devexit_p(ad7793_remove),
560  .id_table = ad7793_id,
561 };
562 module_spi_driver(ad7793_driver);
563 
564 MODULE_AUTHOR("Michael Hennerich <[email protected]>");
565 MODULE_DESCRIPTION("Analog Devices AD7793 and simialr ADCs");
566 MODULE_LICENSE("GPL v2");
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