13 #include <linux/export.h>
21 #include <mach/portmux.h>
25 #define MAX_NR_PIO_DEVICES 8
46 pio = &pio_dev[
index];
62 pio = gpio_to_pio(port);
73 spin_unlock(&pio_lock);
95 spin_unlock(&pio_lock);
106 unsigned int pin_index = pin & 0x1f;
109 pio = gpio_to_pio(pin);
111 printk(
"pio: invalid pin %u\n", pin);
116 printk(
"%s: pin %u is busy\n", pio->
name, pin_index);
158 unsigned int pin_index = pin & 0x1f;
160 pio = gpio_to_pio(pin);
162 printk(
"pio: invalid pin %u\n", pin);
176 pio = gpio_to_pio(port);
183 spin_lock(&pio_lock);
187 spin_unlock(&pio_lock);
193 spin_unlock(&pio_lock);
204 static int direction_input(
struct gpio_chip *
chip,
unsigned offset)
216 static int gpio_get(
struct gpio_chip *chip,
unsigned offset)
220 return (
pio_readl(pio, PDSR) >> offset) & 1;
223 static void gpio_set(
struct gpio_chip *chip,
unsigned offset,
int value);
225 static int direction_output(
struct gpio_chip *chip,
unsigned offset,
int value)
233 gpio_set(chip, offset, value);
238 static void gpio_set(
struct gpio_chip *chip,
unsigned offset,
int value)
253 static void gpio_irq_mask(
struct irq_data *
d)
261 static void gpio_irq_unmask(
struct irq_data *d)
269 static int gpio_irq_type(
struct irq_data *d,
unsigned type)
277 static struct irq_chip gpio_irqchip = {
279 .irq_mask = gpio_irq_mask,
280 .irq_unmask = gpio_irq_unmask,
281 .irq_set_type = gpio_irq_type,
284 static void gpio_irq_handler(
unsigned irq,
struct irq_desc *
desc)
286 struct pio_device *pio = irq_desc_get_chip_data(desc);
289 gpio_irq = (unsigned) irq_get_handler_data(irq);
310 gpio_irq_setup(
struct pio_device *pio,
int irq,
int gpio_irq)
317 for (i = 0; i < 32; i++, gpio_irq++) {
319 irq_set_chip_and_handler(gpio_irq, &gpio_irqchip,
323 irq_set_chained_handler(irq, gpio_irq_handler);
328 #ifdef CONFIG_DEBUG_FS
339 u32 psr, osr,
imr, pdsr, pusr, ifsr, mdsr;
352 bank =
'A' + pio->
pdev->id;
354 for (i = 0, mask = 1; i < 32; i++, mask <<= 1) {
358 if (!label && (imr & mask))
363 seq_printf(s,
" gpio-%-3d P%c%-2d (%-12s) %s %s %s",
364 chip->base + i, bank, i,
366 (osr & mask) ?
"out" :
"in ",
367 (mask & pdsr) ?
"hi" :
"lo",
368 (mask & pusr) ?
" " :
"up");
371 if ((osr & mdsr) & mask)
381 #define pio_bank_show NULL
394 pio = &pio_dev[pdev->
id];
398 pio->
chip.base = pdev->
id * 32;
399 pio->
chip.ngpio = 32;
403 pio->
chip.direction_input = direction_input;
404 pio->
chip.get = gpio_get;
405 pio->
chip.direction_output = direction_output;
406 pio->
chip.set = gpio_set;
411 gpio_irq_setup(pio, irq, gpio_irq_base);
413 platform_set_drvdata(pdev, pio);
416 pio->
name, pio->
regs, irq, gpio_irq_base, gpio_irq_base + 31);
427 static int __init pio_init(
void)
439 dev_err(&pdev->
dev,
"only %d PIO devices supported\n",
444 pio = &pio_dev[pdev->
id];
449 dev_err(&pdev->
dev,
"no mmio resource defined\n");
454 if (IS_ERR(pio->
clk))
460 dev_err(&pdev->
dev,
"no mck clock defined\n");