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Data Structures | Macros
ioc3.h File Reference

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Data Structures

struct  ioc3_serialregs
 
struct  ioc3_uartregs
 
struct  ioc3_sioregs
 
struct  ioc3
 

Macros

#define iu_rbr   u1.rbr
 
#define iu_thr   u1.thr
 
#define iu_dll   u1.dll
 
#define iu_ier   u2.ier
 
#define iu_dlm   u2.dlm
 
#define iu_iir   u3.iir
 
#define iu_fcr   u3.fcr
 
#define eier   fill1[8]
 
#define eisr   fill1[4]
 
#define PCI_LAT   0xc /* Latency Timer */
 
#define PCI_SCR_DROP_MODE_EN   0x00008000 /* drop pios on parity err */
 
#define UARTA_BASE   0x178
 
#define UARTB_BASE   0x170
 
#define RXSB_OVERRUN   0x01 /* char(s) lost */
 
#define RXSB_PAR_ERR   0x02 /* parity error */
 
#define RXSB_FRAME_ERR   0x04 /* framing error */
 
#define RXSB_BREAK   0x08 /* break character */
 
#define RXSB_CTS   0x10 /* state of CTS */
 
#define RXSB_DCD   0x20 /* state of DCD */
 
#define RXSB_MODEM_VALID   0x40 /* DCD, CTS and OVERRUN are valid */
 
#define RXSB_DATA_VALID   0x80 /* FRAME_ERR PAR_ERR & BREAK valid */
 
#define TXCB_INT_WHEN_DONE   0x20 /* interrupt after this byte is sent */
 
#define TXCB_INVALID   0x00 /* byte is invalid */
 
#define TXCB_VALID   0x40 /* byte is valid */
 
#define TXCB_MCR   0x80 /* data<7:0> to modem cntrl register */
 
#define TXCB_DELAY   0xc0 /* delay data<7:0> mSec */
 
#define SBBR_L_SIZE   0x00000001 /* 0 1KB rings, 1 4KB rings */
 
#define SSCR_RX_THRESHOLD   0x000001ff /* hiwater mark */
 
#define SSCR_TX_TIMER_BUSY   0x00010000 /* TX timer in progress */
 
#define SSCR_HFC_EN   0x00020000 /* h/w flow cntrl enabled */
 
#define SSCR_RX_RING_DCD   0x00040000 /* postRX record on delta-DCD */
 
#define SSCR_RX_RING_CTS   0x00080000 /* postRX record on delta-CTS */
 
#define SSCR_HIGH_SPD   0x00100000 /* 4X speed */
 
#define SSCR_DIAG   0x00200000 /* bypass clock divider */
 
#define SSCR_RX_DRAIN   0x08000000 /* drain RX buffer to memory */
 
#define SSCR_DMA_EN   0x10000000 /* enable ring buffer DMA */
 
#define SSCR_DMA_PAUSE   0x20000000 /* pause DMA */
 
#define SSCR_PAUSE_STATE   0x40000000 /* set when PAUSE takes effect*/
 
#define SSCR_RESET   0x80000000 /* reset DMA channels */
 
#define PROD_CONS_PTR_4K   0x00000ff8 /* for 4K buffers */
 
#define PROD_CONS_PTR_1K   0x000003f8 /* for 1K buffers */
 
#define PROD_CONS_PTR_OFF   3
 
#define SRCIR_ARM   0x80000000 /* arm RX timer */
 
#define SHADOW_DR   0x00000001 /* data ready */
 
#define SHADOW_OE   0x00000002 /* overrun error */
 
#define SHADOW_PE   0x00000004 /* parity error */
 
#define SHADOW_FE   0x00000008 /* framing error */
 
#define SHADOW_BI   0x00000010 /* break interrupt */
 
#define SHADOW_THRE   0x00000020 /* transmit holding reg empty */
 
#define SHADOW_TEMT   0x00000040 /* transmit shift reg empty */
 
#define SHADOW_RFCE   0x00000080 /* char in RX fifo has error */
 
#define SHADOW_DCTS   0x00010000 /* delta clear to send */
 
#define SHADOW_DDCD   0x00080000 /* delta data carrier detect */
 
#define SHADOW_CTS   0x00100000 /* clear to send */
 
#define SHADOW_DCD   0x00800000 /* data carrier detect */
 
#define SHADOW_DTR   0x01000000 /* data terminal ready */
 
#define SHADOW_RTS   0x02000000 /* request to send */
 
#define SHADOW_OUT1   0x04000000 /* 16550 OUT1 bit */
 
#define SHADOW_OUT2   0x08000000 /* 16550 OUT2 bit */
 
#define SHADOW_LOOP   0x10000000 /* loopback enabled */
 
#define SRTR_CNT   0x00000fff /* reload value for RX timer */
 
#define SRTR_CNT_VAL   0x0fff0000 /* current value of RX timer */
 
#define SRTR_CNT_VAL_SHIFT   16
 
#define SRTR_HZ   16000 /* SRTR clock frequency */
 
#define SIO_IR_SA_TX_MT   0x00000001 /* Serial port A TX empty */
 
#define SIO_IR_SA_RX_FULL   0x00000002 /* port A RX buf full */
 
#define SIO_IR_SA_RX_HIGH   0x00000004 /* port A RX hiwat */
 
#define SIO_IR_SA_RX_TIMER   0x00000008 /* port A RX timeout */
 
#define SIO_IR_SA_DELTA_DCD   0x00000010 /* port A delta DCD */
 
#define SIO_IR_SA_DELTA_CTS   0x00000020 /* port A delta CTS */
 
#define SIO_IR_SA_INT   0x00000040 /* port A pass-thru intr */
 
#define SIO_IR_SA_TX_EXPLICIT   0x00000080 /* port A explicit TX thru */
 
#define SIO_IR_SA_MEMERR   0x00000100 /* port A PCI error */
 
#define SIO_IR_SB_TX_MT   0x00000200
 
#define SIO_IR_SB_RX_FULL   0x00000400
 
#define SIO_IR_SB_RX_HIGH   0x00000800
 
#define SIO_IR_SB_RX_TIMER   0x00001000
 
#define SIO_IR_SB_DELTA_DCD   0x00002000
 
#define SIO_IR_SB_DELTA_CTS   0x00004000
 
#define SIO_IR_SB_INT   0x00008000
 
#define SIO_IR_SB_TX_EXPLICIT   0x00010000
 
#define SIO_IR_SB_MEMERR   0x00020000
 
#define SIO_IR_PP_INT   0x00040000 /* P port pass-thru intr */
 
#define SIO_IR_PP_INTA   0x00080000 /* PP context A thru */
 
#define SIO_IR_PP_INTB   0x00100000 /* PP context B thru */
 
#define SIO_IR_PP_MEMERR   0x00200000 /* PP PCI error */
 
#define SIO_IR_KBD_INT   0x00400000 /* kbd/mouse intr */
 
#define SIO_IR_RT_INT   0x08000000 /* RT output pulse */
 
#define SIO_IR_GEN_INT1   0x10000000 /* RT input pulse */
 
#define SIO_IR_GEN_INT_SHIFT   28
 
#define SIO_IR_SA
 
#define SIO_IR_SB
 
#define SIO_IR_PP
 
#define SIO_IR_RT   (SIO_IR_RT_INT | SIO_IR_GEN_INT1)
 
#define SIO_CR_CMD_PULSE_SHIFT   15
 
#define SIO_CR_SER_A_BASE_SHIFT   1
 
#define SIO_CR_SER_B_BASE_SHIFT   8
 
#define SIO_CR_ARB_DIAG   0x00380000 /* cur !enet PCI requet (ro) */
 
#define SIO_CR_ARB_DIAG_TXA   0x00000000
 
#define SIO_CR_ARB_DIAG_RXA   0x00080000
 
#define SIO_CR_ARB_DIAG_TXB   0x00100000
 
#define SIO_CR_ARB_DIAG_RXB   0x00180000
 
#define SIO_CR_ARB_DIAG_PP   0x00200000
 
#define SIO_CR_ARB_DIAG_IDLE   0x00400000 /* 0 -> active request (ro) */
 
#define GPCR_PHY_RESET   0x20 /* pin is output to PHY reset */
 
#define GPCR_UARTB_MODESEL   0x40 /* pin is output to port B mode sel */
 
#define GPCR_UARTA_MODESEL   0x80 /* pin is output to port A mode sel */
 
#define GPPR_PHY_RESET_PIN   5 /* GIO pin controlling phy reset */
 
#define GPPR_UARTB_MODESEL_PIN   6 /* GIO pin cntrling uartb modeselect */
 
#define GPPR_UARTA_MODESEL_PIN   7 /* GIO pin cntrling uarta modeselect */
 

Macro Definition Documentation

#define eier   fill1[8]

Definition at line 91 of file ioc3.h.

#define eisr   fill1[4]

Definition at line 92 of file ioc3.h.

#define GPCR_PHY_RESET   0x20 /* pin is output to PHY reset */

Definition at line 233 of file ioc3.h.

#define GPCR_UARTA_MODESEL   0x80 /* pin is output to port A mode sel */

Definition at line 235 of file ioc3.h.

#define GPCR_UARTB_MODESEL   0x40 /* pin is output to port B mode sel */

Definition at line 234 of file ioc3.h.

#define GPPR_PHY_RESET_PIN   5 /* GIO pin controlling phy reset */

Definition at line 237 of file ioc3.h.

#define GPPR_UARTA_MODESEL_PIN   7 /* GIO pin cntrling uarta modeselect */

Definition at line 239 of file ioc3.h.

#define GPPR_UARTB_MODESEL_PIN   6 /* GIO pin cntrling uartb modeselect */

Definition at line 238 of file ioc3.h.

#define iu_dll   u1.dll

Definition at line 42 of file ioc3.h.

#define iu_dlm   u2.dlm

Definition at line 44 of file ioc3.h.

#define iu_fcr   u3.fcr

Definition at line 46 of file ioc3.h.

#define iu_ier   u2.ier

Definition at line 43 of file ioc3.h.

#define iu_iir   u3.iir

Definition at line 45 of file ioc3.h.

#define iu_rbr   u1.rbr

Definition at line 40 of file ioc3.h.

#define iu_thr   u1.thr

Definition at line 41 of file ioc3.h.

#define PCI_LAT   0xc /* Latency Timer */

Definition at line 94 of file ioc3.h.

#define PCI_SCR_DROP_MODE_EN   0x00008000 /* drop pios on parity err */

Definition at line 95 of file ioc3.h.

#define PROD_CONS_PTR_1K   0x000003f8 /* for 1K buffers */

Definition at line 136 of file ioc3.h.

#define PROD_CONS_PTR_4K   0x00000ff8 /* for 4K buffers */

Definition at line 135 of file ioc3.h.

#define PROD_CONS_PTR_OFF   3

Definition at line 137 of file ioc3.h.

#define RXSB_BREAK   0x08 /* break character */

Definition at line 104 of file ioc3.h.

#define RXSB_CTS   0x10 /* state of CTS */

Definition at line 105 of file ioc3.h.

#define RXSB_DATA_VALID   0x80 /* FRAME_ERR PAR_ERR & BREAK valid */

Definition at line 108 of file ioc3.h.

#define RXSB_DCD   0x20 /* state of DCD */

Definition at line 106 of file ioc3.h.

#define RXSB_FRAME_ERR   0x04 /* framing error */

Definition at line 103 of file ioc3.h.

#define RXSB_MODEM_VALID   0x40 /* DCD, CTS and OVERRUN are valid */

Definition at line 107 of file ioc3.h.

#define RXSB_OVERRUN   0x01 /* char(s) lost */

Definition at line 101 of file ioc3.h.

#define RXSB_PAR_ERR   0x02 /* parity error */

Definition at line 102 of file ioc3.h.

#define SBBR_L_SIZE   0x00000001 /* 0 1KB rings, 1 4KB rings */

Definition at line 118 of file ioc3.h.

#define SHADOW_BI   0x00000010 /* break interrupt */

Definition at line 147 of file ioc3.h.

#define SHADOW_CTS   0x00100000 /* clear to send */

Definition at line 153 of file ioc3.h.

#define SHADOW_DCD   0x00800000 /* data carrier detect */

Definition at line 154 of file ioc3.h.

#define SHADOW_DCTS   0x00010000 /* delta clear to send */

Definition at line 151 of file ioc3.h.

#define SHADOW_DDCD   0x00080000 /* delta data carrier detect */

Definition at line 152 of file ioc3.h.

#define SHADOW_DR   0x00000001 /* data ready */

Definition at line 143 of file ioc3.h.

#define SHADOW_DTR   0x01000000 /* data terminal ready */

Definition at line 155 of file ioc3.h.

#define SHADOW_FE   0x00000008 /* framing error */

Definition at line 146 of file ioc3.h.

#define SHADOW_LOOP   0x10000000 /* loopback enabled */

Definition at line 159 of file ioc3.h.

#define SHADOW_OE   0x00000002 /* overrun error */

Definition at line 144 of file ioc3.h.

#define SHADOW_OUT1   0x04000000 /* 16550 OUT1 bit */

Definition at line 157 of file ioc3.h.

#define SHADOW_OUT2   0x08000000 /* 16550 OUT2 bit */

Definition at line 158 of file ioc3.h.

#define SHADOW_PE   0x00000004 /* parity error */

Definition at line 145 of file ioc3.h.

#define SHADOW_RFCE   0x00000080 /* char in RX fifo has error */

Definition at line 150 of file ioc3.h.

#define SHADOW_RTS   0x02000000 /* request to send */

Definition at line 156 of file ioc3.h.

#define SHADOW_TEMT   0x00000040 /* transmit shift reg empty */

Definition at line 149 of file ioc3.h.

#define SHADOW_THRE   0x00000020 /* transmit holding reg empty */

Definition at line 148 of file ioc3.h.

#define SIO_CR_ARB_DIAG   0x00380000 /* cur !enet PCI requet (ro) */

Definition at line 224 of file ioc3.h.

#define SIO_CR_ARB_DIAG_IDLE   0x00400000 /* 0 -> active request (ro) */

Definition at line 230 of file ioc3.h.

#define SIO_CR_ARB_DIAG_PP   0x00200000

Definition at line 229 of file ioc3.h.

#define SIO_CR_ARB_DIAG_RXA   0x00080000

Definition at line 226 of file ioc3.h.

#define SIO_CR_ARB_DIAG_RXB   0x00180000

Definition at line 228 of file ioc3.h.

#define SIO_CR_ARB_DIAG_TXA   0x00000000

Definition at line 225 of file ioc3.h.

#define SIO_CR_ARB_DIAG_TXB   0x00100000

Definition at line 227 of file ioc3.h.

#define SIO_CR_CMD_PULSE_SHIFT   15

Definition at line 221 of file ioc3.h.

#define SIO_CR_SER_A_BASE_SHIFT   1

Definition at line 222 of file ioc3.h.

#define SIO_CR_SER_B_BASE_SHIFT   8

Definition at line 223 of file ioc3.h.

#define SIO_IR_GEN_INT1   0x10000000 /* RT input pulse */

Definition at line 192 of file ioc3.h.

#define SIO_IR_GEN_INT_SHIFT   28

Definition at line 193 of file ioc3.h.

#define SIO_IR_KBD_INT   0x00400000 /* kbd/mouse intr */

Definition at line 190 of file ioc3.h.

#define SIO_IR_PP
Value:

Definition at line 216 of file ioc3.h.

#define SIO_IR_PP_INT   0x00040000 /* P port pass-thru intr */

Definition at line 186 of file ioc3.h.

#define SIO_IR_PP_INTA   0x00080000 /* PP context A thru */

Definition at line 187 of file ioc3.h.

#define SIO_IR_PP_INTB   0x00100000 /* PP context B thru */

Definition at line 188 of file ioc3.h.

#define SIO_IR_PP_MEMERR   0x00200000 /* PP PCI error */

Definition at line 189 of file ioc3.h.

#define SIO_IR_RT   (SIO_IR_RT_INT | SIO_IR_GEN_INT1)

Definition at line 218 of file ioc3.h.

#define SIO_IR_RT_INT   0x08000000 /* RT output pulse */

Definition at line 191 of file ioc3.h.

#define SIO_IR_SA
Value:
SIO_IR_SA_RX_FULL | \
SIO_IR_SA_RX_HIGH | \
SIO_IR_SA_RX_TIMER | \
SIO_IR_SA_DELTA_DCD | \
SIO_IR_SA_DELTA_CTS | \
SIO_IR_SA_INT | \
SIO_IR_SA_TX_EXPLICIT | \
SIO_IR_SA_MEMERR)

Definition at line 196 of file ioc3.h.

#define SIO_IR_SA_DELTA_CTS   0x00000020 /* port A delta CTS */

Definition at line 173 of file ioc3.h.

#define SIO_IR_SA_DELTA_DCD   0x00000010 /* port A delta DCD */

Definition at line 172 of file ioc3.h.

#define SIO_IR_SA_INT   0x00000040 /* port A pass-thru intr */

Definition at line 174 of file ioc3.h.

#define SIO_IR_SA_MEMERR   0x00000100 /* port A PCI error */

Definition at line 176 of file ioc3.h.

#define SIO_IR_SA_RX_FULL   0x00000002 /* port A RX buf full */

Definition at line 169 of file ioc3.h.

#define SIO_IR_SA_RX_HIGH   0x00000004 /* port A RX hiwat */

Definition at line 170 of file ioc3.h.

#define SIO_IR_SA_RX_TIMER   0x00000008 /* port A RX timeout */

Definition at line 171 of file ioc3.h.

#define SIO_IR_SA_TX_EXPLICIT   0x00000080 /* port A explicit TX thru */

Definition at line 175 of file ioc3.h.

#define SIO_IR_SA_TX_MT   0x00000001 /* Serial port A TX empty */

Definition at line 168 of file ioc3.h.

#define SIO_IR_SB
Value:
SIO_IR_SB_RX_FULL | \
SIO_IR_SB_RX_HIGH | \
SIO_IR_SB_RX_TIMER | \
SIO_IR_SB_DELTA_DCD | \
SIO_IR_SB_DELTA_CTS | \
SIO_IR_SB_INT | \
SIO_IR_SB_TX_EXPLICIT | \
SIO_IR_SB_MEMERR)

Definition at line 206 of file ioc3.h.

#define SIO_IR_SB_DELTA_CTS   0x00004000

Definition at line 182 of file ioc3.h.

#define SIO_IR_SB_DELTA_DCD   0x00002000

Definition at line 181 of file ioc3.h.

#define SIO_IR_SB_INT   0x00008000

Definition at line 183 of file ioc3.h.

#define SIO_IR_SB_MEMERR   0x00020000

Definition at line 185 of file ioc3.h.

#define SIO_IR_SB_RX_FULL   0x00000400

Definition at line 178 of file ioc3.h.

#define SIO_IR_SB_RX_HIGH   0x00000800

Definition at line 179 of file ioc3.h.

#define SIO_IR_SB_RX_TIMER   0x00001000

Definition at line 180 of file ioc3.h.

#define SIO_IR_SB_TX_EXPLICIT   0x00010000

Definition at line 184 of file ioc3.h.

#define SIO_IR_SB_TX_MT   0x00000200

Definition at line 177 of file ioc3.h.

#define SRCIR_ARM   0x80000000 /* arm RX timer */

Definition at line 140 of file ioc3.h.

#define SRTR_CNT   0x00000fff /* reload value for RX timer */

Definition at line 162 of file ioc3.h.

#define SRTR_CNT_VAL   0x0fff0000 /* current value of RX timer */

Definition at line 163 of file ioc3.h.

#define SRTR_CNT_VAL_SHIFT   16

Definition at line 164 of file ioc3.h.

#define SRTR_HZ   16000 /* SRTR clock frequency */

Definition at line 165 of file ioc3.h.

#define SSCR_DIAG   0x00200000 /* bypass clock divider */

Definition at line 127 of file ioc3.h.

#define SSCR_DMA_EN   0x10000000 /* enable ring buffer DMA */

Definition at line 129 of file ioc3.h.

#define SSCR_DMA_PAUSE   0x20000000 /* pause DMA */

Definition at line 130 of file ioc3.h.

#define SSCR_HFC_EN   0x00020000 /* h/w flow cntrl enabled */

Definition at line 123 of file ioc3.h.

#define SSCR_HIGH_SPD   0x00100000 /* 4X speed */

Definition at line 126 of file ioc3.h.

#define SSCR_PAUSE_STATE   0x40000000 /* set when PAUSE takes effect*/

Definition at line 131 of file ioc3.h.

#define SSCR_RESET   0x80000000 /* reset DMA channels */

Definition at line 132 of file ioc3.h.

#define SSCR_RX_DRAIN   0x08000000 /* drain RX buffer to memory */

Definition at line 128 of file ioc3.h.

#define SSCR_RX_RING_CTS   0x00080000 /* postRX record on delta-CTS */

Definition at line 125 of file ioc3.h.

#define SSCR_RX_RING_DCD   0x00040000 /* postRX record on delta-DCD */

Definition at line 124 of file ioc3.h.

#define SSCR_RX_THRESHOLD   0x000001ff /* hiwater mark */

Definition at line 121 of file ioc3.h.

#define SSCR_TX_TIMER_BUSY   0x00010000 /* TX timer in progress */

Definition at line 122 of file ioc3.h.

#define TXCB_DELAY   0xc0 /* delay data<7:0> mSec */

Definition at line 115 of file ioc3.h.

#define TXCB_INT_WHEN_DONE   0x20 /* interrupt after this byte is sent */

Definition at line 111 of file ioc3.h.

#define TXCB_INVALID   0x00 /* byte is invalid */

Definition at line 112 of file ioc3.h.

#define TXCB_MCR   0x80 /* data<7:0> to modem cntrl register */

Definition at line 114 of file ioc3.h.

#define TXCB_VALID   0x40 /* byte is valid */

Definition at line 113 of file ioc3.h.

#define UARTA_BASE   0x178

Definition at line 96 of file ioc3.h.

#define UARTB_BASE   0x170

Definition at line 97 of file ioc3.h.