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firmware.c
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1 /*
2  * arch/parisc/kernel/firmware.c - safe PDC access routines
3  *
4  * PDC == Processor Dependent Code
5  *
6  * See http://www.parisc-linux.org/documentation/index.html
7  * for documentation describing the entry points and calling
8  * conventions defined below.
9  *
10  * Copyright 1999 SuSE GmbH Nuernberg (Philipp Rumpf, [email protected])
11  * Copyright 1999 The Puffin Group, (Alex deVries, David Kennedy)
12  * Copyright 2003 Grant Grundler <grundler parisc-linux org>
13  * Copyright 2003,2004 Ryan Bradetich <[email protected]>
14  * Copyright 2004,2006 Thibaut VARENE <[email protected]>
15  *
16  * This program is free software; you can redistribute it and/or modify
17  * it under the terms of the GNU General Public License as published by
18  * the Free Software Foundation; either version 2 of the License, or
19  * (at your option) any later version.
20  *
21  */
22 
23 /* I think it would be in everyone's best interest to follow this
24  * guidelines when writing PDC wrappers:
25  *
26  * - the name of the pdc wrapper should match one of the macros
27  * used for the first two arguments
28  * - don't use caps for random parts of the name
29  * - use the static PDC result buffers and "copyout" to structs
30  * supplied by the caller to encapsulate alignment restrictions
31  * - hold pdc_lock while in PDC or using static result buffers
32  * - use __pa() to convert virtual (kernel) pointers to physical
33  * ones.
34  * - the name of the struct used for pdc return values should equal
35  * one of the macros used for the first two arguments to the
36  * corresponding PDC call
37  * - keep the order of arguments
38  * - don't be smart (setting trailing NUL bytes for strings, return
39  * something useful even if the call failed) unless you are sure
40  * it's not going to affect functionality or performance
41  *
42  * Example:
43  * int pdc_cache_info(struct pdc_cache_info *cache_info )
44  * {
45  * int retval;
46  *
47  * spin_lock_irq(&pdc_lock);
48  * retval = mem_pdc_call(PDC_CACHE,PDC_CACHE_INFO,__pa(cache_info),0);
49  * convert_to_wide(pdc_result);
50  * memcpy(cache_info, pdc_result, sizeof(*cache_info));
51  * spin_unlock_irq(&pdc_lock);
52  *
53  * return retval;
54  * }
55  * prumpf 991016
56  */
57 
58 #include <stdarg.h>
59 
60 #include <linux/delay.h>
61 #include <linux/init.h>
62 #include <linux/kernel.h>
63 #include <linux/module.h>
64 #include <linux/string.h>
65 #include <linux/spinlock.h>
66 
67 #include <asm/page.h>
68 #include <asm/pdc.h>
69 #include <asm/pdcpat.h>
70 #include <asm/processor.h> /* for boot_cpu_data */
71 
72 static DEFINE_SPINLOCK(pdc_lock);
73 extern unsigned long pdc_result[NUM_PDC_RESULT];
74 extern unsigned long pdc_result2[NUM_PDC_RESULT];
75 
76 #ifdef CONFIG_64BIT
77 #define WIDE_FIRMWARE 0x1
78 #define NARROW_FIRMWARE 0x2
79 
80 /* Firmware needs to be initially set to narrow to determine the
81  * actual firmware width. */
82 int parisc_narrow_firmware __read_mostly = 1;
83 #endif
84 
85 /* On most currently-supported platforms, IODC I/O calls are 32-bit calls
86  * and MEM_PDC calls are always the same width as the OS.
87  * Some PAT boxes may have 64-bit IODC I/O.
88  *
89  * Ryan Bradetich added the now obsolete CONFIG_PDC_NARROW to allow
90  * 64-bit kernels to run on systems with 32-bit MEM_PDC calls.
91  * This allowed wide kernels to run on Cxxx boxes.
92  * We now detect 32-bit-only PDC and dynamically switch to 32-bit mode
93  * when running a 64-bit kernel on such boxes (e.g. C200 or C360).
94  */
95 
96 #ifdef CONFIG_64BIT
97 long real64_call(unsigned long function, ...);
98 #endif
99 long real32_call(unsigned long function, ...);
100 
101 #ifdef CONFIG_64BIT
102 # define MEM_PDC (unsigned long)(PAGE0->mem_pdc_hi) << 32 | PAGE0->mem_pdc
103 # define mem_pdc_call(args...) unlikely(parisc_narrow_firmware) ? real32_call(MEM_PDC, args) : real64_call(MEM_PDC, args)
104 #else
105 # define MEM_PDC (unsigned long)PAGE0->mem_pdc
106 # define mem_pdc_call(args...) real32_call(MEM_PDC, args)
107 #endif
108 
109 
117 static unsigned long f_extend(unsigned long address)
118 {
119 #ifdef CONFIG_64BIT
120  if(unlikely(parisc_narrow_firmware)) {
121  if((address & 0xff000000) == 0xf0000000)
122  return 0xf0f0f0f000000000UL | (u32)address;
123 
124  if((address & 0xf0000000) == 0xf0000000)
125  return 0xffffffff00000000UL | (u32)address;
126  }
127 #endif
128  return address;
129 }
130 
139 static void convert_to_wide(unsigned long *addr)
140 {
141 #ifdef CONFIG_64BIT
142  int i;
143  unsigned int *p = (unsigned int *)addr;
144 
145  if(unlikely(parisc_narrow_firmware)) {
146  for(i = 31; i >= 0; --i)
147  addr[i] = p[i];
148  }
149 #endif
150 }
151 
152 #ifdef CONFIG_64BIT
154 {
155  int ret;
156 
158  __pa(pdc_result), 0);
159  convert_to_wide(pdc_result);
160  if (pdc_result[0] != NARROW_FIRMWARE)
161  parisc_narrow_firmware = 0;
162 }
163 
170 void __cpuinit set_firmware_width(void)
171 {
172  unsigned long flags;
173  spin_lock_irqsave(&pdc_lock, flags);
175  spin_unlock_irqrestore(&pdc_lock, flags);
176 }
177 #else
179  return;
180 }
181 
183  return;
184 }
185 #endif /*CONFIG_64BIT*/
186 
194 {
195  /* Spinlock DEBUG code freaks out if we unconditionally unlock */
196  if (spin_is_locked(&pdc_lock))
197  spin_unlock(&pdc_lock);
198 }
199 
200 
210 int pdc_add_valid(unsigned long address)
211 {
212  int retval;
213  unsigned long flags;
214 
215  spin_lock_irqsave(&pdc_lock, flags);
216  retval = mem_pdc_call(PDC_ADD_VALID, PDC_ADD_VALID_VERIFY, address);
217  spin_unlock_irqrestore(&pdc_lock, flags);
218 
219  return retval;
220 }
222 
231 int __init pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len)
232 {
233  int retval;
234  unsigned long flags;
235 
236  spin_lock_irqsave(&pdc_lock, flags);
237  memcpy(&pdc_result, chassis_info, sizeof(*chassis_info));
238  memcpy(&pdc_result2, led_info, len);
240  __pa(pdc_result), __pa(pdc_result2), len);
241  memcpy(chassis_info, pdc_result, sizeof(*chassis_info));
242  memcpy(led_info, pdc_result2, len);
243  spin_unlock_irqrestore(&pdc_lock, flags);
244 
245  return retval;
246 }
247 
254 #ifdef CONFIG_64BIT
255 int pdc_pat_chassis_send_log(unsigned long state, unsigned long data)
256 {
257  int retval = 0;
258  unsigned long flags;
259 
260  if (!is_pdc_pat())
261  return -1;
262 
263  spin_lock_irqsave(&pdc_lock, flags);
265  spin_unlock_irqrestore(&pdc_lock, flags);
266 
267  return retval;
268 }
269 #endif
270 
275 int pdc_chassis_disp(unsigned long disp)
276 {
277  int retval = 0;
278  unsigned long flags;
279 
280  spin_lock_irqsave(&pdc_lock, flags);
281  retval = mem_pdc_call(PDC_CHASSIS, PDC_CHASSIS_DISP, disp);
282  spin_unlock_irqrestore(&pdc_lock, flags);
283 
284  return retval;
285 }
286 
291 int pdc_chassis_warn(unsigned long *warn)
292 {
293  int retval = 0;
294  unsigned long flags;
295 
296  spin_lock_irqsave(&pdc_lock, flags);
298  *warn = pdc_result[0];
299  spin_unlock_irqrestore(&pdc_lock, flags);
300 
301  return retval;
302 }
303 
305 {
306  int ret;
307 
309  convert_to_wide(pdc_result);
310  pdc_coproc_info->ccr_functional = pdc_result[0];
311  pdc_coproc_info->ccr_present = pdc_result[1];
312  pdc_coproc_info->revision = pdc_result[17];
313  pdc_coproc_info->model = pdc_result[18];
314 
315  return ret;
316 }
317 
325 int __cpuinit pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info)
326 {
327  int ret;
328  unsigned long flags;
329 
330  spin_lock_irqsave(&pdc_lock, flags);
331  ret = pdc_coproc_cfg_unlocked(pdc_coproc_info);
332  spin_unlock_irqrestore(&pdc_lock, flags);
333 
334  return ret;
335 }
336 
348 int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
349  void *iodc_data, unsigned int iodc_data_size)
350 {
351  int retval;
352  unsigned long flags;
353 
354  spin_lock_irqsave(&pdc_lock, flags);
356  index, __pa(pdc_result2), iodc_data_size);
357  convert_to_wide(pdc_result);
358  *actcnt = pdc_result[0];
359  memcpy(iodc_data, pdc_result2, iodc_data_size);
360  spin_unlock_irqrestore(&pdc_lock, flags);
361 
362  return retval;
363 }
365 
376  struct pdc_module_path *mod_path, long mod_index)
377 {
378  int retval;
379  unsigned long flags;
380 
381  spin_lock_irqsave(&pdc_lock, flags);
383  __pa(pdc_result2), mod_index);
384  convert_to_wide(pdc_result);
385  memcpy(pdc_mod_info, pdc_result, sizeof(*pdc_mod_info));
386  memcpy(mod_path, pdc_result2, sizeof(*mod_path));
387  spin_unlock_irqrestore(&pdc_lock, flags);
388 
389  pdc_mod_info->mod_addr = f_extend(pdc_mod_info->mod_addr);
390  return retval;
391 }
392 
403  long mod_index, long addr_index)
404 {
405  int retval;
406  unsigned long flags;
407 
408  spin_lock_irqsave(&pdc_lock, flags);
410  mod_index, addr_index);
411  convert_to_wide(pdc_result);
412  memcpy(pdc_addr_info, pdc_result, sizeof(*pdc_addr_info));
413  spin_unlock_irqrestore(&pdc_lock, flags);
414 
415  pdc_addr_info->mod_addr = f_extend(pdc_addr_info->mod_addr);
416  return retval;
417 }
418 
425 int pdc_model_info(struct pdc_model *model)
426 {
427  int retval;
428  unsigned long flags;
429 
430  spin_lock_irqsave(&pdc_lock, flags);
432  convert_to_wide(pdc_result);
433  memcpy(model, pdc_result, sizeof(*model));
434  spin_unlock_irqrestore(&pdc_lock, flags);
435 
436  return retval;
437 }
438 
448 {
449  int retval;
450  unsigned long flags;
451 
452  spin_lock_irqsave(&pdc_lock, flags);
454  OS_ID_HPUX, __pa(name));
455  convert_to_wide(pdc_result);
456 
457  if (retval == PDC_OK) {
458  name[pdc_result[0]] = '\0'; /* add trailing '\0' */
459  } else {
460  name[0] = 0;
461  }
462  spin_unlock_irqrestore(&pdc_lock, flags);
463 
464  return retval;
465 }
466 
477 int pdc_model_versions(unsigned long *versions, int id)
478 {
479  int retval;
480  unsigned long flags;
481 
482  spin_lock_irqsave(&pdc_lock, flags);
484  convert_to_wide(pdc_result);
485  *versions = pdc_result[0];
486  spin_unlock_irqrestore(&pdc_lock, flags);
487 
488  return retval;
489 }
490 
498 int pdc_model_cpuid(unsigned long *cpu_id)
499 {
500  int retval;
501  unsigned long flags;
502 
503  spin_lock_irqsave(&pdc_lock, flags);
504  pdc_result[0] = 0; /* preset zero (call may not be implemented!) */
506  convert_to_wide(pdc_result);
507  *cpu_id = pdc_result[0];
508  spin_unlock_irqrestore(&pdc_lock, flags);
509 
510  return retval;
511 }
512 
521 {
522  int retval;
523  unsigned long flags;
524 
525  spin_lock_irqsave(&pdc_lock, flags);
526  pdc_result[0] = 0; /* preset zero (call may not be implemented!) */
528  convert_to_wide(pdc_result);
529  if (retval == PDC_OK) {
530  *capabilities = pdc_result[0];
531  } else {
532  *capabilities = PDC_MODEL_OS32;
533  }
534  spin_unlock_irqrestore(&pdc_lock, flags);
535 
536  return retval;
537 }
538 
546 {
547  int retval;
548  unsigned long flags;
549 
550  spin_lock_irqsave(&pdc_lock, flags);
552  convert_to_wide(pdc_result);
553  memcpy(cache_info, pdc_result, sizeof(*cache_info));
554  spin_unlock_irqrestore(&pdc_lock, flags);
555 
556  return retval;
557 }
558 
565 int pdc_spaceid_bits(unsigned long *space_bits)
566 {
567  int retval;
568  unsigned long flags;
569 
570  spin_lock_irqsave(&pdc_lock, flags);
571  pdc_result[0] = 0;
573  convert_to_wide(pdc_result);
574  *space_bits = pdc_result[0];
575  spin_unlock_irqrestore(&pdc_lock, flags);
576 
577  return retval;
578 }
579 
580 #ifndef CONFIG_PA20
581 
587 int pdc_btlb_info(struct pdc_btlb_info *btlb)
588 {
589  int retval;
590  unsigned long flags;
591 
592  spin_lock_irqsave(&pdc_lock, flags);
594  memcpy(btlb, pdc_result, sizeof(*btlb));
595  spin_unlock_irqrestore(&pdc_lock, flags);
596 
597  if(retval < 0) {
598  btlb->max_size = 0;
599  }
600  return retval;
601 }
602 
616  struct pdc_module_path *mod_path)
617 {
618  int retval;
619  unsigned long flags;
620 
621  spin_lock_irqsave(&pdc_lock, flags);
622  memcpy(pdc_result2, mod_path, sizeof(*mod_path));
624  __pa(pdc_result2));
625  memcpy(address, pdc_result, sizeof(*address));
626  spin_unlock_irqrestore(&pdc_lock, flags);
627 
628  return retval;
629 }
630 #endif /* !CONFIG_PA20 */
631 
639 int pdc_lan_station_id(char *lan_addr, unsigned long hpa)
640 {
641  int retval;
642  unsigned long flags;
643 
644  spin_lock_irqsave(&pdc_lock, flags);
646  __pa(pdc_result), hpa);
647  if (retval < 0) {
648  /* FIXME: else read MAC from NVRAM */
649  memset(lan_addr, 0, PDC_LAN_STATION_ID_SIZE);
650  } else {
652  }
653  spin_unlock_irqrestore(&pdc_lock, flags);
654 
655  return retval;
656 }
658 
669 int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count)
670 {
671  int retval;
672  unsigned long flags;
673 
674  spin_lock_irqsave(&pdc_lock, flags);
675  retval = mem_pdc_call(PDC_STABLE, PDC_STABLE_READ, staddr,
676  __pa(pdc_result), count);
677  convert_to_wide(pdc_result);
678  memcpy(memaddr, pdc_result, count);
679  spin_unlock_irqrestore(&pdc_lock, flags);
680 
681  return retval;
682 }
684 
695 int pdc_stable_write(unsigned long staddr, void *memaddr, unsigned long count)
696 {
697  int retval;
698  unsigned long flags;
699 
700  spin_lock_irqsave(&pdc_lock, flags);
701  memcpy(pdc_result, memaddr, count);
702  convert_to_wide(pdc_result);
703  retval = mem_pdc_call(PDC_STABLE, PDC_STABLE_WRITE, staddr,
704  __pa(pdc_result), count);
705  spin_unlock_irqrestore(&pdc_lock, flags);
706 
707  return retval;
708 }
710 
720 int pdc_stable_get_size(unsigned long *size)
721 {
722  int retval;
723  unsigned long flags;
724 
725  spin_lock_irqsave(&pdc_lock, flags);
727  *size = pdc_result[0];
728  spin_unlock_irqrestore(&pdc_lock, flags);
729 
730  return retval;
731 }
733 
741 {
742  int retval;
743  unsigned long flags;
744 
745  spin_lock_irqsave(&pdc_lock, flags);
747  spin_unlock_irqrestore(&pdc_lock, flags);
748 
749  return retval;
750 }
752 
760 {
761  int retval;
762  unsigned long flags;
763 
764  spin_lock_irqsave(&pdc_lock, flags);
766  spin_unlock_irqrestore(&pdc_lock, flags);
767 
768  return retval;
769 }
771 
787 {
788  int retval;
789  unsigned long flags;
790 
791  spin_lock_irqsave(&pdc_lock, flags);
792 
793 /* BCJ-XXXX series boxes. E.G. "9000/785/C3000" */
794 #define IS_SPROCKETS() (strlen(boot_cpu_data.pdc.sys_model_name) == 14 && \
795  strncmp(boot_cpu_data.pdc.sys_model_name, "9000/785", 8) == 0)
796 
798  __pa(pdc_result), __pa(hwpath));
799  if (retval < PDC_OK)
800  goto out;
801 
802  if (pdc_result[0] < 16) {
803  initiator->host_id = pdc_result[0];
804  } else {
805  initiator->host_id = -1;
806  }
807 
808  /*
809  * Sprockets and Piranha return 20 or 40 (MT/s). Prelude returns
810  * 1, 2, 5 or 10 for 5, 10, 20 or 40 MT/s, respectively
811  */
812  switch (pdc_result[1]) {
813  case 1: initiator->factor = 50; break;
814  case 2: initiator->factor = 25; break;
815  case 5: initiator->factor = 12; break;
816  case 25: initiator->factor = 10; break;
817  case 20: initiator->factor = 12; break;
818  case 40: initiator->factor = 10; break;
819  default: initiator->factor = -1; break;
820  }
821 
822  if (IS_SPROCKETS()) {
823  initiator->width = pdc_result[4];
824  initiator->mode = pdc_result[5];
825  } else {
826  initiator->width = -1;
827  initiator->mode = -1;
828  }
829 
830  out:
831  spin_unlock_irqrestore(&pdc_lock, flags);
832 
833  return (retval >= PDC_OK);
834 }
836 
837 
847 int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa)
848 {
849  int retval;
850  unsigned long flags;
851 
852  spin_lock_irqsave(&pdc_lock, flags);
854  __pa(pdc_result), hpa);
855  convert_to_wide(pdc_result);
856  *num_entries = pdc_result[0];
857  spin_unlock_irqrestore(&pdc_lock, flags);
858 
859  return retval;
860 }
861 
871 int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl)
872 {
873  int retval;
874  unsigned long flags;
875 
876  BUG_ON((unsigned long)tbl & 0x7);
877 
878  spin_lock_irqsave(&pdc_lock, flags);
879  pdc_result[0] = num_entries;
881  __pa(pdc_result), hpa, __pa(tbl));
882  spin_unlock_irqrestore(&pdc_lock, flags);
883 
884  return retval;
885 }
886 
887 
888 #if 0 /* UNTEST CODE - left here in case someone needs it */
889 
897 unsigned int pdc_pci_config_read(void *hpa, unsigned long cfg_addr)
898 {
899  int retval;
900  unsigned long flags;
901 
902  spin_lock_irqsave(&pdc_lock, flags);
903  pdc_result[0] = 0;
904  pdc_result[1] = 0;
906  __pa(pdc_result), hpa, cfg_addr&~3UL, 4UL);
907  spin_unlock_irqrestore(&pdc_lock, flags);
908 
909  return retval ? ~0 : (unsigned int) pdc_result[0];
910 }
911 
912 
921 void pdc_pci_config_write(void *hpa, unsigned long cfg_addr, unsigned int val)
922 {
923  int retval;
924  unsigned long flags;
925 
926  spin_lock_irqsave(&pdc_lock, flags);
927  pdc_result[0] = 0;
929  __pa(pdc_result), hpa,
930  cfg_addr&~3UL, 4UL, (unsigned long) val);
931  spin_unlock_irqrestore(&pdc_lock, flags);
932 
933  return retval;
934 }
935 #endif /* UNTESTED CODE */
936 
944 {
945  int retval;
946  unsigned long flags;
947 
948  spin_lock_irqsave(&pdc_lock, flags);
950  convert_to_wide(pdc_result);
951  memcpy(tod, pdc_result, sizeof(*tod));
952  spin_unlock_irqrestore(&pdc_lock, flags);
953 
954  return retval;
955 }
957 
965 int pdc_tod_set(unsigned long sec, unsigned long usec)
966 {
967  int retval;
968  unsigned long flags;
969 
970  spin_lock_irqsave(&pdc_lock, flags);
971  retval = mem_pdc_call(PDC_TOD, PDC_TOD_WRITE, sec, usec);
972  spin_unlock_irqrestore(&pdc_lock, flags);
973 
974  return retval;
975 }
977 
978 #ifdef CONFIG_64BIT
979 int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
980  struct pdc_memory_table *tbl, unsigned long entries)
981 {
982  int retval;
983  unsigned long flags;
984 
985  spin_lock_irqsave(&pdc_lock, flags);
986  retval = mem_pdc_call(PDC_MEM, PDC_MEM_TABLE, __pa(pdc_result), __pa(pdc_result2), entries);
987  convert_to_wide(pdc_result);
988  memcpy(r_addr, pdc_result, sizeof(*r_addr));
989  memcpy(tbl, pdc_result2, entries * sizeof(*tbl));
990  spin_unlock_irqrestore(&pdc_lock, flags);
991 
992  return retval;
993 }
994 #endif /* CONFIG_64BIT */
995 
996 /* FIXME: Is this pdc used? I could not find type reference to ftc_bitmap
997  * so I guessed at unsigned long. Someone who knows what this does, can fix
998  * it later. :)
999  */
1000 int pdc_do_firm_test_reset(unsigned long ftc_bitmap)
1001 {
1002  int retval;
1003  unsigned long flags;
1004 
1005  spin_lock_irqsave(&pdc_lock, flags);
1007  PDC_FIRM_TEST_MAGIC, ftc_bitmap);
1008  spin_unlock_irqrestore(&pdc_lock, flags);
1009 
1010  return retval;
1011 }
1012 
1013 /*
1014  * pdc_do_reset - Reset the system.
1015  *
1016  * Reset the system.
1017  */
1018 int pdc_do_reset(void)
1019 {
1020  int retval;
1021  unsigned long flags;
1022 
1023  spin_lock_irqsave(&pdc_lock, flags);
1025  spin_unlock_irqrestore(&pdc_lock, flags);
1026 
1027  return retval;
1028 }
1029 
1030 /*
1031  * pdc_soft_power_info - Enable soft power switch.
1032  * @power_reg: address of soft power register
1033  *
1034  * Return the absolute address of the soft power switch register
1035  */
1036 int __init pdc_soft_power_info(unsigned long *power_reg)
1037 {
1038  int retval;
1039  unsigned long flags;
1040 
1041  *power_reg = (unsigned long) (-1);
1042 
1043  spin_lock_irqsave(&pdc_lock, flags);
1045  if (retval == PDC_OK) {
1046  convert_to_wide(pdc_result);
1047  *power_reg = f_extend(pdc_result[0]);
1048  }
1049  spin_unlock_irqrestore(&pdc_lock, flags);
1050 
1051  return retval;
1052 }
1053 
1054 /*
1055  * pdc_soft_power_button - Control the soft power button behaviour
1056  * @sw_control: 0 for hardware control, 1 for software control
1057  *
1058  *
1059  * This PDC function places the soft power button under software or
1060  * hardware control.
1061  * Under software control the OS may control to when to allow to shut
1062  * down the system. Under hardware control pressing the power button
1063  * powers off the system immediately.
1064  */
1065 int pdc_soft_power_button(int sw_control)
1066 {
1067  int retval;
1068  unsigned long flags;
1069 
1070  spin_lock_irqsave(&pdc_lock, flags);
1072  spin_unlock_irqrestore(&pdc_lock, flags);
1073 
1074  return retval;
1075 }
1076 
1077 /*
1078  * pdc_io_reset - Hack to avoid overlapping range registers of Bridges devices.
1079  * Primarily a problem on T600 (which parisc-linux doesn't support) but
1080  * who knows what other platform firmware might do with this OS "hook".
1081  */
1082 void pdc_io_reset(void)
1083 {
1084  unsigned long flags;
1085 
1086  spin_lock_irqsave(&pdc_lock, flags);
1088  spin_unlock_irqrestore(&pdc_lock, flags);
1089 }
1090 
1091 /*
1092  * pdc_io_reset_devices - Hack to Stop USB controller
1093  *
1094  * If PDC used the usb controller, the usb controller
1095  * is still running and will crash the machines during iommu
1096  * setup, because of still running DMA. This PDC call
1097  * stops the USB controller.
1098  * Normally called after calling pdc_io_reset().
1099  */
1101 {
1102  unsigned long flags;
1103 
1104  spin_lock_irqsave(&pdc_lock, flags);
1106  spin_unlock_irqrestore(&pdc_lock, flags);
1107 }
1108 
1109 /* locked by pdc_console_lock */
1110 static int __attribute__((aligned(8))) iodc_retbuf[32];
1111 static char __attribute__((aligned(64))) iodc_dbuf[4096];
1112 
1123 int pdc_iodc_print(const unsigned char *str, unsigned count)
1124 {
1125  unsigned int i;
1126  unsigned long flags;
1127 
1128  for (i = 0; i < count;) {
1129  switch(str[i]) {
1130  case '\n':
1131  iodc_dbuf[i+0] = '\r';
1132  iodc_dbuf[i+1] = '\n';
1133  i += 2;
1134  goto print;
1135  default:
1136  iodc_dbuf[i] = str[i];
1137  i++;
1138  break;
1139  }
1140  }
1141 
1142 print:
1143  spin_lock_irqsave(&pdc_lock, flags);
1144  real32_call(PAGE0->mem_cons.iodc_io,
1145  (unsigned long)PAGE0->mem_cons.hpa, ENTRY_IO_COUT,
1146  PAGE0->mem_cons.spa, __pa(PAGE0->mem_cons.dp.layers),
1147  __pa(iodc_retbuf), 0, __pa(iodc_dbuf), i, 0);
1148  spin_unlock_irqrestore(&pdc_lock, flags);
1149 
1150  return i;
1151 }
1152 
1159 int pdc_iodc_getc(void)
1160 {
1161  int ch;
1162  int status;
1163  unsigned long flags;
1164 
1165  /* Bail if no console input device. */
1166  if (!PAGE0->mem_kbd.iodc_io)
1167  return 0;
1168 
1169  /* wait for a keyboard (rs232)-input */
1170  spin_lock_irqsave(&pdc_lock, flags);
1171  real32_call(PAGE0->mem_kbd.iodc_io,
1172  (unsigned long)PAGE0->mem_kbd.hpa, ENTRY_IO_CIN,
1173  PAGE0->mem_kbd.spa, __pa(PAGE0->mem_kbd.dp.layers),
1174  __pa(iodc_retbuf), 0, __pa(iodc_dbuf), 1, 0);
1175 
1176  ch = *iodc_dbuf;
1177  status = *iodc_retbuf;
1178  spin_unlock_irqrestore(&pdc_lock, flags);
1179 
1180  if (status == 0)
1181  return -1;
1182 
1183  return ch;
1184 }
1185 
1186 int pdc_sti_call(unsigned long func, unsigned long flags,
1187  unsigned long inptr, unsigned long outputr,
1188  unsigned long glob_cfg)
1189 {
1190  int retval;
1191  unsigned long irqflags;
1192 
1193  spin_lock_irqsave(&pdc_lock, irqflags);
1194  retval = real32_call(func, flags, inptr, outputr, glob_cfg);
1195  spin_unlock_irqrestore(&pdc_lock, irqflags);
1196 
1197  return retval;
1198 }
1200 
1201 #ifdef CONFIG_64BIT
1202 
1209 int pdc_pat_cell_get_number(struct pdc_pat_cell_num *cell_info)
1210 {
1211  int retval;
1212  unsigned long flags;
1213 
1214  spin_lock_irqsave(&pdc_lock, flags);
1215  retval = mem_pdc_call(PDC_PAT_CELL, PDC_PAT_CELL_GET_NUMBER, __pa(pdc_result));
1216  memcpy(cell_info, pdc_result, sizeof(*cell_info));
1217  spin_unlock_irqrestore(&pdc_lock, flags);
1218 
1219  return retval;
1220 }
1221 
1233 int pdc_pat_cell_module(unsigned long *actcnt, unsigned long ploc, unsigned long mod,
1234  unsigned long view_type, void *mem_addr)
1235 {
1236  int retval;
1237  unsigned long flags;
1239 
1240  spin_lock_irqsave(&pdc_lock, flags);
1241  retval = mem_pdc_call(PDC_PAT_CELL, PDC_PAT_CELL_MODULE, __pa(pdc_result),
1242  ploc, mod, view_type, __pa(&result));
1243  if(!retval) {
1244  *actcnt = pdc_result[0];
1245  memcpy(mem_addr, &result, *actcnt);
1246  }
1247  spin_unlock_irqrestore(&pdc_lock, flags);
1248 
1249  return retval;
1250 }
1251 
1259 int pdc_pat_cpu_get_number(struct pdc_pat_cpu_num *cpu_info, void *hpa)
1260 {
1261  int retval;
1262  unsigned long flags;
1263 
1264  spin_lock_irqsave(&pdc_lock, flags);
1266  __pa(&pdc_result), hpa);
1267  memcpy(cpu_info, pdc_result, sizeof(*cpu_info));
1268  spin_unlock_irqrestore(&pdc_lock, flags);
1269 
1270  return retval;
1271 }
1272 
1281 int pdc_pat_get_irt_size(unsigned long *num_entries, unsigned long cell_num)
1282 {
1283  int retval;
1284  unsigned long flags;
1285 
1286  spin_lock_irqsave(&pdc_lock, flags);
1288  __pa(pdc_result), cell_num);
1289  *num_entries = pdc_result[0];
1290  spin_unlock_irqrestore(&pdc_lock, flags);
1291 
1292  return retval;
1293 }
1294 
1302 int pdc_pat_get_irt(void *r_addr, unsigned long cell_num)
1303 {
1304  int retval;
1305  unsigned long flags;
1306 
1307  spin_lock_irqsave(&pdc_lock, flags);
1309  __pa(r_addr), cell_num);
1310  spin_unlock_irqrestore(&pdc_lock, flags);
1311 
1312  return retval;
1313 }
1314 
1323 int pdc_pat_pd_get_addr_map(unsigned long *actual_len, void *mem_addr,
1324  unsigned long count, unsigned long offset)
1325 {
1326  int retval;
1327  unsigned long flags;
1328 
1329  spin_lock_irqsave(&pdc_lock, flags);
1330  retval = mem_pdc_call(PDC_PAT_PD, PDC_PAT_PD_GET_ADDR_MAP, __pa(pdc_result),
1331  __pa(pdc_result2), count, offset);
1332  *actual_len = pdc_result[0];
1333  memcpy(mem_addr, pdc_result2, *actual_len);
1334  spin_unlock_irqrestore(&pdc_lock, flags);
1335 
1336  return retval;
1337 }
1338 
1346 int pdc_pat_io_pci_cfg_read(unsigned long pci_addr, int pci_size, u32 *mem_addr)
1347 {
1348  int retval;
1349  unsigned long flags;
1350 
1351  spin_lock_irqsave(&pdc_lock, flags);
1353  __pa(pdc_result), pci_addr, pci_size);
1354  switch(pci_size) {
1355  case 1: *(u8 *) mem_addr = (u8) pdc_result[0];
1356  case 2: *(u16 *)mem_addr = (u16) pdc_result[0];
1357  case 4: *(u32 *)mem_addr = (u32) pdc_result[0];
1358  }
1359  spin_unlock_irqrestore(&pdc_lock, flags);
1360 
1361  return retval;
1362 }
1363 
1372 int pdc_pat_io_pci_cfg_write(unsigned long pci_addr, int pci_size, u32 val)
1373 {
1374  int retval;
1375  unsigned long flags;
1376 
1377  spin_lock_irqsave(&pdc_lock, flags);
1379  pci_addr, pci_size, val);
1380  spin_unlock_irqrestore(&pdc_lock, flags);
1381 
1382  return retval;
1383 }
1384 #endif /* CONFIG_64BIT */
1385 
1386 
1387 /***************** 32-bit real-mode calls ***********/
1388 /* The struct below is used
1389  * to overlay real_stack (real2.S), preparing a 32-bit call frame.
1390  * real32_call_asm() then uses this stack in narrow real mode
1391  */
1392 
1394  /* use int, not long which is 64 bits */
1395  unsigned int arg13;
1396  unsigned int arg12;
1397  unsigned int arg11;
1398  unsigned int arg10;
1399  unsigned int arg9;
1400  unsigned int arg8;
1401  unsigned int arg7;
1402  unsigned int arg6;
1403  unsigned int arg5;
1404  unsigned int arg4;
1405  unsigned int arg3;
1406  unsigned int arg2;
1407  unsigned int arg1;
1408  unsigned int arg0;
1409  unsigned int frame_marker[8];
1410  unsigned int sp;
1411  /* in reality, there's nearly 8k of stack after this */
1412 };
1413 
1414 long real32_call(unsigned long fn, ...)
1415 {
1416  va_list args;
1417  extern struct narrow_stack real_stack;
1418  extern unsigned long real32_call_asm(unsigned int *,
1419  unsigned int *,
1420  unsigned int);
1421 
1422  va_start(args, fn);
1423  real_stack.arg0 = va_arg(args, unsigned int);
1424  real_stack.arg1 = va_arg(args, unsigned int);
1425  real_stack.arg2 = va_arg(args, unsigned int);
1426  real_stack.arg3 = va_arg(args, unsigned int);
1427  real_stack.arg4 = va_arg(args, unsigned int);
1428  real_stack.arg5 = va_arg(args, unsigned int);
1429  real_stack.arg6 = va_arg(args, unsigned int);
1430  real_stack.arg7 = va_arg(args, unsigned int);
1431  real_stack.arg8 = va_arg(args, unsigned int);
1432  real_stack.arg9 = va_arg(args, unsigned int);
1433  real_stack.arg10 = va_arg(args, unsigned int);
1434  real_stack.arg11 = va_arg(args, unsigned int);
1435  real_stack.arg12 = va_arg(args, unsigned int);
1436  real_stack.arg13 = va_arg(args, unsigned int);
1437  va_end(args);
1438 
1439  return real32_call_asm(&real_stack.sp, &real_stack.arg0, fn);
1440 }
1441 
1442 #ifdef CONFIG_64BIT
1443 /***************** 64-bit real-mode calls ***********/
1444 
1445 struct wide_stack {
1446  unsigned long arg0;
1447  unsigned long arg1;
1448  unsigned long arg2;
1449  unsigned long arg3;
1450  unsigned long arg4;
1451  unsigned long arg5;
1452  unsigned long arg6;
1453  unsigned long arg7;
1454  unsigned long arg8;
1455  unsigned long arg9;
1456  unsigned long arg10;
1457  unsigned long arg11;
1458  unsigned long arg12;
1459  unsigned long arg13;
1460  unsigned long frame_marker[2]; /* rp, previous sp */
1461  unsigned long sp;
1462  /* in reality, there's nearly 8k of stack after this */
1463 };
1464 
1465 long real64_call(unsigned long fn, ...)
1466 {
1467  va_list args;
1468  extern struct wide_stack real64_stack;
1469  extern unsigned long real64_call_asm(unsigned long *,
1470  unsigned long *,
1471  unsigned long);
1472 
1473  va_start(args, fn);
1474  real64_stack.arg0 = va_arg(args, unsigned long);
1475  real64_stack.arg1 = va_arg(args, unsigned long);
1476  real64_stack.arg2 = va_arg(args, unsigned long);
1477  real64_stack.arg3 = va_arg(args, unsigned long);
1478  real64_stack.arg4 = va_arg(args, unsigned long);
1479  real64_stack.arg5 = va_arg(args, unsigned long);
1480  real64_stack.arg6 = va_arg(args, unsigned long);
1481  real64_stack.arg7 = va_arg(args, unsigned long);
1482  real64_stack.arg8 = va_arg(args, unsigned long);
1483  real64_stack.arg9 = va_arg(args, unsigned long);
1484  real64_stack.arg10 = va_arg(args, unsigned long);
1485  real64_stack.arg11 = va_arg(args, unsigned long);
1486  real64_stack.arg12 = va_arg(args, unsigned long);
1487  real64_stack.arg13 = va_arg(args, unsigned long);
1488  va_end(args);
1489 
1490  return real64_call_asm(&real64_stack.sp, &real64_stack.arg0, fn);
1491 }
1492 
1493 #endif /* CONFIG_64BIT */
1494