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Linux Kernel
3.7.1
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Linux Kernel
3.7.1
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#include <mach/hardware.h>Go to the source code of this file.
Macros | |
| #define | POCR __REG(0x40500000) /* PCM Out Control Register */ |
| #define | POCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */ |
| #define | POCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ |
| #define | PICR __REG(0x40500004) /* PCM In Control Register */ |
| #define | PICR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */ |
| #define | PICR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ |
| #define | MCCR __REG(0x40500008) /* Mic In Control Register */ |
| #define | MCCR_FEIE (1 << 3) /* FIFO Error Interrupt Enable */ |
| #define | MCCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ |
| #define | GCR __REG(0x4050000C) /* Global Control Register */ |
| #define | GCR_nDMAEN (1 << 24) /* non DMA Enable */ |
| #define | GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */ |
| #define | GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */ |
| #define | GCR_SECRDY_IEN (1 << 9) /* Secondary Ready Interrupt Enable */ |
| #define | GCR_PRIRDY_IEN (1 << 8) /* Primary Ready Interrupt Enable */ |
| #define | GCR_SECRES_IEN (1 << 5) /* Secondary Resume Interrupt Enable */ |
| #define | GCR_PRIRES_IEN (1 << 4) /* Primary Resume Interrupt Enable */ |
| #define | GCR_ACLINK_OFF (1 << 3) /* AC-link Shut Off */ |
| #define | GCR_WARM_RST (1 << 2) /* AC97 Warm Reset */ |
| #define | GCR_COLD_RST (1 << 1) /* AC'97 Cold Reset (0 = active) */ |
| #define | GCR_GIE (1 << 0) /* Codec GPI Interrupt Enable */ |
| #define | POSR __REG(0x40500010) /* PCM Out Status Register */ |
| #define | POSR_FIFOE (1 << 4) /* FIFO error */ |
| #define | POSR_FSR (1 << 2) /* FIFO Service Request */ |
| #define | PISR __REG(0x40500014) /* PCM In Status Register */ |
| #define | PISR_FIFOE (1 << 4) /* FIFO error */ |
| #define | PISR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */ |
| #define | PISR_FSR (1 << 2) /* FIFO Service Request */ |
| #define | MCSR __REG(0x40500018) /* Mic In Status Register */ |
| #define | MCSR_FIFOE (1 << 4) /* FIFO error */ |
| #define | MCSR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */ |
| #define | MCSR_FSR (1 << 2) /* FIFO Service Request */ |
| #define | GSR __REG(0x4050001C) /* Global Status Register */ |
| #define | GSR_CDONE (1 << 19) /* Command Done */ |
| #define | GSR_SDONE (1 << 18) /* Status Done */ |
| #define | GSR_RDCS (1 << 15) /* Read Completion Status */ |
| #define | GSR_BIT3SLT12 (1 << 14) /* Bit 3 of slot 12 */ |
| #define | GSR_BIT2SLT12 (1 << 13) /* Bit 2 of slot 12 */ |
| #define | GSR_BIT1SLT12 (1 << 12) /* Bit 1 of slot 12 */ |
| #define | GSR_SECRES (1 << 11) /* Secondary Resume Interrupt */ |
| #define | GSR_PRIRES (1 << 10) /* Primary Resume Interrupt */ |
| #define | GSR_SCR (1 << 9) /* Secondary Codec Ready */ |
| #define | GSR_PCR (1 << 8) /* Primary Codec Ready */ |
| #define | GSR_MCINT (1 << 7) /* Mic In Interrupt */ |
| #define | GSR_POINT (1 << 6) /* PCM Out Interrupt */ |
| #define | GSR_PIINT (1 << 5) /* PCM In Interrupt */ |
| #define | GSR_ACOFFD (1 << 3) /* AC-link Shut Off Done */ |
| #define | GSR_MOINT (1 << 2) /* Modem Out Interrupt */ |
| #define | GSR_MIINT (1 << 1) /* Modem In Interrupt */ |
| #define | GSR_GSCI (1 << 0) /* Codec GPI Status Change Interrupt */ |
| #define | CAR __REG(0x40500020) /* CODEC Access Register */ |
| #define | CAR_CAIP (1 << 0) /* Codec Access In Progress */ |
| #define | PCDR __REG(0x40500040) /* PCM FIFO Data Register */ |
| #define | MCDR __REG(0x40500060) /* Mic-in FIFO Data Register */ |
| #define | MOCR __REG(0x40500100) /* Modem Out Control Register */ |
| #define | MOCR_FEIE (1 << 3) /* FIFO Error */ |
| #define | MOCR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ |
| #define | MICR __REG(0x40500108) /* Modem In Control Register */ |
| #define | MICR_FEIE (1 << 3) /* FIFO Error */ |
| #define | MICR_FSRIE (1 << 1) /* FIFO Service Request Interrupt Enable */ |
| #define | MOSR __REG(0x40500110) /* Modem Out Status Register */ |
| #define | MOSR_FIFOE (1 << 4) /* FIFO error */ |
| #define | MOSR_FSR (1 << 2) /* FIFO Service Request */ |
| #define | MISR __REG(0x40500118) /* Modem In Status Register */ |
| #define | MISR_FIFOE (1 << 4) /* FIFO error */ |
| #define | MISR_EOC (1 << 3) /* DMA End-of-Chain (exclusive clear) */ |
| #define | MISR_FSR (1 << 2) /* FIFO Service Request */ |
| #define | MODR __REG(0x40500140) /* Modem FIFO Data Register */ |
| #define | PAC_REG_BASE __REG(0x40500200) /* Primary Audio Codec */ |
| #define | SAC_REG_BASE __REG(0x40500300) /* Secondary Audio Codec */ |
| #define | PMC_REG_BASE __REG(0x40500400) /* Primary Modem Codec */ |
| #define | SMC_REG_BASE __REG(0x40500500) /* Secondary Modem Codec */ |
| #define CAR __REG(0x40500020) /* CODEC Access Register */ |
Definition at line 71 of file regs-ac97.h.
| #define CAR_CAIP (1 << 0) /* Codec Access In Progress */ |
Definition at line 72 of file regs-ac97.h.
| #define GCR __REG(0x4050000C) /* Global Control Register */ |
Definition at line 22 of file regs-ac97.h.
Definition at line 33 of file regs-ac97.h.
| #define GCR_CDONE_IE (1 << 19) /* Command Done Interrupt Enable */ |
Definition at line 27 of file regs-ac97.h.
Definition at line 35 of file regs-ac97.h.
| #define GCR_GIE (1 << 0) /* Codec GPI Interrupt Enable */ |
Definition at line 36 of file regs-ac97.h.
| #define GCR_nDMAEN (1 << 24) /* non DMA Enable */ |
Definition at line 26 of file regs-ac97.h.
| #define GCR_PRIRDY_IEN (1 << 8) /* Primary Ready Interrupt Enable */ |
Definition at line 30 of file regs-ac97.h.
| #define GCR_PRIRES_IEN (1 << 4) /* Primary Resume Interrupt Enable */ |
Definition at line 32 of file regs-ac97.h.
| #define GCR_SDONE_IE (1 << 18) /* Status Done Interrupt Enable */ |
Definition at line 28 of file regs-ac97.h.
| #define GCR_SECRDY_IEN (1 << 9) /* Secondary Ready Interrupt Enable */ |
Definition at line 29 of file regs-ac97.h.
| #define GCR_SECRES_IEN (1 << 5) /* Secondary Resume Interrupt Enable */ |
Definition at line 31 of file regs-ac97.h.
| #define GCR_WARM_RST (1 << 2) /* AC97 Warm Reset */ |
Definition at line 34 of file regs-ac97.h.
| #define GSR __REG(0x4050001C) /* Global Status Register */ |
Definition at line 52 of file regs-ac97.h.
Definition at line 66 of file regs-ac97.h.
Definition at line 58 of file regs-ac97.h.
Definition at line 57 of file regs-ac97.h.
Definition at line 56 of file regs-ac97.h.
| #define GSR_CDONE (1 << 19) /* Command Done */ |
Definition at line 53 of file regs-ac97.h.
Definition at line 69 of file regs-ac97.h.
| #define GSR_MCINT (1 << 7) /* Mic In Interrupt */ |
Definition at line 63 of file regs-ac97.h.
| #define GSR_MIINT (1 << 1) /* Modem In Interrupt */ |
Definition at line 68 of file regs-ac97.h.
| #define GSR_MOINT (1 << 2) /* Modem Out Interrupt */ |
Definition at line 67 of file regs-ac97.h.
| #define GSR_PCR (1 << 8) /* Primary Codec Ready */ |
Definition at line 62 of file regs-ac97.h.
| #define GSR_PIINT (1 << 5) /* PCM In Interrupt */ |
Definition at line 65 of file regs-ac97.h.
| #define GSR_POINT (1 << 6) /* PCM Out Interrupt */ |
Definition at line 64 of file regs-ac97.h.
| #define GSR_PRIRES (1 << 10) /* Primary Resume Interrupt */ |
Definition at line 60 of file regs-ac97.h.
Definition at line 55 of file regs-ac97.h.
| #define GSR_SCR (1 << 9) /* Secondary Codec Ready */ |
Definition at line 61 of file regs-ac97.h.
| #define GSR_SDONE (1 << 18) /* Status Done */ |
Definition at line 54 of file regs-ac97.h.
| #define GSR_SECRES (1 << 11) /* Secondary Resume Interrupt */ |
Definition at line 59 of file regs-ac97.h.
| #define MCCR __REG(0x40500008) /* Mic In Control Register */ |
Definition at line 18 of file regs-ac97.h.
Definition at line 19 of file regs-ac97.h.
Definition at line 20 of file regs-ac97.h.
| #define MCDR __REG(0x40500060) /* Mic-in FIFO Data Register */ |
Definition at line 75 of file regs-ac97.h.
| #define MCSR __REG(0x40500018) /* Mic In Status Register */ |
Definition at line 47 of file regs-ac97.h.
Definition at line 49 of file regs-ac97.h.
Definition at line 48 of file regs-ac97.h.
Definition at line 50 of file regs-ac97.h.
| #define MICR __REG(0x40500108) /* Modem In Control Register */ |
Definition at line 81 of file regs-ac97.h.
Definition at line 82 of file regs-ac97.h.
Definition at line 83 of file regs-ac97.h.
| #define MISR __REG(0x40500118) /* Modem In Status Register */ |
Definition at line 89 of file regs-ac97.h.
Definition at line 91 of file regs-ac97.h.
Definition at line 90 of file regs-ac97.h.
Definition at line 92 of file regs-ac97.h.
| #define MOCR __REG(0x40500100) /* Modem Out Control Register */ |
Definition at line 77 of file regs-ac97.h.
Definition at line 78 of file regs-ac97.h.
Definition at line 79 of file regs-ac97.h.
| #define MODR __REG(0x40500140) /* Modem FIFO Data Register */ |
Definition at line 94 of file regs-ac97.h.
| #define MOSR __REG(0x40500110) /* Modem Out Status Register */ |
Definition at line 85 of file regs-ac97.h.
Definition at line 86 of file regs-ac97.h.
Definition at line 87 of file regs-ac97.h.
| #define PAC_REG_BASE __REG(0x40500200) /* Primary Audio Codec */ |
Definition at line 96 of file regs-ac97.h.
| #define PCDR __REG(0x40500040) /* PCM FIFO Data Register */ |
Definition at line 74 of file regs-ac97.h.
| #define PICR __REG(0x40500004) /* PCM In Control Register */ |
Definition at line 14 of file regs-ac97.h.
Definition at line 15 of file regs-ac97.h.
Definition at line 16 of file regs-ac97.h.
| #define PISR __REG(0x40500014) /* PCM In Status Register */ |
Definition at line 42 of file regs-ac97.h.
Definition at line 44 of file regs-ac97.h.
Definition at line 43 of file regs-ac97.h.
Definition at line 45 of file regs-ac97.h.
| #define PMC_REG_BASE __REG(0x40500400) /* Primary Modem Codec */ |
Definition at line 98 of file regs-ac97.h.
| #define POCR __REG(0x40500000) /* PCM Out Control Register */ |
Definition at line 10 of file regs-ac97.h.
Definition at line 11 of file regs-ac97.h.
Definition at line 12 of file regs-ac97.h.
| #define POSR __REG(0x40500010) /* PCM Out Status Register */ |
Definition at line 38 of file regs-ac97.h.
Definition at line 39 of file regs-ac97.h.
Definition at line 40 of file regs-ac97.h.
| #define SAC_REG_BASE __REG(0x40500300) /* Secondary Audio Codec */ |
Definition at line 97 of file regs-ac97.h.
| #define SMC_REG_BASE __REG(0x40500500) /* Secondary Modem Codec */ |
Definition at line 99 of file regs-ac97.h.
1.8.2