Linux Kernel
3.7.1
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#include <linux/module.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/list.h>
#include <linux/ioport.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <asm/cache.h>
#include <asm/byteorder.h>
#include <asm/uaccess.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/string.h>
#include <linux/if_arp.h>
#include <linux/netdevice.h>
#include <linux/skbuff.h>
#include <linux/delay.h>
#include <linux/hdlc.h>
#include <linux/mutex.h>
Go to the source code of this file.
Data Structures | |
struct | thingie |
struct | TxFD |
struct | RxFD |
struct | dscc4_pci_priv |
struct | dscc4_dev_priv |
Macros | |
#define | pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
#define | DRV_NAME "dscc4" |
#define | DUMMY_SKB_SIZE 64 |
#define | TX_LOW 8 |
#define | TX_RING_SIZE 32 |
#define | RX_RING_SIZE 32 |
#define | TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct TxFD) |
#define | RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct RxFD) |
#define | IRQ_RING_SIZE 64 /* Keep it a multiple of 32 */ |
#define | TX_TIMEOUT (HZ/10) |
#define | DSCC4_HZ_MAX 33000000 |
#define | BRR_DIVIDER_MAX 64*0x00004000 /* Cf errata DS5 p.10 */ |
#define | dev_per_card 4 |
#define | SCC_REGISTERS_MAX 23 /* Cf errata DS5 p.4 */ |
#define | SOURCE_ID(flags) (((flags) >> 28) & 0x03) |
#define | TO_SIZE(state) (((state) >> 16) & 0x1fff) |
#define | TO_STATE_TX(len) cpu_to_le32(((len) & TxSizeMax) << 16) |
#define | TO_STATE_RX(len) cpu_to_le32((RX_MAX(len) % RxSizeMax) << 16) |
#define | RX_MAX(len) ((((len) >> 5) + 1) << 5) /* Cf RLCR */ |
#define | SCC_REG_START(dpriv) (SCC_START+(dpriv->dev_id)*SCC_OFFSET) |
#define | GCMDR 0x00 |
#define | GSTAR 0x04 |
#define | GMODE 0x08 |
#define | IQLENR0 0x0C |
#define | IQLENR1 0x10 |
#define | IQRX0 0x14 |
#define | IQTX0 0x24 |
#define | IQCFG 0x3c |
#define | FIFOCR1 0x44 |
#define | FIFOCR2 0x48 |
#define | FIFOCR3 0x4c |
#define | FIFOCR4 0x34 |
#define | CH0CFG 0x50 |
#define | CH0BRDA 0x54 |
#define | CH0BTDA 0x58 |
#define | CH0FRDA 0x98 |
#define | CH0FTDA 0xb0 |
#define | CH0LRDA 0xc8 |
#define | CH0LTDA 0xe0 |
#define | SCC_START 0x0100 |
#define | SCC_OFFSET 0x80 |
#define | CMDR 0x00 |
#define | STAR 0x04 |
#define | CCR0 0x08 |
#define | CCR1 0x0c |
#define | CCR2 0x10 |
#define | BRR 0x2C |
#define | RLCR 0x40 |
#define | IMR 0x54 |
#define | ISR 0x58 |
#define | GPDIR 0x0400 |
#define | GPDATA 0x0404 |
#define | GPIM 0x0408 |
#define | EncodingMask 0x00700000 |
#define | CrcMask 0x00000003 |
#define | IntRxScc0 0x10000000 |
#define | IntTxScc0 0x01000000 |
#define | TxPollCmd 0x00000400 |
#define | RxActivate 0x08000000 |
#define | MTFi 0x04000000 |
#define | Rdr 0x00400000 |
#define | Rdt 0x00200000 |
#define | Idr 0x00100000 |
#define | Idt 0x00080000 |
#define | TxSccRes 0x01000000 |
#define | RxSccRes 0x00010000 |
#define | TxSizeMax 0x1fff /* Datasheet DS1 - 11.1.1.1 */ |
#define | RxSizeMax 0x1ffc /* Datasheet DS1 - 11.1.2.1 */ |
#define | Ccr0ClockMask 0x0000003f |
#define | Ccr1LoopMask 0x00000200 |
#define | IsrMask 0x000fffff |
#define | BrrExpMask 0x00000f00 |
#define | BrrMultMask 0x0000003f |
#define | EncodingMask 0x00700000 |
#define | Hold cpu_to_le32(0x40000000) |
#define | SccBusy 0x10000000 |
#define | PowerUp 0x80000000 |
#define | Vis 0x00001000 |
#define | FrameOk (FrameVfr | FrameCrc) |
#define | FrameVfr 0x80 |
#define | FrameRdo 0x40 |
#define | FrameCrc 0x20 |
#define | FrameRab 0x10 |
#define | FrameAborted cpu_to_le32(0x00000200) |
#define | FrameEnd cpu_to_le32(0x80000000) |
#define | DataComplete cpu_to_le32(0x40000000) |
#define | LengthCheck 0x00008000 |
#define | SccEvt 0x02000000 |
#define | NoAck 0x00000200 |
#define | Action 0x00000001 |
#define | HiDesc cpu_to_le32(0x20000000) |
#define | RxEvt 0xf0000000 |
#define | TxEvt 0x0f000000 |
#define | Alls 0x00040000 |
#define | Xdu 0x00010000 |
#define | Cts 0x00004000 |
#define | Xmr 0x00002000 |
#define | Xpr 0x00001000 |
#define | Rdo 0x00000080 |
#define | Rfs 0x00000040 |
#define | Cd 0x00000004 |
#define | Rfo 0x00000002 |
#define | Flex 0x00000001 |
#define | Cfg 0x00200000 |
#define | Hi 0x00040000 |
#define | Fi 0x00020000 |
#define | Err 0x00010000 |
#define | Arf 0x00000002 |
#define | ArAck 0x00000001 |
#define | Ready 0x00000000 |
#define | NeedIDR 0x00000001 |
#define | NeedIDT 0x00000002 |
#define | RdoSet 0x00000004 |
#define | FakeReset 0x00000008 |
#define | EventsMask 0xfffa8f7a |
#define | dscc4_pci_reset(pdev, ioaddr) do {} while (0) |
Functions | |
MODULE_AUTHOR ("Maintainer: Francois Romieu <[email protected]>") | |
MODULE_DESCRIPTION ("Siemens PEB20534 PCI Controller") | |
MODULE_LICENSE ("GPL") | |
module_param (debug, int, 0) | |
MODULE_PARM_DESC (debug,"Enable/disable extra messages") | |
module_param (quartz, int, 0) | |
MODULE_PARM_DESC (quartz,"If present, on-board quartz frequency (Hz)") | |
__setup ("dscc4.setup=", dscc4_setup) | |
MODULE_DEVICE_TABLE (pci, dscc4_pci_tbl) | |
module_pci_driver (dscc4_driver) | |
#define BRR_DIVIDER_MAX 64*0x00004000 /* Cf errata DS5 p.10 */ |
#define DataComplete cpu_to_le32(0x40000000) |
#define FrameAborted cpu_to_le32(0x00000200) |
#define FrameEnd cpu_to_le32(0x80000000) |
#define HiDesc cpu_to_le32(0x20000000) |
#define Hold cpu_to_le32(0x40000000) |
#define SCC_REG_START | ( | dpriv | ) | (SCC_START+(dpriv->dev_id)*SCC_OFFSET) |
#define TO_STATE_RX | ( | len | ) | cpu_to_le32((RX_MAX(len) % RxSizeMax) << 16) |
#define TO_STATE_TX | ( | len | ) | cpu_to_le32(((len) & TxSizeMax) << 16) |
__setup | ( | ) |
MODULE_AUTHOR | ( | "Maintainer: Francois Romieu <[email protected]>" | ) |
MODULE_DESCRIPTION | ( | "Siemens PEB20534 PCI Controller" | ) |
MODULE_DEVICE_TABLE | ( | pci | , |
dscc4_pci_tbl | |||
) |
MODULE_LICENSE | ( | "GPL" | ) |
module_param | ( | quartz | , |
int | , | ||
0 | |||
) |
module_pci_driver | ( | dscc4_driver | ) |