Data Structures
struct	at91_ep

struct	at91_udc

struct	at91_request

Macros
#define	AT91_UDP_FRM_NUM 0x00 /* Frame Number Register */

#define	AT91_UDP_NUM (0x7ff << 0) /* Frame Number */

#define	AT91_UDP_FRM_ERR (1 << 16) /* Frame Error */

#define	AT91_UDP_FRM_OK (1 << 17) /* Frame OK */

#define	AT91_UDP_GLB_STAT 0x04 /* Global State Register */

#define	AT91_UDP_FADDEN (1 << 0) /* Function Address Enable */

#define	AT91_UDP_CONFG (1 << 1) /* Configured */

#define	AT91_UDP_ESR (1 << 2) /* Enable Send Resume */

#define	AT91_UDP_RSMINPR (1 << 3) /* Resume has been sent */

#define	AT91_UDP_RMWUPE (1 << 4) /* Remote Wake Up Enable */

#define	AT91_UDP_FADDR 0x08 /* Function Address Register */

#define	AT91_UDP_FADD (0x7f << 0) /* Function Address Value */

#define	AT91_UDP_FEN (1 << 8) /* Function Enable */

#define	AT91_UDP_IER 0x10 /* Interrupt Enable Register */

#define	AT91_UDP_IDR 0x14 /* Interrupt Disable Register */

#define	AT91_UDP_IMR 0x18 /* Interrupt Mask Register */

#define	AT91_UDP_ISR 0x1c /* Interrupt Status Register */

#define	AT91_UDP_EP(n) (1 << (n)) /* Endpoint Interrupt Status */

#define	AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */

#define	AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */

#define	AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status [AT91RM9200 only] */

#define	AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */

#define	AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrupt Status */

#define	AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status [AT91RM9200 only] */

#define	AT91_UDP_ICR 0x20 /* Interrupt Clear Register */

#define	AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */

#define	AT91_UDP_CSR(n) (0x30+((n)4)) / Endpoint Control/Status Registers 0-7 */

#define	AT91_UDP_TXCOMP (1 << 0) /* Generates IN packet with data previously written in DPR */

#define	AT91_UDP_RX_DATA_BK0 (1 << 1) /* Receive Data Bank 0 */

#define	AT91_UDP_RXSETUP (1 << 2) /* Send STALL to the host */

#define	AT91_UDP_STALLSENT (1 << 3) /* Stall Sent / Isochronous error (Isochronous endpoints) */

#define	AT91_UDP_TXPKTRDY (1 << 4) /* Transmit Packet Ready */

#define	AT91_UDP_FORCESTALL (1 << 5) /* Force Stall */

#define	AT91_UDP_RX_DATA_BK1 (1 << 6) /* Receive Data Bank 1 */

#define	AT91_UDP_DIR (1 << 7) /* Transfer Direction */

#define	AT91_UDP_EPTYPE (7 << 8) /* Endpoint Type */

#define	AT91_UDP_EPTYPE_CTRL (0 << 8)

#define	AT91_UDP_EPTYPE_ISO_OUT (1 << 8)

#define	AT91_UDP_EPTYPE_BULK_OUT (2 << 8)

#define	AT91_UDP_EPTYPE_INT_OUT (3 << 8)

#define	AT91_UDP_EPTYPE_ISO_IN (5 << 8)

#define	AT91_UDP_EPTYPE_BULK_IN (6 << 8)

#define	AT91_UDP_EPTYPE_INT_IN (7 << 8)

#define	AT91_UDP_DTGLE (1 << 11) /* Data Toggle */

#define	AT91_UDP_EPEDS (1 << 15) /* Endpoint Enable/Disable */

#define	AT91_UDP_RXBYTECNT (0x7ff << 16) /* Number of bytes in FIFO */

#define	AT91_UDP_FDR(n) (0x50+((n)4)) / Endpoint FIFO Data Registers 0-7 */

#define	AT91_UDP_TXVC 0x74 /* Transceiver Control Register */

#define	AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */

#define	AT91_UDP_TXVC_PUON (1 << 9) /* PullUp On [AT91SAM9260 only] */

#define	NUM_ENDPOINTS 6

#define	MINIMUS_INTERRUPTUS (AT91_UDP_ENDBUSRES \| AT91_UDP_RXRSM \| AT91_UDP_RXSUSP)

#define	VDBG(stuff...) do{}while(0)

#define	PACKET(stuff...) do{}while(0)

#define	ERR(stuff...) pr_err("udc: " stuff)

#define	WARNING(stuff...) pr_warning("udc: " stuff)

#define	INFO(stuff...) pr_info("udc: " stuff)

#define	DBG(stuff...) pr_debug("udc: " stuff)

Macro Definition Documentation

#define AT91_UDP_CONFG (1 << 1) /* Configured */

Definition at line 27 of file at91_udc.h.

#define AT91_UDP_CSR ( n ) (0x30+((n)*4)) /* Endpoint Control/Status Registers 0-7 */

Definition at line 52 of file at91_udc.h.

#define AT91_UDP_DIR (1 << 7) /* Transfer Direction */

Definition at line 60 of file at91_udc.h.

#define AT91_UDP_DTGLE (1 << 11) /* Data Toggle */

Definition at line 69 of file at91_udc.h.

#define AT91_UDP_ENDBUSRES (1 << 12) /* End of Bus Reset Interrupt Status */

Definition at line 46 of file at91_udc.h.

#define AT91_UDP_EP ( n ) (1 << (n)) /* Endpoint Interrupt Status */

Definition at line 41 of file at91_udc.h.

#define AT91_UDP_EPEDS (1 << 15) /* Endpoint Enable/Disable */

Definition at line 70 of file at91_udc.h.

#define AT91_UDP_EPTYPE (7 << 8) /* Endpoint Type */

Definition at line 61 of file at91_udc.h.

#define AT91_UDP_EPTYPE_BULK_IN (6 << 8)

Definition at line 67 of file at91_udc.h.

#define AT91_UDP_EPTYPE_BULK_OUT (2 << 8)

Definition at line 64 of file at91_udc.h.

#define AT91_UDP_EPTYPE_CTRL (0 << 8)

Definition at line 62 of file at91_udc.h.

#define AT91_UDP_EPTYPE_INT_IN (7 << 8)

Definition at line 68 of file at91_udc.h.

#define AT91_UDP_EPTYPE_INT_OUT (3 << 8)

Definition at line 65 of file at91_udc.h.

#define AT91_UDP_EPTYPE_ISO_IN (5 << 8)

Definition at line 66 of file at91_udc.h.

#define AT91_UDP_EPTYPE_ISO_OUT (1 << 8)

Definition at line 63 of file at91_udc.h.

#define AT91_UDP_ESR (1 << 2) /* Enable Send Resume */

Definition at line 28 of file at91_udc.h.

#define AT91_UDP_EXTRSM (1 << 10) /* External Resume Interrupt Status [AT91RM9200 only] */

Definition at line 44 of file at91_udc.h.

#define AT91_UDP_FADD (0x7f << 0) /* Function Address Value */

Definition at line 33 of file at91_udc.h.

#define AT91_UDP_FADDEN (1 << 0) /* Function Address Enable */

Definition at line 26 of file at91_udc.h.

#define AT91_UDP_FADDR 0x08 /* Function Address Register */

Definition at line 32 of file at91_udc.h.

#define AT91_UDP_FDR ( n ) (0x50+((n)*4)) /* Endpoint FIFO Data Registers 0-7 */

Definition at line 73 of file at91_udc.h.

#define AT91_UDP_FEN (1 << 8) /* Function Enable */

Definition at line 34 of file at91_udc.h.

#define AT91_UDP_FORCESTALL (1 << 5) /* Force Stall */

Definition at line 58 of file at91_udc.h.

#define AT91_UDP_FRM_ERR (1 << 16) /* Frame Error */

Definition at line 22 of file at91_udc.h.

#define AT91_UDP_FRM_NUM 0x00 /* Frame Number Register */

Definition at line 20 of file at91_udc.h.

#define AT91_UDP_FRM_OK (1 << 17) /* Frame OK */

Definition at line 23 of file at91_udc.h.

#define AT91_UDP_GLB_STAT 0x04 /* Global State Register */

Definition at line 25 of file at91_udc.h.

#define AT91_UDP_ICR 0x20 /* Interrupt Clear Register */

Definition at line 49 of file at91_udc.h.

#define AT91_UDP_IDR 0x14 /* Interrupt Disable Register */

Definition at line 37 of file at91_udc.h.

#define AT91_UDP_IER 0x10 /* Interrupt Enable Register */

Definition at line 36 of file at91_udc.h.

#define AT91_UDP_IMR 0x18 /* Interrupt Mask Register */

Definition at line 38 of file at91_udc.h.

#define AT91_UDP_ISR 0x1c /* Interrupt Status Register */

Definition at line 40 of file at91_udc.h.

#define AT91_UDP_NUM (0x7ff << 0) /* Frame Number */

Definition at line 21 of file at91_udc.h.

#define AT91_UDP_RMWUPE (1 << 4) /* Remote Wake Up Enable */

Definition at line 30 of file at91_udc.h.

#define AT91_UDP_RSMINPR (1 << 3) /* Resume has been sent */

Definition at line 29 of file at91_udc.h.

#define AT91_UDP_RST_EP 0x28 /* Reset Endpoint Register */

Definition at line 50 of file at91_udc.h.

#define AT91_UDP_RX_DATA_BK0 (1 << 1) /* Receive Data Bank 0 */

Definition at line 54 of file at91_udc.h.

#define AT91_UDP_RX_DATA_BK1 (1 << 6) /* Receive Data Bank 1 */

Definition at line 59 of file at91_udc.h.

#define AT91_UDP_RXBYTECNT (0x7ff << 16) /* Number of bytes in FIFO */

Definition at line 71 of file at91_udc.h.

#define AT91_UDP_RXRSM (1 << 9) /* USB Resume Interrupt Status */

Definition at line 43 of file at91_udc.h.

#define AT91_UDP_RXSETUP (1 << 2) /* Send STALL to the host */

Definition at line 55 of file at91_udc.h.

#define AT91_UDP_RXSUSP (1 << 8) /* USB Suspend Interrupt Status */

Definition at line 42 of file at91_udc.h.

#define AT91_UDP_SOFINT (1 << 11) /* Start of Frame Interrupt Status */

Definition at line 45 of file at91_udc.h.

#define AT91_UDP_STALLSENT (1 << 3) /* Stall Sent / Isochronous error (Isochronous endpoints) */

Definition at line 56 of file at91_udc.h.

#define AT91_UDP_TXCOMP (1 << 0) /* Generates IN packet with data previously written in DPR */

Definition at line 53 of file at91_udc.h.

#define AT91_UDP_TXPKTRDY (1 << 4) /* Transmit Packet Ready */

Definition at line 57 of file at91_udc.h.

#define AT91_UDP_TXVC 0x74 /* Transceiver Control Register */

Definition at line 75 of file at91_udc.h.

#define AT91_UDP_TXVC_PUON (1 << 9) /* PullUp On [AT91SAM9260 only] */

Definition at line 77 of file at91_udc.h.

#define AT91_UDP_TXVC_TXVDIS (1 << 8) /* Transceiver Disable */

Definition at line 76 of file at91_udc.h.

#define AT91_UDP_WAKEUP (1 << 13) /* USB Wakeup Interrupt Status [AT91RM9200 only] */

Definition at line 47 of file at91_udc.h.

#define DBG ( stuff... ) pr_debug("udc: " stuff)

Definition at line 166 of file at91_udc.h.

#define ERR ( stuff... ) pr_err("udc: " stuff)

Definition at line 163 of file at91_udc.h.

#define INFO ( stuff... ) pr_info("udc: " stuff)

Definition at line 165 of file at91_udc.h.

#define MINIMUS_INTERRUPTUS (AT91_UDP_ENDBUSRES | AT91_UDP_RXRSM | AT91_UDP_RXSUSP)

Definition at line 91 of file at91_udc.h.

#define NUM_ENDPOINTS 6

Definition at line 85 of file at91_udc.h.

#define PACKET ( stuff... ) do{}while(0)

Definition at line 160 of file at91_udc.h.

#define VDBG ( stuff... ) do{}while(0)

Definition at line 154 of file at91_udc.h.

#define WARNING ( stuff... ) pr_warning("udc: " stuff)

Definition at line 164 of file at91_udc.h.

Data Structures

Macros

Macro Definition Documentation