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atmel_serial.c
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1 /*
2  * Driver for Atmel AT91 / AT32 Serial ports
3  * Copyright (C) 2003 Rick Bronson
4  *
5  * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
6  * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
7  *
8  * DMA support added by Chip Coldwell.
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or
13  * (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23  *
24  */
25 #include <linux/module.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/slab.h>
29 #include <linux/init.h>
30 #include <linux/serial.h>
31 #include <linux/clk.h>
32 #include <linux/console.h>
33 #include <linux/sysrq.h>
34 #include <linux/tty_flip.h>
35 #include <linux/platform_device.h>
36 #include <linux/of.h>
37 #include <linux/of_device.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/atmel_pdc.h>
40 #include <linux/atmel_serial.h>
41 #include <linux/uaccess.h>
42 
43 #include <asm/io.h>
44 #include <asm/ioctls.h>
45 
46 #include <asm/mach/serial_at91.h>
47 #include <mach/board.h>
48 
49 #ifdef CONFIG_ARM
50 #include <mach/cpu.h>
51 #include <asm/gpio.h>
52 #endif
53 
54 #define PDC_BUFFER_SIZE 512
55 /* Revisit: We should calculate this based on the actual port settings */
56 #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
57 
58 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
59 #define SUPPORT_SYSRQ
60 #endif
61 
62 #include <linux/serial_core.h>
63 
64 static void atmel_start_rx(struct uart_port *port);
65 static void atmel_stop_rx(struct uart_port *port);
66 
67 #ifdef CONFIG_SERIAL_ATMEL_TTYAT
68 
69 /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
70  * should coexist with the 8250 driver, such as if we have an external 16C550
71  * UART. */
72 #define SERIAL_ATMEL_MAJOR 204
73 #define MINOR_START 154
74 #define ATMEL_DEVICENAME "ttyAT"
75 
76 #else
77 
78 /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
79  * name, but it is legally reserved for the 8250 driver. */
80 #define SERIAL_ATMEL_MAJOR TTY_MAJOR
81 #define MINOR_START 64
82 #define ATMEL_DEVICENAME "ttyS"
83 
84 #endif
85 
86 #define ATMEL_ISR_PASS_LIMIT 256
87 
88 /* UART registers. CR is write-only, hence no GET macro */
89 #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
90 #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
91 #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
92 #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
93 #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
94 #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
95 #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
96 #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
97 #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
98 #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
99 #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
100 #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
101 #define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
102 
103  /* PDC registers */
104 #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
105 #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
106 
107 #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
108 #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
109 #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
110 #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
111 #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
112 
113 #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
114 #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
115 #define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
116 
117 static int (*atmel_open_hook)(struct uart_port *);
118 static void (*atmel_close_hook)(struct uart_port *);
119 
121  unsigned char *buf;
123  unsigned int dma_size;
124  unsigned int ofs;
125 };
126 
130 };
131 
132 #define ATMEL_SERIAL_RINGSIZE 1024
133 
134 /*
135  * We wrap our port structure around the generic uart_port.
136  */
138  struct uart_port uart; /* uart */
139  struct clk *clk; /* uart clock */
140  int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
141  u32 backup_imr; /* IMR saved during suspend */
142  int break_active; /* break being received */
143 
144  short use_dma_rx; /* enable PDC receiver */
145  short pdc_rx_idx; /* current PDC RX buffer */
146  struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
147 
148  short use_dma_tx; /* enable PDC transmitter */
149  struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
150 
152  unsigned int irq_status;
153  unsigned int irq_status_prev;
154 
156 
157  struct serial_rs485 rs485; /* rs485 settings */
158  unsigned int tx_done_mask;
159 };
160 
161 static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
162 static unsigned long atmel_ports_in_use;
163 
164 #ifdef SUPPORT_SYSRQ
165 static struct console atmel_console;
166 #endif
167 
168 #if defined(CONFIG_OF)
169 static const struct of_device_id atmel_serial_dt_ids[] = {
170  { .compatible = "atmel,at91rm9200-usart" },
171  { .compatible = "atmel,at91sam9260-usart" },
172  { /* sentinel */ }
173 };
174 
175 MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids);
176 #endif
177 
178 static inline struct atmel_uart_port *
179 to_atmel_uart_port(struct uart_port *uart)
180 {
181  return container_of(uart, struct atmel_uart_port, uart);
182 }
183 
184 #ifdef CONFIG_SERIAL_ATMEL_PDC
185 static bool atmel_use_dma_rx(struct uart_port *port)
186 {
187  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
188 
189  return atmel_port->use_dma_rx;
190 }
191 
192 static bool atmel_use_dma_tx(struct uart_port *port)
193 {
194  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
195 
196  return atmel_port->use_dma_tx;
197 }
198 #else
199 static bool atmel_use_dma_rx(struct uart_port *port)
200 {
201  return false;
202 }
203 
204 static bool atmel_use_dma_tx(struct uart_port *port)
205 {
206  return false;
207 }
208 #endif
209 
210 /* Enable or disable the rs485 support */
211 void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
212 {
213  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
214  unsigned int mode;
215  unsigned long flags;
216 
217  spin_lock_irqsave(&port->lock, flags);
218 
219  /* Disable interrupts */
220  UART_PUT_IDR(port, atmel_port->tx_done_mask);
221 
222  mode = UART_GET_MR(port);
223 
224  /* Resetting serial mode to RS232 (0x0) */
225  mode &= ~ATMEL_US_USMODE;
226 
227  atmel_port->rs485 = *rs485conf;
228 
229  if (rs485conf->flags & SER_RS485_ENABLED) {
230  dev_dbg(port->dev, "Setting UART to RS485\n");
231  atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
232  if ((rs485conf->delay_rts_after_send) > 0)
233  UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
234  mode |= ATMEL_US_USMODE_RS485;
235  } else {
236  dev_dbg(port->dev, "Setting UART to RS232\n");
237  if (atmel_use_dma_tx(port))
238  atmel_port->tx_done_mask = ATMEL_US_ENDTX |
240  else
241  atmel_port->tx_done_mask = ATMEL_US_TXRDY;
242  }
243  UART_PUT_MR(port, mode);
244 
245  /* Enable interrupts */
246  UART_PUT_IER(port, atmel_port->tx_done_mask);
247 
248  spin_unlock_irqrestore(&port->lock, flags);
249 
250 }
251 
252 /*
253  * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
254  */
255 static u_int atmel_tx_empty(struct uart_port *port)
256 {
257  return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
258 }
259 
260 /*
261  * Set state of the modem control output lines
262  */
263 static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
264 {
265  unsigned int control = 0;
266  unsigned int mode;
267  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
268 
269 #ifdef CONFIG_ARCH_AT91RM9200
270  if (cpu_is_at91rm9200()) {
271  /*
272  * AT91RM9200 Errata #39: RTS0 is not internally connected
273  * to PA21. We need to drive the pin manually.
274  */
275  if (port->mapbase == AT91RM9200_BASE_US0) {
276  if (mctrl & TIOCM_RTS)
278  else
280  }
281  }
282 #endif
283 
284  if (mctrl & TIOCM_RTS)
285  control |= ATMEL_US_RTSEN;
286  else
287  control |= ATMEL_US_RTSDIS;
288 
289  if (mctrl & TIOCM_DTR)
290  control |= ATMEL_US_DTREN;
291  else
292  control |= ATMEL_US_DTRDIS;
293 
294  UART_PUT_CR(port, control);
295 
296  /* Local loopback mode? */
297  mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
298  if (mctrl & TIOCM_LOOP)
299  mode |= ATMEL_US_CHMODE_LOC_LOOP;
300  else
301  mode |= ATMEL_US_CHMODE_NORMAL;
302 
303  /* Resetting serial mode to RS232 (0x0) */
304  mode &= ~ATMEL_US_USMODE;
305 
306  if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
307  dev_dbg(port->dev, "Setting UART to RS485\n");
308  if ((atmel_port->rs485.delay_rts_after_send) > 0)
309  UART_PUT_TTGR(port,
310  atmel_port->rs485.delay_rts_after_send);
311  mode |= ATMEL_US_USMODE_RS485;
312  } else {
313  dev_dbg(port->dev, "Setting UART to RS232\n");
314  }
315  UART_PUT_MR(port, mode);
316 }
317 
318 /*
319  * Get state of the modem control input lines
320  */
321 static u_int atmel_get_mctrl(struct uart_port *port)
322 {
323  unsigned int status, ret = 0;
324 
325  status = UART_GET_CSR(port);
326 
327  /*
328  * The control signals are active low.
329  */
330  if (!(status & ATMEL_US_DCD))
331  ret |= TIOCM_CD;
332  if (!(status & ATMEL_US_CTS))
333  ret |= TIOCM_CTS;
334  if (!(status & ATMEL_US_DSR))
335  ret |= TIOCM_DSR;
336  if (!(status & ATMEL_US_RI))
337  ret |= TIOCM_RI;
338 
339  return ret;
340 }
341 
342 /*
343  * Stop transmitting.
344  */
345 static void atmel_stop_tx(struct uart_port *port)
346 {
347  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
348 
349  if (atmel_use_dma_tx(port)) {
350  /* disable PDC transmit */
352  }
353  /* Disable interrupts */
354  UART_PUT_IDR(port, atmel_port->tx_done_mask);
355 
356  if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
357  !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
358  atmel_start_rx(port);
359 }
360 
361 /*
362  * Start transmitting.
363  */
364 static void atmel_start_tx(struct uart_port *port)
365 {
366  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
367 
368  if (atmel_use_dma_tx(port)) {
369  if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
370  /* The transmitter is already running. Yes, we
371  really need this.*/
372  return;
373 
374  if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
375  !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
376  atmel_stop_rx(port);
377 
378  /* re-enable PDC transmit */
379  UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
380  }
381  /* Enable interrupts */
382  UART_PUT_IER(port, atmel_port->tx_done_mask);
383 }
384 
385 /*
386  * start receiving - port is in process of being opened.
387  */
388 static void atmel_start_rx(struct uart_port *port)
389 {
390  UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
391 
392  UART_PUT_CR(port, ATMEL_US_RXEN);
393 
394  if (atmel_use_dma_rx(port)) {
395  /* enable PDC controller */
397  port->read_status_mask);
399  } else {
401  }
402 }
403 
404 /*
405  * Stop receiving - port is in process of being closed.
406  */
407 static void atmel_stop_rx(struct uart_port *port)
408 {
410 
411  if (atmel_use_dma_rx(port)) {
412  /* disable PDC receive */
415  port->read_status_mask);
416  } else {
418  }
419 }
420 
421 /*
422  * Enable modem status interrupts
423  */
424 static void atmel_enable_ms(struct uart_port *port)
425 {
428 }
429 
430 /*
431  * Control the transmission of a break signal
432  */
433 static void atmel_break_ctl(struct uart_port *port, int break_state)
434 {
435  if (break_state != 0)
436  UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
437  else
438  UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
439 }
440 
441 /*
442  * Stores the incoming character in the ring buffer
443  */
444 static void
445 atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
446  unsigned int ch)
447 {
448  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
449  struct circ_buf *ring = &atmel_port->rx_ring;
450  struct atmel_uart_char *c;
451 
452  if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
453  /* Buffer overflow, ignore char */
454  return;
455 
456  c = &((struct atmel_uart_char *)ring->buf)[ring->head];
457  c->status = status;
458  c->ch = ch;
459 
460  /* Make sure the character is stored before we update head. */
461  smp_wmb();
462 
463  ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
464 }
465 
466 /*
467  * Deal with parity, framing and overrun errors.
468  */
469 static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
470 {
471  /* clear error */
473 
474  if (status & ATMEL_US_RXBRK) {
475  /* ignore side-effect */
476  status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
477  port->icount.brk++;
478  }
479  if (status & ATMEL_US_PARE)
480  port->icount.parity++;
481  if (status & ATMEL_US_FRAME)
482  port->icount.frame++;
483  if (status & ATMEL_US_OVRE)
484  port->icount.overrun++;
485 }
486 
487 /*
488  * Characters received (called from interrupt handler)
489  */
490 static void atmel_rx_chars(struct uart_port *port)
491 {
492  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
493  unsigned int status, ch;
494 
495  status = UART_GET_CSR(port);
496  while (status & ATMEL_US_RXRDY) {
497  ch = UART_GET_CHAR(port);
498 
499  /*
500  * note that the error handling code is
501  * out of the main execution path
502  */
503  if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
504  | ATMEL_US_OVRE | ATMEL_US_RXBRK)
505  || atmel_port->break_active)) {
506 
507  /* clear error */
509 
510  if (status & ATMEL_US_RXBRK
511  && !atmel_port->break_active) {
512  atmel_port->break_active = 1;
513  UART_PUT_IER(port, ATMEL_US_RXBRK);
514  } else {
515  /*
516  * This is either the end-of-break
517  * condition or we've received at
518  * least one character without RXBRK
519  * being set. In both cases, the next
520  * RXBRK will indicate start-of-break.
521  */
522  UART_PUT_IDR(port, ATMEL_US_RXBRK);
523  status &= ~ATMEL_US_RXBRK;
524  atmel_port->break_active = 0;
525  }
526  }
527 
528  atmel_buffer_rx_char(port, status, ch);
529  status = UART_GET_CSR(port);
530  }
531 
532  tasklet_schedule(&atmel_port->tasklet);
533 }
534 
535 /*
536  * Transmit characters (called from tasklet with TXRDY interrupt
537  * disabled)
538  */
539 static void atmel_tx_chars(struct uart_port *port)
540 {
541  struct circ_buf *xmit = &port->state->xmit;
542  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
543 
544  if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
545  UART_PUT_CHAR(port, port->x_char);
546  port->icount.tx++;
547  port->x_char = 0;
548  }
549  if (uart_circ_empty(xmit) || uart_tx_stopped(port))
550  return;
551 
552  while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
553  UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
554  xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
555  port->icount.tx++;
556  if (uart_circ_empty(xmit))
557  break;
558  }
559 
561  uart_write_wakeup(port);
562 
563  if (!uart_circ_empty(xmit))
564  /* Enable interrupts */
565  UART_PUT_IER(port, atmel_port->tx_done_mask);
566 }
567 
568 /*
569  * receive interrupt handler.
570  */
571 static void
572 atmel_handle_receive(struct uart_port *port, unsigned int pending)
573 {
574  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
575 
576  if (atmel_use_dma_rx(port)) {
577  /*
578  * PDC receive. Just schedule the tasklet and let it
579  * figure out the details.
580  *
581  * TODO: We're not handling error flags correctly at
582  * the moment.
583  */
584  if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
586  | ATMEL_US_TIMEOUT));
587  tasklet_schedule(&atmel_port->tasklet);
588  }
589 
590  if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
591  ATMEL_US_FRAME | ATMEL_US_PARE))
592  atmel_pdc_rxerr(port, pending);
593  }
594 
595  /* Interrupt receive */
596  if (pending & ATMEL_US_RXRDY)
597  atmel_rx_chars(port);
598  else if (pending & ATMEL_US_RXBRK) {
599  /*
600  * End of break detected. If it came along with a
601  * character, atmel_rx_chars will handle it.
602  */
604  UART_PUT_IDR(port, ATMEL_US_RXBRK);
605  atmel_port->break_active = 0;
606  }
607 }
608 
609 /*
610  * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
611  */
612 static void
613 atmel_handle_transmit(struct uart_port *port, unsigned int pending)
614 {
615  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
616 
617  if (pending & atmel_port->tx_done_mask) {
618  /* Either PDC or interrupt transmission */
619  UART_PUT_IDR(port, atmel_port->tx_done_mask);
620  tasklet_schedule(&atmel_port->tasklet);
621  }
622 }
623 
624 /*
625  * status flags interrupt handler.
626  */
627 static void
628 atmel_handle_status(struct uart_port *port, unsigned int pending,
629  unsigned int status)
630 {
631  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
632 
633  if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
634  | ATMEL_US_CTSIC)) {
635  atmel_port->irq_status = status;
636  tasklet_schedule(&atmel_port->tasklet);
637  }
638 }
639 
640 /*
641  * Interrupt handler
642  */
643 static irqreturn_t atmel_interrupt(int irq, void *dev_id)
644 {
645  struct uart_port *port = dev_id;
646  unsigned int status, pending, pass_counter = 0;
647 
648  do {
649  status = UART_GET_CSR(port);
650  pending = status & UART_GET_IMR(port);
651  if (!pending)
652  break;
653 
654  atmel_handle_receive(port, pending);
655  atmel_handle_status(port, pending, status);
656  atmel_handle_transmit(port, pending);
657  } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
658 
659  return pass_counter ? IRQ_HANDLED : IRQ_NONE;
660 }
661 
662 /*
663  * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
664  */
665 static void atmel_tx_dma(struct uart_port *port)
666 {
667  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
668  struct circ_buf *xmit = &port->state->xmit;
669  struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
670  int count;
671 
672  /* nothing left to transmit? */
673  if (UART_GET_TCR(port))
674  return;
675 
676  xmit->tail += pdc->ofs;
677  xmit->tail &= UART_XMIT_SIZE - 1;
678 
679  port->icount.tx += pdc->ofs;
680  pdc->ofs = 0;
681 
682  /* more to transmit - setup next transfer */
683 
684  /* disable PDC transmit */
686 
687  if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
689  pdc->dma_addr,
690  pdc->dma_size,
691  DMA_TO_DEVICE);
692 
693  count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
694  pdc->ofs = count;
695 
696  UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
697  UART_PUT_TCR(port, count);
698  /* re-enable PDC transmit */
699  UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
700  /* Enable interrupts */
701  UART_PUT_IER(port, atmel_port->tx_done_mask);
702  } else {
703  if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
704  !(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) {
705  /* DMA done, stop TX, start RX for RS485 */
706  atmel_start_rx(port);
707  }
708  }
709 
711  uart_write_wakeup(port);
712 }
713 
714 static void atmel_rx_from_ring(struct uart_port *port)
715 {
716  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
717  struct circ_buf *ring = &atmel_port->rx_ring;
718  unsigned int flg;
719  unsigned int status;
720 
721  while (ring->head != ring->tail) {
722  struct atmel_uart_char c;
723 
724  /* Make sure c is loaded after head. */
725  smp_rmb();
726 
727  c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
728 
729  ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
730 
731  port->icount.rx++;
732  status = c.status;
733  flg = TTY_NORMAL;
734 
735  /*
736  * note that the error handling code is
737  * out of the main execution path
738  */
739  if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
740  | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
741  if (status & ATMEL_US_RXBRK) {
742  /* ignore side-effect */
743  status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
744 
745  port->icount.brk++;
746  if (uart_handle_break(port))
747  continue;
748  }
749  if (status & ATMEL_US_PARE)
750  port->icount.parity++;
751  if (status & ATMEL_US_FRAME)
752  port->icount.frame++;
753  if (status & ATMEL_US_OVRE)
754  port->icount.overrun++;
755 
756  status &= port->read_status_mask;
757 
758  if (status & ATMEL_US_RXBRK)
759  flg = TTY_BREAK;
760  else if (status & ATMEL_US_PARE)
761  flg = TTY_PARITY;
762  else if (status & ATMEL_US_FRAME)
763  flg = TTY_FRAME;
764  }
765 
766 
767  if (uart_handle_sysrq_char(port, c.ch))
768  continue;
769 
770  uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
771  }
772 
773  /*
774  * Drop the lock here since it might end up calling
775  * uart_start(), which takes the lock.
776  */
777  spin_unlock(&port->lock);
778  tty_flip_buffer_push(port->state->port.tty);
779  spin_lock(&port->lock);
780 }
781 
782 static void atmel_rx_from_dma(struct uart_port *port)
783 {
784  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
785  struct tty_struct *tty = port->state->port.tty;
786  struct atmel_dma_buffer *pdc;
787  int rx_idx = atmel_port->pdc_rx_idx;
788  unsigned int head;
789  unsigned int tail;
790  unsigned int count;
791 
792  do {
793  /* Reset the UART timeout early so that we don't miss one */
795 
796  pdc = &atmel_port->pdc_rx[rx_idx];
797  head = UART_GET_RPR(port) - pdc->dma_addr;
798  tail = pdc->ofs;
799 
800  /* If the PDC has switched buffers, RPR won't contain
801  * any address within the current buffer. Since head
802  * is unsigned, we just need a one-way comparison to
803  * find out.
804  *
805  * In this case, we just need to consume the entire
806  * buffer and resubmit it for DMA. This will clear the
807  * ENDRX bit as well, so that we can safely re-enable
808  * all interrupts below.
809  */
810  head = min(head, pdc->dma_size);
811 
812  if (likely(head != tail)) {
814  pdc->dma_size, DMA_FROM_DEVICE);
815 
816  /*
817  * head will only wrap around when we recycle
818  * the DMA buffer, and when that happens, we
819  * explicitly set tail to 0. So head will
820  * always be greater than tail.
821  */
822  count = head - tail;
823 
824  tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
825 
827  pdc->dma_size, DMA_FROM_DEVICE);
828 
829  port->icount.rx += count;
830  pdc->ofs = head;
831  }
832 
833  /*
834  * If the current buffer is full, we need to check if
835  * the next one contains any additional data.
836  */
837  if (head >= pdc->dma_size) {
838  pdc->ofs = 0;
839  UART_PUT_RNPR(port, pdc->dma_addr);
840  UART_PUT_RNCR(port, pdc->dma_size);
841 
842  rx_idx = !rx_idx;
843  atmel_port->pdc_rx_idx = rx_idx;
844  }
845  } while (head >= pdc->dma_size);
846 
847  /*
848  * Drop the lock here since it might end up calling
849  * uart_start(), which takes the lock.
850  */
851  spin_unlock(&port->lock);
853  spin_lock(&port->lock);
854 
856 }
857 
858 /*
859  * tasklet handling tty stuff outside the interrupt handler.
860  */
861 static void atmel_tasklet_func(unsigned long data)
862 {
863  struct uart_port *port = (struct uart_port *)data;
864  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
865  unsigned int status;
866  unsigned int status_change;
867 
868  /* The interrupt handler does not take the lock */
869  spin_lock(&port->lock);
870 
871  if (atmel_use_dma_tx(port))
872  atmel_tx_dma(port);
873  else
874  atmel_tx_chars(port);
875 
876  status = atmel_port->irq_status;
877  status_change = status ^ atmel_port->irq_status_prev;
878 
879  if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
880  | ATMEL_US_DCD | ATMEL_US_CTS)) {
881  /* TODO: All reads to CSR will clear these interrupts! */
882  if (status_change & ATMEL_US_RI)
883  port->icount.rng++;
884  if (status_change & ATMEL_US_DSR)
885  port->icount.dsr++;
886  if (status_change & ATMEL_US_DCD)
887  uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
888  if (status_change & ATMEL_US_CTS)
889  uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
890 
891  wake_up_interruptible(&port->state->port.delta_msr_wait);
892 
893  atmel_port->irq_status_prev = status;
894  }
895 
896  if (atmel_use_dma_rx(port))
897  atmel_rx_from_dma(port);
898  else
899  atmel_rx_from_ring(port);
900 
901  spin_unlock(&port->lock);
902 }
903 
904 /*
905  * Perform initialization and enable port for reception
906  */
907 static int atmel_startup(struct uart_port *port)
908 {
909  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
910  struct tty_struct *tty = port->state->port.tty;
911  int retval;
912 
913  /*
914  * Ensure that no interrupts are enabled otherwise when
915  * request_irq() is called we could get stuck trying to
916  * handle an unexpected interrupt
917  */
918  UART_PUT_IDR(port, -1);
919 
920  /*
921  * Allocate the IRQ
922  */
923  retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
924  tty ? tty->name : "atmel_serial", port);
925  if (retval) {
926  printk("atmel_serial: atmel_startup - Can't get irq\n");
927  return retval;
928  }
929 
930  /*
931  * Initialize DMA (if necessary)
932  */
933  if (atmel_use_dma_rx(port)) {
934  int i;
935 
936  for (i = 0; i < 2; i++) {
937  struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
938 
940  if (pdc->buf == NULL) {
941  if (i != 0) {
942  dma_unmap_single(port->dev,
943  atmel_port->pdc_rx[0].dma_addr,
946  kfree(atmel_port->pdc_rx[0].buf);
947  }
948  free_irq(port->irq, port);
949  return -ENOMEM;
950  }
951  pdc->dma_addr = dma_map_single(port->dev,
952  pdc->buf,
955  pdc->dma_size = PDC_BUFFER_SIZE;
956  pdc->ofs = 0;
957  }
958 
959  atmel_port->pdc_rx_idx = 0;
960 
961  UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
963 
964  UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
966  }
967  if (atmel_use_dma_tx(port)) {
968  struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
969  struct circ_buf *xmit = &port->state->xmit;
970 
971  pdc->buf = xmit->buf;
972  pdc->dma_addr = dma_map_single(port->dev,
973  pdc->buf,
975  DMA_TO_DEVICE);
976  pdc->dma_size = UART_XMIT_SIZE;
977  pdc->ofs = 0;
978  }
979 
980  /*
981  * If there is a specific "open" function (to register
982  * control line interrupts)
983  */
984  if (atmel_open_hook) {
985  retval = atmel_open_hook(port);
986  if (retval) {
987  free_irq(port->irq, port);
988  return retval;
989  }
990  }
991 
992  /* Save current CSR for comparison in atmel_tasklet_func() */
993  atmel_port->irq_status_prev = UART_GET_CSR(port);
994  atmel_port->irq_status = atmel_port->irq_status_prev;
995 
996  /*
997  * Finally, enable the serial port
998  */
1000  /* enable xmit & rcvr */
1002 
1003  if (atmel_use_dma_rx(port)) {
1004  /* set UART timeout */
1006  UART_PUT_CR(port, ATMEL_US_STTTO);
1007 
1009  /* enable PDC controller */
1011  } else {
1012  /* enable receive only */
1013  UART_PUT_IER(port, ATMEL_US_RXRDY);
1014  }
1015 
1016  return 0;
1017 }
1018 
1019 /*
1020  * Disable the port
1021  */
1022 static void atmel_shutdown(struct uart_port *port)
1023 {
1024  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1025  /*
1026  * Ensure everything is stopped.
1027  */
1028  atmel_stop_rx(port);
1029  atmel_stop_tx(port);
1030 
1031  /*
1032  * Shut-down the DMA.
1033  */
1034  if (atmel_use_dma_rx(port)) {
1035  int i;
1036 
1037  for (i = 0; i < 2; i++) {
1038  struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
1039 
1040  dma_unmap_single(port->dev,
1041  pdc->dma_addr,
1042  pdc->dma_size,
1043  DMA_FROM_DEVICE);
1044  kfree(pdc->buf);
1045  }
1046  }
1047  if (atmel_use_dma_tx(port)) {
1048  struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
1049 
1050  dma_unmap_single(port->dev,
1051  pdc->dma_addr,
1052  pdc->dma_size,
1053  DMA_TO_DEVICE);
1054  }
1055 
1056  /*
1057  * Disable all interrupts, port and break condition.
1058  */
1060  UART_PUT_IDR(port, -1);
1061 
1062  /*
1063  * Free the interrupt
1064  */
1065  free_irq(port->irq, port);
1066 
1067  /*
1068  * If there is a specific "close" function (to unregister
1069  * control line interrupts)
1070  */
1071  if (atmel_close_hook)
1072  atmel_close_hook(port);
1073 }
1074 
1075 /*
1076  * Flush any TX data submitted for DMA. Called when the TX circular
1077  * buffer is reset.
1078  */
1079 static void atmel_flush_buffer(struct uart_port *port)
1080 {
1081  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1082 
1083  if (atmel_use_dma_tx(port)) {
1084  UART_PUT_TCR(port, 0);
1085  atmel_port->pdc_tx.ofs = 0;
1086  }
1087 }
1088 
1089 /*
1090  * Power / Clock management.
1091  */
1092 static void atmel_serial_pm(struct uart_port *port, unsigned int state,
1093  unsigned int oldstate)
1094 {
1095  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1096 
1097  switch (state) {
1098  case 0:
1099  /*
1100  * Enable the peripheral clock for this serial port.
1101  * This is called on uart_open() or a resume event.
1102  */
1103  clk_enable(atmel_port->clk);
1104 
1105  /* re-enable interrupts if we disabled some on suspend */
1106  UART_PUT_IER(port, atmel_port->backup_imr);
1107  break;
1108  case 3:
1109  /* Back up the interrupt mask and disable all interrupts */
1110  atmel_port->backup_imr = UART_GET_IMR(port);
1111  UART_PUT_IDR(port, -1);
1112 
1113  /*
1114  * Disable the peripheral clock for this serial port.
1115  * This is called on uart_close() or a suspend event.
1116  */
1117  clk_disable(atmel_port->clk);
1118  break;
1119  default:
1120  printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
1121  }
1122 }
1123 
1124 /*
1125  * Change the port parameters
1126  */
1127 static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1128  struct ktermios *old)
1129 {
1130  unsigned long flags;
1131  unsigned int mode, imr, quot, baud;
1132  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1133 
1134  /* Get current mode register */
1135  mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
1137  | ATMEL_US_USMODE);
1138 
1139  baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
1140  quot = uart_get_divisor(port, baud);
1141 
1142  if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
1143  quot /= 8;
1144  mode |= ATMEL_US_USCLKS_MCK_DIV8;
1145  }
1146 
1147  /* byte size */
1148  switch (termios->c_cflag & CSIZE) {
1149  case CS5:
1150  mode |= ATMEL_US_CHRL_5;
1151  break;
1152  case CS6:
1153  mode |= ATMEL_US_CHRL_6;
1154  break;
1155  case CS7:
1156  mode |= ATMEL_US_CHRL_7;
1157  break;
1158  default:
1159  mode |= ATMEL_US_CHRL_8;
1160  break;
1161  }
1162 
1163  /* stop bits */
1164  if (termios->c_cflag & CSTOPB)
1165  mode |= ATMEL_US_NBSTOP_2;
1166 
1167  /* parity */
1168  if (termios->c_cflag & PARENB) {
1169  /* Mark or Space parity */
1170  if (termios->c_cflag & CMSPAR) {
1171  if (termios->c_cflag & PARODD)
1172  mode |= ATMEL_US_PAR_MARK;
1173  else
1174  mode |= ATMEL_US_PAR_SPACE;
1175  } else if (termios->c_cflag & PARODD)
1176  mode |= ATMEL_US_PAR_ODD;
1177  else
1178  mode |= ATMEL_US_PAR_EVEN;
1179  } else
1180  mode |= ATMEL_US_PAR_NONE;
1181 
1182  /* hardware handshake (RTS/CTS) */
1183  if (termios->c_cflag & CRTSCTS)
1184  mode |= ATMEL_US_USMODE_HWHS;
1185  else
1186  mode |= ATMEL_US_USMODE_NORMAL;
1187 
1188  spin_lock_irqsave(&port->lock, flags);
1189 
1191  if (termios->c_iflag & INPCK)
1192  port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1193  if (termios->c_iflag & (BRKINT | PARMRK))
1194  port->read_status_mask |= ATMEL_US_RXBRK;
1195 
1196  if (atmel_use_dma_rx(port))
1197  /* need to enable error interrupts */
1198  UART_PUT_IER(port, port->read_status_mask);
1199 
1200  /*
1201  * Characters to ignore
1202  */
1203  port->ignore_status_mask = 0;
1204  if (termios->c_iflag & IGNPAR)
1205  port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
1206  if (termios->c_iflag & IGNBRK) {
1208  /*
1209  * If we're ignoring parity and break indicators,
1210  * ignore overruns too (for real raw support).
1211  */
1212  if (termios->c_iflag & IGNPAR)
1214  }
1215  /* TODO: Ignore all characters if CREAD is set.*/
1216 
1217  /* update the per-port timeout */
1218  uart_update_timeout(port, termios->c_cflag, baud);
1219 
1220  /*
1221  * save/disable interrupts. The tty layer will ensure that the
1222  * transmitter is empty if requested by the caller, so there's
1223  * no need to wait for it here.
1224  */
1225  imr = UART_GET_IMR(port);
1226  UART_PUT_IDR(port, -1);
1227 
1228  /* disable receiver and transmitter */
1230 
1231  /* Resetting serial mode to RS232 (0x0) */
1232  mode &= ~ATMEL_US_USMODE;
1233 
1234  if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1235  dev_dbg(port->dev, "Setting UART to RS485\n");
1236  if ((atmel_port->rs485.delay_rts_after_send) > 0)
1237  UART_PUT_TTGR(port,
1238  atmel_port->rs485.delay_rts_after_send);
1239  mode |= ATMEL_US_USMODE_RS485;
1240  } else {
1241  dev_dbg(port->dev, "Setting UART to RS232\n");
1242  }
1243 
1244  /* set the parity, stop bits and data size */
1245  UART_PUT_MR(port, mode);
1246 
1247  /* set the baud rate */
1248  UART_PUT_BRGR(port, quot);
1251 
1252  /* restore interrupts */
1253  UART_PUT_IER(port, imr);
1254 
1255  /* CTS flow-control and modem-status interrupts */
1256  if (UART_ENABLE_MS(port, termios->c_cflag))
1257  port->ops->enable_ms(port);
1258 
1259  spin_unlock_irqrestore(&port->lock, flags);
1260 }
1261 
1262 static void atmel_set_ldisc(struct uart_port *port, int new)
1263 {
1264  if (new == N_PPS) {
1265  port->flags |= UPF_HARDPPS_CD;
1266  atmel_enable_ms(port);
1267  } else {
1268  port->flags &= ~UPF_HARDPPS_CD;
1269  }
1270 }
1271 
1272 /*
1273  * Return string describing the specified port
1274  */
1275 static const char *atmel_type(struct uart_port *port)
1276 {
1277  return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
1278 }
1279 
1280 /*
1281  * Release the memory region(s) being used by 'port'.
1282  */
1283 static void atmel_release_port(struct uart_port *port)
1284 {
1285  struct platform_device *pdev = to_platform_device(port->dev);
1286  int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1287 
1288  release_mem_region(port->mapbase, size);
1289 
1290  if (port->flags & UPF_IOREMAP) {
1291  iounmap(port->membase);
1292  port->membase = NULL;
1293  }
1294 }
1295 
1296 /*
1297  * Request the memory region(s) being used by 'port'.
1298  */
1299 static int atmel_request_port(struct uart_port *port)
1300 {
1301  struct platform_device *pdev = to_platform_device(port->dev);
1302  int size = pdev->resource[0].end - pdev->resource[0].start + 1;
1303 
1304  if (!request_mem_region(port->mapbase, size, "atmel_serial"))
1305  return -EBUSY;
1306 
1307  if (port->flags & UPF_IOREMAP) {
1308  port->membase = ioremap(port->mapbase, size);
1309  if (port->membase == NULL) {
1310  release_mem_region(port->mapbase, size);
1311  return -ENOMEM;
1312  }
1313  }
1314 
1315  return 0;
1316 }
1317 
1318 /*
1319  * Configure/autoconfigure the port.
1320  */
1321 static void atmel_config_port(struct uart_port *port, int flags)
1322 {
1323  if (flags & UART_CONFIG_TYPE) {
1324  port->type = PORT_ATMEL;
1325  atmel_request_port(port);
1326  }
1327 }
1328 
1329 /*
1330  * Verify the new serial_struct (for TIOCSSERIAL).
1331  */
1332 static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
1333 {
1334  int ret = 0;
1335  if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
1336  ret = -EINVAL;
1337  if (port->irq != ser->irq)
1338  ret = -EINVAL;
1339  if (ser->io_type != SERIAL_IO_MEM)
1340  ret = -EINVAL;
1341  if (port->uartclk / 16 != ser->baud_base)
1342  ret = -EINVAL;
1343  if ((void *)port->mapbase != ser->iomem_base)
1344  ret = -EINVAL;
1345  if (port->iobase != ser->port)
1346  ret = -EINVAL;
1347  if (ser->hub6 != 0)
1348  ret = -EINVAL;
1349  return ret;
1350 }
1351 
1352 #ifdef CONFIG_CONSOLE_POLL
1353 static int atmel_poll_get_char(struct uart_port *port)
1354 {
1355  while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
1356  cpu_relax();
1357 
1358  return UART_GET_CHAR(port);
1359 }
1360 
1361 static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
1362 {
1363  while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1364  cpu_relax();
1365 
1366  UART_PUT_CHAR(port, ch);
1367 }
1368 #endif
1369 
1370 static int
1371 atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
1372 {
1373  struct serial_rs485 rs485conf;
1374 
1375  switch (cmd) {
1376  case TIOCSRS485:
1377  if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
1378  sizeof(rs485conf)))
1379  return -EFAULT;
1380 
1381  atmel_config_rs485(port, &rs485conf);
1382  break;
1383 
1384  case TIOCGRS485:
1385  if (copy_to_user((struct serial_rs485 *) arg,
1386  &(to_atmel_uart_port(port)->rs485),
1387  sizeof(rs485conf)))
1388  return -EFAULT;
1389  break;
1390 
1391  default:
1392  return -ENOIOCTLCMD;
1393  }
1394  return 0;
1395 }
1396 
1397 
1398 
1399 static struct uart_ops atmel_pops = {
1400  .tx_empty = atmel_tx_empty,
1401  .set_mctrl = atmel_set_mctrl,
1402  .get_mctrl = atmel_get_mctrl,
1403  .stop_tx = atmel_stop_tx,
1404  .start_tx = atmel_start_tx,
1405  .stop_rx = atmel_stop_rx,
1406  .enable_ms = atmel_enable_ms,
1407  .break_ctl = atmel_break_ctl,
1408  .startup = atmel_startup,
1409  .shutdown = atmel_shutdown,
1410  .flush_buffer = atmel_flush_buffer,
1411  .set_termios = atmel_set_termios,
1412  .set_ldisc = atmel_set_ldisc,
1413  .type = atmel_type,
1414  .release_port = atmel_release_port,
1415  .request_port = atmel_request_port,
1416  .config_port = atmel_config_port,
1417  .verify_port = atmel_verify_port,
1418  .pm = atmel_serial_pm,
1419  .ioctl = atmel_ioctl,
1420 #ifdef CONFIG_CONSOLE_POLL
1421  .poll_get_char = atmel_poll_get_char,
1422  .poll_put_char = atmel_poll_put_char,
1423 #endif
1424 };
1425 
1426 static void __devinit atmel_of_init_port(struct atmel_uart_port *atmel_port,
1427  struct device_node *np)
1428 {
1429  u32 rs485_delay[2];
1430 
1431  /* DMA/PDC usage specification */
1432  if (of_get_property(np, "atmel,use-dma-rx", NULL))
1433  atmel_port->use_dma_rx = 1;
1434  else
1435  atmel_port->use_dma_rx = 0;
1436  if (of_get_property(np, "atmel,use-dma-tx", NULL))
1437  atmel_port->use_dma_tx = 1;
1438  else
1439  atmel_port->use_dma_tx = 0;
1440 
1441  /* rs485 properties */
1442  if (of_property_read_u32_array(np, "rs485-rts-delay",
1443  rs485_delay, 2) == 0) {
1444  struct serial_rs485 *rs485conf = &atmel_port->rs485;
1445 
1446  rs485conf->delay_rts_before_send = rs485_delay[0];
1447  rs485conf->delay_rts_after_send = rs485_delay[1];
1448  rs485conf->flags = 0;
1449 
1450  if (of_get_property(np, "rs485-rx-during-tx", NULL))
1451  rs485conf->flags |= SER_RS485_RX_DURING_TX;
1452 
1453  if (of_get_property(np, "linux,rs485-enabled-at-boot-time", NULL))
1454  rs485conf->flags |= SER_RS485_ENABLED;
1455  }
1456 }
1457 
1458 /*
1459  * Configure the port from the platform device resource info.
1460  */
1461 static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
1462  struct platform_device *pdev)
1463 {
1464  struct uart_port *port = &atmel_port->uart;
1465  struct atmel_uart_data *pdata = pdev->dev.platform_data;
1466 
1467  if (pdev->dev.of_node) {
1468  atmel_of_init_port(atmel_port, pdev->dev.of_node);
1469  } else {
1470  atmel_port->use_dma_rx = pdata->use_dma_rx;
1471  atmel_port->use_dma_tx = pdata->use_dma_tx;
1472  atmel_port->rs485 = pdata->rs485;
1473  }
1474 
1475  port->iotype = UPIO_MEM;
1476  port->flags = UPF_BOOT_AUTOCONF;
1477  port->ops = &atmel_pops;
1478  port->fifosize = 1;
1479  port->dev = &pdev->dev;
1480  port->mapbase = pdev->resource[0].start;
1481  port->irq = pdev->resource[1].start;
1482 
1483  tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
1484  (unsigned long)port);
1485 
1486  memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
1487 
1488  if (pdata && pdata->regs) {
1489  /* Already mapped by setup code */
1490  port->membase = pdata->regs;
1491  } else {
1492  port->flags |= UPF_IOREMAP;
1493  port->membase = NULL;
1494  }
1495 
1496  /* for console, the clock could already be configured */
1497  if (!atmel_port->clk) {
1498  atmel_port->clk = clk_get(&pdev->dev, "usart");
1499  clk_enable(atmel_port->clk);
1500  port->uartclk = clk_get_rate(atmel_port->clk);
1501  clk_disable(atmel_port->clk);
1502  /* only enable clock when USART is in use */
1503  }
1504 
1505  /* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
1506  if (atmel_port->rs485.flags & SER_RS485_ENABLED)
1507  atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
1508  else if (atmel_use_dma_tx(port)) {
1509  port->fifosize = PDC_BUFFER_SIZE;
1511  } else {
1512  atmel_port->tx_done_mask = ATMEL_US_TXRDY;
1513  }
1514 }
1515 
1516 /*
1517  * Register board-specific modem-control line handlers.
1518  */
1520 {
1521  if (fns->enable_ms)
1522  atmel_pops.enable_ms = fns->enable_ms;
1523  if (fns->get_mctrl)
1524  atmel_pops.get_mctrl = fns->get_mctrl;
1525  if (fns->set_mctrl)
1526  atmel_pops.set_mctrl = fns->set_mctrl;
1527  atmel_open_hook = fns->open;
1528  atmel_close_hook = fns->close;
1529  atmel_pops.pm = fns->pm;
1530  atmel_pops.set_wake = fns->set_wake;
1531 }
1532 
1533 struct platform_device *atmel_default_console_device; /* the serial console device */
1534 
1535 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1536 static void atmel_console_putchar(struct uart_port *port, int ch)
1537 {
1538  while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
1539  cpu_relax();
1540  UART_PUT_CHAR(port, ch);
1541 }
1542 
1543 /*
1544  * Interrupts are disabled on entering
1545  */
1546 static void atmel_console_write(struct console *co, const char *s, u_int count)
1547 {
1548  struct uart_port *port = &atmel_ports[co->index].uart;
1549  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1550  unsigned int status, imr;
1551  unsigned int pdc_tx;
1552 
1553  /*
1554  * First, save IMR and then disable interrupts
1555  */
1556  imr = UART_GET_IMR(port);
1557  UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
1558 
1559  /* Store PDC transmit status and disable it */
1560  pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
1562 
1563  uart_console_write(port, s, count, atmel_console_putchar);
1564 
1565  /*
1566  * Finally, wait for transmitter to become empty
1567  * and restore IMR
1568  */
1569  do {
1570  status = UART_GET_CSR(port);
1571  } while (!(status & ATMEL_US_TXRDY));
1572 
1573  /* Restore PDC transmit status */
1574  if (pdc_tx)
1575  UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
1576 
1577  /* set interrupts back the way they were */
1578  UART_PUT_IER(port, imr);
1579 }
1580 
1581 /*
1582  * If the port was already initialised (eg, by a boot loader),
1583  * try to determine the current setup.
1584  */
1585 static void __init atmel_console_get_options(struct uart_port *port, int *baud,
1586  int *parity, int *bits)
1587 {
1588  unsigned int mr, quot;
1589 
1590  /*
1591  * If the baud rate generator isn't running, the port wasn't
1592  * initialized by the boot loader.
1593  */
1594  quot = UART_GET_BRGR(port) & ATMEL_US_CD;
1595  if (!quot)
1596  return;
1597 
1598  mr = UART_GET_MR(port) & ATMEL_US_CHRL;
1599  if (mr == ATMEL_US_CHRL_8)
1600  *bits = 8;
1601  else
1602  *bits = 7;
1603 
1604  mr = UART_GET_MR(port) & ATMEL_US_PAR;
1605  if (mr == ATMEL_US_PAR_EVEN)
1606  *parity = 'e';
1607  else if (mr == ATMEL_US_PAR_ODD)
1608  *parity = 'o';
1609 
1610  /*
1611  * The serial core only rounds down when matching this to a
1612  * supported baud rate. Make sure we don't end up slightly
1613  * lower than one of those, as it would make us fall through
1614  * to a much lower baud rate than we really want.
1615  */
1616  *baud = port->uartclk / (16 * (quot - 1));
1617 }
1618 
1619 static int __init atmel_console_setup(struct console *co, char *options)
1620 {
1621  struct uart_port *port = &atmel_ports[co->index].uart;
1622  int baud = 115200;
1623  int bits = 8;
1624  int parity = 'n';
1625  int flow = 'n';
1626 
1627  if (port->membase == NULL) {
1628  /* Port not initialized yet - delay setup */
1629  return -ENODEV;
1630  }
1631 
1632  clk_enable(atmel_ports[co->index].clk);
1633 
1634  UART_PUT_IDR(port, -1);
1637 
1638  if (options)
1639  uart_parse_options(options, &baud, &parity, &bits, &flow);
1640  else
1641  atmel_console_get_options(port, &baud, &parity, &bits);
1642 
1643  return uart_set_options(port, co, baud, parity, bits, flow);
1644 }
1645 
1646 static struct uart_driver atmel_uart;
1647 
1648 static struct console atmel_console = {
1650  .write = atmel_console_write,
1651  .device = uart_console_device,
1652  .setup = atmel_console_setup,
1653  .flags = CON_PRINTBUFFER,
1654  .index = -1,
1655  .data = &atmel_uart,
1656 };
1657 
1658 #define ATMEL_CONSOLE_DEVICE (&atmel_console)
1659 
1660 /*
1661  * Early console initialization (before VM subsystem initialized).
1662  */
1663 static int __init atmel_console_init(void)
1664 {
1665  if (atmel_default_console_device) {
1666  struct atmel_uart_data *pdata =
1667  atmel_default_console_device->dev.platform_data;
1668  int id = pdata->num;
1669  struct atmel_uart_port *port = &atmel_ports[id];
1670 
1671  port->backup_imr = 0;
1672  port->uart.line = id;
1673 
1675  atmel_init_port(port, atmel_default_console_device);
1676  register_console(&atmel_console);
1677  }
1678 
1679  return 0;
1680 }
1681 
1682 console_initcall(atmel_console_init);
1683 
1684 /*
1685  * Late console initialization.
1686  */
1687 static int __init atmel_late_console_init(void)
1688 {
1689  if (atmel_default_console_device
1690  && !(atmel_console.flags & CON_ENABLED))
1691  register_console(&atmel_console);
1692 
1693  return 0;
1694 }
1695 
1696 core_initcall(atmel_late_console_init);
1697 
1698 static inline bool atmel_is_console_port(struct uart_port *port)
1699 {
1700  return port->cons && port->cons->index == port->line;
1701 }
1702 
1703 #else
1704 #define ATMEL_CONSOLE_DEVICE NULL
1705 
1706 static inline bool atmel_is_console_port(struct uart_port *port)
1707 {
1708  return false;
1709 }
1710 #endif
1711 
1712 static struct uart_driver atmel_uart = {
1713  .owner = THIS_MODULE,
1714  .driver_name = "atmel_serial",
1715  .dev_name = ATMEL_DEVICENAME,
1716  .major = SERIAL_ATMEL_MAJOR,
1717  .minor = MINOR_START,
1718  .nr = ATMEL_MAX_UART,
1719  .cons = ATMEL_CONSOLE_DEVICE,
1720 };
1721 
1722 #ifdef CONFIG_PM
1723 static bool atmel_serial_clk_will_stop(void)
1724 {
1725 #ifdef CONFIG_ARCH_AT91
1727 #else
1728  return false;
1729 #endif
1730 }
1731 
1732 static int atmel_serial_suspend(struct platform_device *pdev,
1733  pm_message_t state)
1734 {
1735  struct uart_port *port = platform_get_drvdata(pdev);
1736  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1737 
1738  if (atmel_is_console_port(port) && console_suspend_enabled) {
1739  /* Drain the TX shifter */
1740  while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
1741  cpu_relax();
1742  }
1743 
1744  /* we can not wake up if we're running on slow clock */
1745  atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
1746  if (atmel_serial_clk_will_stop())
1747  device_set_wakeup_enable(&pdev->dev, 0);
1748 
1749  uart_suspend_port(&atmel_uart, port);
1750 
1751  return 0;
1752 }
1753 
1754 static int atmel_serial_resume(struct platform_device *pdev)
1755 {
1756  struct uart_port *port = platform_get_drvdata(pdev);
1757  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1758 
1759  uart_resume_port(&atmel_uart, port);
1760  device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
1761 
1762  return 0;
1763 }
1764 #else
1765 #define atmel_serial_suspend NULL
1766 #define atmel_serial_resume NULL
1767 #endif
1768 
1769 static int __devinit atmel_serial_probe(struct platform_device *pdev)
1770 {
1771  struct atmel_uart_port *port;
1772  struct device_node *np = pdev->dev.of_node;
1773  struct atmel_uart_data *pdata = pdev->dev.platform_data;
1774  void *data;
1775  int ret = -ENODEV;
1776 
1778 
1779  if (np)
1780  ret = of_alias_get_id(np, "serial");
1781  else
1782  if (pdata)
1783  ret = pdata->num;
1784 
1785  if (ret < 0)
1786  /* port id not found in platform data nor device-tree aliases:
1787  * auto-enumerate it */
1788  ret = find_first_zero_bit(&atmel_ports_in_use,
1789  sizeof(atmel_ports_in_use));
1790 
1791  if (ret > ATMEL_MAX_UART) {
1792  ret = -ENODEV;
1793  goto err;
1794  }
1795 
1796  if (test_and_set_bit(ret, &atmel_ports_in_use)) {
1797  /* port already in use */
1798  ret = -EBUSY;
1799  goto err;
1800  }
1801 
1802  port = &atmel_ports[ret];
1803  port->backup_imr = 0;
1804  port->uart.line = ret;
1805 
1806  atmel_init_port(port, pdev);
1807 
1808  if (!atmel_use_dma_rx(&port->uart)) {
1809  ret = -ENOMEM;
1810  data = kmalloc(sizeof(struct atmel_uart_char)
1812  if (!data)
1813  goto err_alloc_ring;
1814  port->rx_ring.buf = data;
1815  }
1816 
1817  ret = uart_add_one_port(&atmel_uart, &port->uart);
1818  if (ret)
1819  goto err_add_port;
1820 
1821 #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1822  if (atmel_is_console_port(&port->uart)
1823  && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
1824  /*
1825  * The serial core enabled the clock for us, so undo
1826  * the clk_enable() in atmel_console_setup()
1827  */
1828  clk_disable(port->clk);
1829  }
1830 #endif
1831 
1832  device_init_wakeup(&pdev->dev, 1);
1833  platform_set_drvdata(pdev, port);
1834 
1835  if (port->rs485.flags & SER_RS485_ENABLED) {
1837  UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
1838  }
1839 
1840  return 0;
1841 
1842 err_add_port:
1843  kfree(port->rx_ring.buf);
1844  port->rx_ring.buf = NULL;
1845 err_alloc_ring:
1846  if (!atmel_is_console_port(&port->uart)) {
1847  clk_put(port->clk);
1848  port->clk = NULL;
1849  }
1850 err:
1851  return ret;
1852 }
1853 
1854 static int __devexit atmel_serial_remove(struct platform_device *pdev)
1855 {
1856  struct uart_port *port = platform_get_drvdata(pdev);
1857  struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1858  int ret = 0;
1859 
1860  device_init_wakeup(&pdev->dev, 0);
1861  platform_set_drvdata(pdev, NULL);
1862 
1863  ret = uart_remove_one_port(&atmel_uart, port);
1864 
1865  tasklet_kill(&atmel_port->tasklet);
1866  kfree(atmel_port->rx_ring.buf);
1867 
1868  /* "port" is allocated statically, so we shouldn't free it */
1869 
1870  clear_bit(port->line, &atmel_ports_in_use);
1871 
1872  clk_put(atmel_port->clk);
1873 
1874  return ret;
1875 }
1876 
1877 static struct platform_driver atmel_serial_driver = {
1878  .probe = atmel_serial_probe,
1879  .remove = __devexit_p(atmel_serial_remove),
1880  .suspend = atmel_serial_suspend,
1881  .resume = atmel_serial_resume,
1882  .driver = {
1883  .name = "atmel_usart",
1884  .owner = THIS_MODULE,
1885  .of_match_table = of_match_ptr(atmel_serial_dt_ids),
1886  },
1887 };
1888 
1889 static int __init atmel_serial_init(void)
1890 {
1891  int ret;
1892 
1893  ret = uart_register_driver(&atmel_uart);
1894  if (ret)
1895  return ret;
1896 
1897  ret = platform_driver_register(&atmel_serial_driver);
1898  if (ret)
1899  uart_unregister_driver(&atmel_uart);
1900 
1901  return ret;
1902 }
1903 
1904 static void __exit atmel_serial_exit(void)
1905 {
1906  platform_driver_unregister(&atmel_serial_driver);
1907  uart_unregister_driver(&atmel_uart);
1908 }
1909 
1910 module_init(atmel_serial_init);
1911 module_exit(atmel_serial_exit);
1912 
1913 MODULE_AUTHOR("Rick Bronson");
1914 MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
1915 MODULE_LICENSE("GPL");
1916 MODULE_ALIAS("platform:atmel_usart");