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Data Structures | Macros | Enumerations
atp.h File Reference
#include <linux/if_ether.h>
#include <linux/types.h>

Go to the source code of this file.

Data Structures

struct  rx_header
 

Macros

#define PAR_DATA   0
 
#define PAR_STATUS   1
 
#define PAR_CONTROL   2
 
#define Ctrl_LNibRead   0x08 /* LP_PSELECP */
 
#define Ctrl_HNibRead   0
 
#define Ctrl_LNibWrite   0x08 /* LP_PSELECP */
 
#define Ctrl_HNibWrite   0
 
#define Ctrl_SelData   0x04 /* LP_PINITP */
 
#define Ctrl_IRQEN   0x10 /* LP_PINTEN */
 
#define EOW   0xE0
 
#define EOC   0xE0
 
#define WrAddr   0x40 /* Set address of EPLC read, write register. */
 
#define RdAddr   0xC0
 
#define HNib   0x10
 
#define ISR_TxOK   0x01
 
#define ISR_RxOK   0x04
 
#define ISR_TxErr   0x02
 
#define ISRh_RxErr   0x11 /* ISR, high nibble */
 
#define CMR1h_MUX   0x08 /* Select printer multiplexor on 8012. */
 
#define CMR1h_RESET   0x04 /* Reset. */
 
#define CMR1h_RxENABLE   0x02 /* Rx unit enable. */
 
#define CMR1h_TxENABLE   0x01 /* Tx unit enable. */
 
#define CMR1h_TxRxOFF   0x00
 
#define CMR1_ReXmit   0x08 /* Trigger a retransmit. */
 
#define CMR1_Xmit   0x04 /* Trigger a transmit. */
 
#define CMR1_IRQ   0x02 /* Interrupt active. */
 
#define CMR1_BufEnb   0x01 /* Enable the buffer(?). */
 
#define CMR1_NextPkt   0x01 /* Enable the buffer(?). */
 
#define CMR2_NULL   8
 
#define CMR2_IRQOUT   9
 
#define CMR2_RAMTEST   10
 
#define CMR2_EEPROM   12 /* Set to page 1, for reading the EEPROM. */
 
#define CMR2h_OFF   0 /* No accept mode. */
 
#define CMR2h_Physical   1 /* Accept a physical address match only. */
 
#define CMR2h_Normal   2 /* Accept physical and broadcast address. */
 
#define CMR2h_PROMISC   3 /* Promiscuous mode. */
 
#define EE_SHIFT_CLK   0x04 /* EEPROM shift clock. */
 
#define EE_CS   0x02 /* EEPROM chip select. */
 
#define EE_CLK_HIGH   0x12
 
#define EE_CLK_LOW   0x16
 
#define EE_DATA_WRITE   0x01 /* EEPROM chip data in. */
 
#define EE_DATA_READ   0x08 /* EEPROM chip data out. */
 
#define eeprom_delay(ticks)   do { int _i = 40; while (--_i > 0) { __SLOW_DOWN_IO; }} while (0)
 
#define EE_WRITE_CMD(offset)   (((5 << 6) + (offset)) << 17)
 
#define EE_READ(offset)   (((6 << 6) + (offset)) << 17)
 
#define EE_ERASE(offset)   (((7 << 6) + (offset)) << 17)
 
#define EE_CMD_SIZE   27 /* The command+address+data size. */
 

Enumerations

enum  chip_type {
  chip_504x, chip_508x, chip_5080, chip_604x,
  chip_608x, chip_6042, chip_7042, chip_soc,
  RTL8002, RTL8012, CHIP_TYPE_VT6110 = 1, unknown = 0x00,
  tmc1800 = 0x01, tmc18c50 = 0x02, tmc18c30 = 0x03
}
 
enum  page0_regs {
  PAR0 = 0, PAR1 = 1, PAR2 = 2, PAR3 = 3,
  PAR4 = 4, PAR5 = 5, TxCNT0 = 6, TxCNT1 = 7,
  TxSTAT = 8, RxSTAT = 9, ISR = 10, IMR = 11,
  CMR1 = 12, CMR2 = 13, MODSEL = 14, MAR = 14,
  CMR2_h = 0x1d
}
 
enum  eepage_regs { PROM_CMD = 6, PROM_DATA = 7 }
 

Macro Definition Documentation

#define CMR1_BufEnb   0x01 /* Enable the buffer(?). */

Definition at line 64 of file atp.h.

#define CMR1_IRQ   0x02 /* Interrupt active. */

Definition at line 63 of file atp.h.

#define CMR1_NextPkt   0x01 /* Enable the buffer(?). */

Definition at line 65 of file atp.h.

#define CMR1_ReXmit   0x08 /* Trigger a retransmit. */

Definition at line 61 of file atp.h.

#define CMR1_Xmit   0x04 /* Trigger a transmit. */

Definition at line 62 of file atp.h.

#define CMR1h_MUX   0x08 /* Select printer multiplexor on 8012. */

Definition at line 56 of file atp.h.

#define CMR1h_RESET   0x04 /* Reset. */

Definition at line 57 of file atp.h.

#define CMR1h_RxENABLE   0x02 /* Rx unit enable. */

Definition at line 58 of file atp.h.

#define CMR1h_TxENABLE   0x01 /* Tx unit enable. */

Definition at line 59 of file atp.h.

#define CMR1h_TxRxOFF   0x00

Definition at line 60 of file atp.h.

#define CMR2_EEPROM   12 /* Set to page 1, for reading the EEPROM. */

Definition at line 70 of file atp.h.

#define CMR2_IRQOUT   9

Definition at line 68 of file atp.h.

#define CMR2_NULL   8

Definition at line 67 of file atp.h.

#define CMR2_RAMTEST   10

Definition at line 69 of file atp.h.

#define CMR2h_Normal   2 /* Accept physical and broadcast address. */

Definition at line 74 of file atp.h.

#define CMR2h_OFF   0 /* No accept mode. */

Definition at line 72 of file atp.h.

#define CMR2h_Physical   1 /* Accept a physical address match only. */

Definition at line 73 of file atp.h.

#define CMR2h_PROMISC   3 /* Promiscuous mode. */

Definition at line 75 of file atp.h.

#define Ctrl_HNibRead   0

Definition at line 22 of file atp.h.

#define Ctrl_HNibWrite   0

Definition at line 24 of file atp.h.

#define Ctrl_IRQEN   0x10 /* LP_PINTEN */

Definition at line 26 of file atp.h.

#define Ctrl_LNibRead   0x08 /* LP_PSELECP */

Definition at line 21 of file atp.h.

#define Ctrl_LNibWrite   0x08 /* LP_PSELECP */

Definition at line 23 of file atp.h.

#define Ctrl_SelData   0x04 /* LP_PINITP */

Definition at line 25 of file atp.h.

#define EE_CLK_HIGH   0x12

Definition at line 246 of file atp.h.

#define EE_CLK_LOW   0x16

Definition at line 247 of file atp.h.

#define EE_CMD_SIZE   27 /* The command+address+data size. */

Definition at line 259 of file atp.h.

#define EE_CS   0x02 /* EEPROM chip select. */

Definition at line 245 of file atp.h.

#define EE_DATA_READ   0x08 /* EEPROM chip data out. */

Definition at line 249 of file atp.h.

#define EE_DATA_WRITE   0x01 /* EEPROM chip data in. */

Definition at line 248 of file atp.h.

#define EE_ERASE (   offset)    (((7 << 6) + (offset)) << 17)

Definition at line 258 of file atp.h.

#define EE_READ (   offset)    (((6 << 6) + (offset)) << 17)

Definition at line 257 of file atp.h.

#define EE_SHIFT_CLK   0x04 /* EEPROM shift clock. */

Definition at line 244 of file atp.h.

#define EE_WRITE_CMD (   offset)    (((5 << 6) + (offset)) << 17)

Definition at line 256 of file atp.h.

#define eeprom_delay (   ticks)    do { int _i = 40; while (--_i > 0) { __SLOW_DOWN_IO; }} while (0)

Definition at line 252 of file atp.h.

#define EOC   0xE0

Definition at line 29 of file atp.h.

#define EOW   0xE0

Definition at line 28 of file atp.h.

#define HNib   0x10

Definition at line 32 of file atp.h.

#define ISR_RxOK   0x04

Definition at line 52 of file atp.h.

#define ISR_TxErr   0x02

Definition at line 53 of file atp.h.

#define ISR_TxOK   0x01

Definition at line 51 of file atp.h.

#define ISRh_RxErr   0x11 /* ISR, high nibble */

Definition at line 54 of file atp.h.

#define PAR_CONTROL   2

Definition at line 17 of file atp.h.

#define PAR_DATA   0

Definition at line 15 of file atp.h.

#define PAR_STATUS   1

Definition at line 16 of file atp.h.

#define RdAddr   0xC0

Definition at line 31 of file atp.h.

#define WrAddr   0x40 /* Set address of EPLC read, write register. */

Definition at line 30 of file atp.h.

Enumeration Type Documentation

enum chip_type
Enumerator:
chip_504x 
chip_508x 
chip_5080 
chip_604x 
chip_608x 
chip_6042 
chip_7042 
chip_soc 
RTL8002 
RTL8012 
CHIP_TYPE_VT6110 
unknown 
tmc1800 
tmc18c50 
tmc18c30 

Definition at line 19 of file atp.h.

Enumerator:
PROM_CMD 
PROM_DATA 

Definition at line 47 of file atp.h.

enum page0_regs
Enumerator:
PAR0 
PAR1 
PAR2 
PAR3 
PAR4 
PAR5 
TxCNT0 
TxCNT1 
TxSTAT 
RxSTAT 
ISR 
IMR 
CMR1 
CMR2 
MODSEL 
MAR 
CMR2_h 

Definition at line 34 of file atp.h.