Linux Kernel
3.7.1
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Data Structures | |
struct | dma_chan |
Macros | |
#define | NUM_AU1000_DMA_CHANNELS 8 |
#define | DMA_MODE_SET 0x00000000 |
#define | DMA_MODE_READ DMA_MODE_SET |
#define | DMA_MODE_CLEAR 0x00000004 |
#define | DMA_DAH_MASK (0x0f << 20) |
#define | DMA_DID_BIT 16 |
#define | DMA_DID_MASK (0x0f << DMA_DID_BIT) |
#define | DMA_DS (1 << 15) |
#define | DMA_BE (1 << 13) |
#define | DMA_DR (1 << 12) |
#define | DMA_TS8 (1 << 11) |
#define | DMA_DW_BIT 9 |
#define | DMA_DW_MASK (0x03 << DMA_DW_BIT) |
#define | DMA_DW8 (0 << DMA_DW_BIT) |
#define | DMA_DW16 (1 << DMA_DW_BIT) |
#define | DMA_DW32 (2 << DMA_DW_BIT) |
#define | DMA_NC (1 << 8) |
#define | DMA_IE (1 << 7) |
#define | DMA_HALT (1 << 6) |
#define | DMA_GO (1 << 5) |
#define | DMA_AB (1 << 4) |
#define | DMA_D1 (1 << 3) |
#define | DMA_BE1 (1 << 2) |
#define | DMA_D0 (1 << 1) |
#define | DMA_BE0 (1 << 0) |
#define | DMA_PERIPHERAL_ADDR 0x00000008 |
#define | DMA_BUFFER0_START 0x0000000C |
#define | DMA_BUFFER1_START 0x00000014 |
#define | DMA_BUFFER0_COUNT 0x00000010 |
#define | DMA_BUFFER1_COUNT 0x00000018 |
#define | DMA_BAH_BIT 16 |
#define | DMA_BAH_MASK (0x0f << DMA_BAH_BIT) |
#define | DMA_COUNT_BIT 0 |
#define | DMA_COUNT_MASK (0xffff << DMA_COUNT_BIT) |
#define | DMA_HALT_POLL 0x5000 |
Functions | |
int | request_au1000_dma (int dev_id, const char *dev_str, irq_handler_t irqhandler, unsigned long irqflags, void *irq_dev_id) |
void | free_au1000_dma (unsigned int dmanr) |
int | au1000_dma_read_proc (char *buf, char **start, off_t fpos, int length, int *eof, void *data) |
void | dump_au1000_dma_channel (unsigned int dmanr) |
Variables | |
struct dma_chan | au1000_dma_table [] |
spinlock_t | au1000_dma_spin_lock |
#define DMA_AB (1 << 4) |
Definition at line 60 of file au1000_dma.h.
#define DMA_BAH_BIT 16 |
Definition at line 71 of file au1000_dma.h.
#define DMA_BAH_MASK (0x0f << DMA_BAH_BIT) |
Definition at line 72 of file au1000_dma.h.
#define DMA_BE (1 << 13) |
Definition at line 48 of file au1000_dma.h.
#define DMA_BE0 (1 << 0) |
Definition at line 64 of file au1000_dma.h.
#define DMA_BE1 (1 << 2) |
Definition at line 62 of file au1000_dma.h.
#define DMA_BUFFER0_COUNT 0x00000010 |
Definition at line 69 of file au1000_dma.h.
#define DMA_BUFFER0_START 0x0000000C |
Definition at line 67 of file au1000_dma.h.
#define DMA_BUFFER1_COUNT 0x00000018 |
Definition at line 70 of file au1000_dma.h.
#define DMA_BUFFER1_START 0x00000014 |
Definition at line 68 of file au1000_dma.h.
#define DMA_COUNT_BIT 0 |
Definition at line 73 of file au1000_dma.h.
#define DMA_COUNT_MASK (0xffff << DMA_COUNT_BIT) |
Definition at line 74 of file au1000_dma.h.
#define DMA_D0 (1 << 1) |
Definition at line 63 of file au1000_dma.h.
#define DMA_D1 (1 << 3) |
Definition at line 61 of file au1000_dma.h.
#define DMA_DAH_MASK (0x0f << 20) |
Definition at line 44 of file au1000_dma.h.
#define DMA_DID_BIT 16 |
Definition at line 45 of file au1000_dma.h.
#define DMA_DID_MASK (0x0f << DMA_DID_BIT) |
Definition at line 46 of file au1000_dma.h.
#define DMA_DR (1 << 12) |
Definition at line 49 of file au1000_dma.h.
#define DMA_DS (1 << 15) |
Definition at line 47 of file au1000_dma.h.
#define DMA_DW16 (1 << DMA_DW_BIT) |
Definition at line 54 of file au1000_dma.h.
#define DMA_DW32 (2 << DMA_DW_BIT) |
Definition at line 55 of file au1000_dma.h.
#define DMA_DW8 (0 << DMA_DW_BIT) |
Definition at line 53 of file au1000_dma.h.
#define DMA_DW_BIT 9 |
Definition at line 51 of file au1000_dma.h.
#define DMA_DW_MASK (0x03 << DMA_DW_BIT) |
Definition at line 52 of file au1000_dma.h.
#define DMA_GO (1 << 5) |
Definition at line 59 of file au1000_dma.h.
#define DMA_HALT (1 << 6) |
Definition at line 58 of file au1000_dma.h.
#define DMA_HALT_POLL 0x5000 |
Definition at line 189 of file au1000_dma.h.
#define DMA_IE (1 << 7) |
Definition at line 57 of file au1000_dma.h.
#define DMA_MODE_CLEAR 0x00000004 |
Definition at line 42 of file au1000_dma.h.
#define DMA_MODE_READ DMA_MODE_SET |
Definition at line 41 of file au1000_dma.h.
#define DMA_MODE_SET 0x00000000 |
Definition at line 40 of file au1000_dma.h.
#define DMA_NC (1 << 8) |
Definition at line 56 of file au1000_dma.h.
#define DMA_PERIPHERAL_ADDR 0x00000008 |
Definition at line 66 of file au1000_dma.h.
#define DMA_TS8 (1 << 11) |
Definition at line 50 of file au1000_dma.h.
#define NUM_AU1000_DMA_CHANNELS 8 |
Definition at line 37 of file au1000_dma.h.
anonymous enum |
Definition at line 77 of file au1000_dma.h.
anonymous enum |
Definition at line 98 of file au1000_dma.h.
spinlock_t au1000_dma_spin_lock |