Data Structures
struct	be_eq_entry

struct	be_eth_wrb

struct	amap_eth_hdr_wrb

struct	be_eth_hdr_wrb

struct	amap_eth_tx_compl

struct	be_eth_tx_compl

struct	be_eth_rx_d

struct	amap_eth_rx_compl_v0

struct	amap_eth_rx_compl_v1

struct	be_eth_rx_compl

struct	mgmt_hba_attribs

struct	mgmt_controller_attrib

struct	controller_id

struct	flash_comp

struct	image_hdr

struct	flash_file_hdr_g2

struct	flash_file_hdr_g3

struct	flash_section_hdr

struct	flash_section_hdr_g2

struct	flash_section_entry

struct	flash_section_info

struct	flash_section_info_g2

Macros
#define	MPU_MAILBOX_DB_OFFSET 0x160

#define	MPU_MAILBOX_DB_RDY_MASK 0x1 /* bit 0 */

#define	MPU_MAILBOX_DB_HI_MASK 0x2 /* bit 1 */

#define	MPU_EP_CONTROL 0

#define	MPU_EP_SEMAPHORE_OFFSET 0xac

#define	MPU_EP_SEMAPHORE_IF_TYPE2_OFFSET 0x400

#define	EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF

#define	EP_SEMAPHORE_POST_ERR_MASK 0x1

#define	EP_SEMAPHORE_POST_ERR_SHIFT 31

#define	POST_STAGE_AWAITING_HOST_RDY 0x1 /* FW awaiting goahead from host */

#define	POST_STAGE_HOST_RDY 0x2 /* Host has given go-ahed to FW */

#define	POST_STAGE_BE_RESET 0x3 /* Host wants to reset chip */

#define	POST_STAGE_ARMFW_RDY 0xc000 /* FW is done with POST */

#define	SLIPORT_STATUS_OFFSET 0x404

#define	SLIPORT_CONTROL_OFFSET 0x408

#define	SLIPORT_ERROR1_OFFSET 0x40C

#define	SLIPORT_ERROR2_OFFSET 0x410

#define	PHYSDEV_CONTROL_OFFSET 0x414

#define	SLIPORT_STATUS_ERR_MASK 0x80000000

#define	SLIPORT_STATUS_RN_MASK 0x01000000

#define	SLIPORT_STATUS_RDY_MASK 0x00800000

#define	SLI_PORT_CONTROL_IP_MASK 0x08000000

#define	PHYSDEV_CONTROL_FW_RESET_MASK 0x00000002

#define	PHYSDEV_CONTROL_INP_MASK 0x40000000

#define	PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc

#define	MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */

#define	PCICFG_PM_CONTROL_OFFSET 0x44

#define	PCICFG_PM_CONTROL_MASK 0x108 /* bits 3 & 8 */

#define	PCICFG_ONLINE0 0xB0

#define	PCICFG_ONLINE1 0xB4

#define	PCICFG_UE_STATUS_LOW 0xA0

#define	PCICFG_UE_STATUS_HIGH 0xA4

#define	PCICFG_UE_STATUS_LOW_MASK 0xA8

#define	PCICFG_UE_STATUS_HI_MASK 0xAC

#define	SLI_INTF_REG_OFFSET 0x58

#define	SLI_INTF_VALID_MASK 0xE0000000

#define	SLI_INTF_VALID 0xC0000000

#define	SLI_INTF_HINT2_MASK 0x1F000000

#define	SLI_INTF_HINT2_SHIFT 24

#define	SLI_INTF_HINT1_MASK 0x00FF0000

#define	SLI_INTF_HINT1_SHIFT 16

#define	SLI_INTF_FAMILY_MASK 0x00000F00

#define	SLI_INTF_FAMILY_SHIFT 8

#define	SLI_INTF_IF_TYPE_MASK 0x0000F000

#define	SLI_INTF_IF_TYPE_SHIFT 12

#define	SLI_INTF_REV_MASK 0x000000F0

#define	SLI_INTF_REV_SHIFT 4

#define	SLI_INTF_FT_MASK 0x00000001

#define	SLI_INTF_TYPE_2 2

#define	SLI_INTF_TYPE_3 3

#define	BE_SLI_FAMILY 0x0

#define	LANCER_A0_SLI_FAMILY 0xA

#define	SKYHAWK_SLI_FAMILY 0x2

#define	CEV_ISR0_OFFSET 0xC18

#define	CEV_ISR_SIZE 4

#define	DB_EQ_OFFSET DB_CQ_OFFSET

#define	DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */

#define	DB_EQ_RING_ID_EXT_MASK 0x3e00 /* bits 9-13 */

#define	DB_EQ_RING_ID_EXT_MASK_SHIFT (2) /* qid bits 9-13 placing at 11-15 */

#define	DB_EQ_CLR_SHIFT (9) /* bit 9 */

#define	DB_EQ_EVNT_SHIFT (10) /* bit 10 */

#define	DB_EQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */

#define	DB_EQ_REARM_SHIFT (29) /* bit 29 */

#define	DB_CQ_OFFSET 0x120

#define	DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */

#define	DB_CQ_RING_ID_EXT_MASK 0x7C00 /* bits 10-14 */

#define	DB_CQ_RING_ID_EXT_MASK_SHIFT

#define	DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */

#define	DB_CQ_REARM_SHIFT (29) /* bit 29 */

#define	DB_TXULP1_OFFSET 0x60

#define	DB_TXULP_RING_ID_MASK 0x7FF /* bits 0 - 10 */

#define	DB_TXULP_NUM_POSTED_SHIFT (16) /* bits 16 - 29 */

#define	DB_TXULP_NUM_POSTED_MASK 0x3FFF /* bits 16 - 29 */

#define	DB_RQ_OFFSET 0x100

#define	DB_RQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */

#define	DB_RQ_NUM_POSTED_SHIFT (24) /* bits 24 - 31 */

#define	DB_MCCQ_OFFSET 0x140

#define	DB_MCCQ_RING_ID_MASK 0x7FF /* bits 0 - 10 */

#define	DB_MCCQ_NUM_POSTED_SHIFT (16) /* bits 16 - 29 */

#define	SRIOV_VF_PCICFG_OFFSET (4096)

#define	RETRIEVE_FAT 0

#define	QUERY_FAT 1

#define	MAX_FLASH_COMP 32

#define	IMAGE_TYPE_FIRMWARE 160

#define	IMAGE_TYPE_BOOTCODE 224

#define	IMAGE_TYPE_OPTIONROM 32

#define	NUM_FLASHDIR_ENTRIES 32

#define	OPTYPE_ISCSI_ACTIVE 0

#define	OPTYPE_REDBOOT 1

#define	OPTYPE_BIOS 2

#define	OPTYPE_PXE_BIOS 3

#define	OPTYPE_FCOE_BIOS 8

#define	OPTYPE_ISCSI_BACKUP 9

#define	OPTYPE_FCOE_FW_ACTIVE 10

#define	OPTYPE_FCOE_FW_BACKUP 11

#define	OPTYPE_NCSI_FW 13

#define	OPTYPE_PHY_FW 99

#define	TN_8022 13

#define	ILLEGAL_IOCTL_REQ 2

#define	FLASHROM_OPER_PHY_FLASH 9

#define	FLASHROM_OPER_PHY_SAVE 10

#define	FLASHROM_OPER_FLASH 1

#define	FLASHROM_OPER_SAVE 2

#define	FLASHROM_OPER_REPORT 4

#define	FLASH_IMAGE_MAX_SIZE_g2 (1310720) /* Max firmware image size */

#define	FLASH_BIOS_IMAGE_MAX_SIZE_g2 (262144) /* Max OPTION ROM image sz */

#define	FLASH_REDBOOT_IMAGE_MAX_SIZE_g2 (262144) /* Max Redboot image sz */

#define	FLASH_IMAGE_MAX_SIZE_g3 (2097152) /* Max firmware image size */

#define	FLASH_BIOS_IMAGE_MAX_SIZE_g3 (524288) /* Max OPTION ROM image sz */

#define	FLASH_REDBOOT_IMAGE_MAX_SIZE_g3 (1048576) /* Max Redboot image sz */

#define	FLASH_NCSI_IMAGE_MAX_SIZE_g3 (262144)

#define	FLASH_PHY_FW_IMAGE_MAX_SIZE_g3 262144

#define	FLASH_NCSI_MAGIC (0x16032009)

#define	FLASH_NCSI_DISABLED (0)

#define	FLASH_NCSI_ENABLED (1)

#define	FLASH_NCSI_BITFILE_HDR_OFFSET (0x600000)

#define	FLASH_iSCSI_PRIMARY_IMAGE_START_g2 (1048576)

#define	FLASH_iSCSI_BACKUP_IMAGE_START_g2 (2359296)

#define	FLASH_FCoE_PRIMARY_IMAGE_START_g2 (3670016)

#define	FLASH_FCoE_BACKUP_IMAGE_START_g2 (4980736)

#define	FLASH_iSCSI_BIOS_START_g2 (7340032)

#define	FLASH_PXE_BIOS_START_g2 (7864320)

#define	FLASH_FCoE_BIOS_START_g2 (524288)

#define	FLASH_REDBOOT_START_g2 (0)

#define	FLASH_NCSI_START_g3 (15990784)

#define	FLASH_iSCSI_PRIMARY_IMAGE_START_g3 (2097152)

#define	FLASH_iSCSI_BACKUP_IMAGE_START_g3 (4194304)

#define	FLASH_FCoE_PRIMARY_IMAGE_START_g3 (6291456)

#define	FLASH_FCoE_BACKUP_IMAGE_START_g3 (8388608)

#define	FLASH_iSCSI_BIOS_START_g3 (12582912)

#define	FLASH_PXE_BIOS_START_g3 (13107200)

#define	FLASH_FCoE_BIOS_START_g3 (13631488)

#define	FLASH_REDBOOT_START_g3 (262144)

#define	FLASH_PHY_FW_START_g3 1310720

#define	IMAGE_NCSI 16

#define	IMAGE_OPTION_ROM_PXE 32

#define	IMAGE_OPTION_ROM_FCoE 33

#define	IMAGE_OPTION_ROM_ISCSI 34

#define	IMAGE_FLASHISM_JUMPVECTOR 48

#define	IMAGE_FLASH_ISM 49

#define	IMAGE_JUMP_VECTOR 50

#define	IMAGE_FIRMWARE_iSCSI 160

#define	IMAGE_FIRMWARE_COMP_iSCSI 161

#define	IMAGE_FIRMWARE_FCoE 162

#define	IMAGE_FIRMWARE_COMP_FCoE 163

#define	IMAGE_FIRMWARE_BACKUP_iSCSI 176

#define	IMAGE_FIRMWARE_BACKUP_COMP_iSCSI 177

#define	IMAGE_FIRMWARE_BACKUP_FCoE 178

#define	IMAGE_FIRMWARE_BACKUP_COMP_FCoE 179

#define	IMAGE_FIRMWARE_PHY 192

#define	IMAGE_BOOT_CODE 224

#define	BE_UNICAST_PACKET 0

#define	BE_MULTICAST_PACKET 1

#define	BE_BROADCAST_PACKET 2

#define	BE_RSVD_PACKET 3

#define	EQ_ENTRY_VALID_MASK 0x1 /* bit 0 */

#define	EQ_ENTRY_RES_ID_MASK 0xFFFF /* bits 16 - 31 */

#define	EQ_ENTRY_RES_ID_SHIFT 16

#define	ETH_WRB_FRAG_LEN_MASK 0xFFFF

Variables
struct be_eth_wrb	__packed

Macro Definition Documentation

#define BE_BROADCAST_PACKET 2

Definition at line 250 of file be_hw.h.

#define BE_MULTICAST_PACKET 1

Definition at line 249 of file be_hw.h.

#define BE_RSVD_PACKET 3

Definition at line 251 of file be_hw.h.

#define BE_SLI_FAMILY 0x0

Definition at line 106 of file be_hw.h.

#define BE_UNICAST_PACKET 0

Definition at line 248 of file be_hw.h.

#define CEV_ISR0_OFFSET 0xC18

Definition at line 111 of file be_hw.h.

#define CEV_ISR_SIZE 4

Definition at line 112 of file be_hw.h.

#define DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */

Definition at line 136 of file be_hw.h.

#define DB_CQ_OFFSET 0x120

Definition at line 130 of file be_hw.h.

#define DB_CQ_REARM_SHIFT (29) /* bit 29 */

Definition at line 138 of file be_hw.h.

#define DB_CQ_RING_ID_EXT_MASK 0x7C00 /* bits 10-14 */

Definition at line 132 of file be_hw.h.

#define DB_CQ_RING_ID_EXT_MASK_SHIFT

Value:

(1) /* qid bits 10-14

placing at 11-15 */

Definition at line 133 of file be_hw.h.

#define DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */

Definition at line 131 of file be_hw.h.

#define DB_EQ_CLR_SHIFT (9) /* bit 9 */

Definition at line 121 of file be_hw.h.

#define DB_EQ_EVNT_SHIFT (10) /* bit 10 */

Definition at line 123 of file be_hw.h.

#define DB_EQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */

Definition at line 125 of file be_hw.h.

#define DB_EQ_OFFSET DB_CQ_OFFSET

Definition at line 115 of file be_hw.h.

#define DB_EQ_REARM_SHIFT (29) /* bit 29 */

Definition at line 127 of file be_hw.h.

#define DB_EQ_RING_ID_EXT_MASK 0x3e00 /* bits 9-13 */

Definition at line 117 of file be_hw.h.

#define DB_EQ_RING_ID_EXT_MASK_SHIFT (2) /* qid bits 9-13 placing at 11-15 */

Definition at line 118 of file be_hw.h.

#define DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */

Definition at line 116 of file be_hw.h.

#define DB_MCCQ_NUM_POSTED_SHIFT (16) /* bits 16 - 29 */

Definition at line 157 of file be_hw.h.

#define DB_MCCQ_OFFSET 0x140

Definition at line 154 of file be_hw.h.

#define DB_MCCQ_RING_ID_MASK 0x7FF /* bits 0 - 10 */

Definition at line 155 of file be_hw.h.

#define DB_RQ_NUM_POSTED_SHIFT (24) /* bits 24 - 31 */

Definition at line 151 of file be_hw.h.

#define DB_RQ_OFFSET 0x100

Definition at line 148 of file be_hw.h.

#define DB_RQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */

Definition at line 149 of file be_hw.h.

#define DB_TXULP1_OFFSET 0x60

Definition at line 141 of file be_hw.h.

#define DB_TXULP_NUM_POSTED_MASK 0x3FFF /* bits 16 - 29 */

Definition at line 145 of file be_hw.h.

#define DB_TXULP_NUM_POSTED_SHIFT (16) /* bits 16 - 29 */

Definition at line 144 of file be_hw.h.

#define DB_TXULP_RING_ID_MASK 0x7FF /* bits 0 - 10 */

Definition at line 142 of file be_hw.h.

#define EP_SEMAPHORE_POST_ERR_MASK 0x1

Definition at line 38 of file be_hw.h.

#define EP_SEMAPHORE_POST_ERR_SHIFT 31

Definition at line 39 of file be_hw.h.

#define EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF

Definition at line 37 of file be_hw.h.

#define EQ_ENTRY_RES_ID_MASK 0xFFFF /* bits 16 - 31 */

Definition at line 259 of file be_hw.h.

#define EQ_ENTRY_RES_ID_SHIFT 16

Definition at line 260 of file be_hw.h.

#define EQ_ENTRY_VALID_MASK 0x1 /* bit 0 */

Definition at line 258 of file be_hw.h.

#define ETH_WRB_FRAG_LEN_MASK 0xFFFF

Definition at line 267 of file be_hw.h.

#define FLASH_BIOS_IMAGE_MAX_SIZE_g2 (262144) /* Max OPTION ROM image sz */

Definition at line 194 of file be_hw.h.

#define FLASH_BIOS_IMAGE_MAX_SIZE_g3 (524288) /* Max OPTION ROM image sz */

Definition at line 197 of file be_hw.h.

#define FLASH_FCoE_BACKUP_IMAGE_START_g2 (4980736)

Definition at line 212 of file be_hw.h.

#define FLASH_FCoE_BACKUP_IMAGE_START_g3 (8388608)

Definition at line 222 of file be_hw.h.

#define FLASH_FCoE_BIOS_START_g2 (524288)

Definition at line 215 of file be_hw.h.

#define FLASH_FCoE_BIOS_START_g3 (13631488)

Definition at line 225 of file be_hw.h.

#define FLASH_FCoE_PRIMARY_IMAGE_START_g2 (3670016)

Definition at line 211 of file be_hw.h.

#define FLASH_FCoE_PRIMARY_IMAGE_START_g3 (6291456)

Definition at line 221 of file be_hw.h.

#define FLASH_IMAGE_MAX_SIZE_g2 (1310720) /* Max firmware image size */

Definition at line 193 of file be_hw.h.

#define FLASH_IMAGE_MAX_SIZE_g3 (2097152) /* Max firmware image size */

Definition at line 196 of file be_hw.h.

#define FLASH_iSCSI_BACKUP_IMAGE_START_g2 (2359296)

Definition at line 210 of file be_hw.h.

#define FLASH_iSCSI_BACKUP_IMAGE_START_g3 (4194304)

Definition at line 220 of file be_hw.h.

#define FLASH_iSCSI_BIOS_START_g2 (7340032)

Definition at line 213 of file be_hw.h.

#define FLASH_iSCSI_BIOS_START_g3 (12582912)

Definition at line 223 of file be_hw.h.

#define FLASH_iSCSI_PRIMARY_IMAGE_START_g2 (1048576)

Definition at line 209 of file be_hw.h.

#define FLASH_iSCSI_PRIMARY_IMAGE_START_g3 (2097152)

Definition at line 219 of file be_hw.h.

#define FLASH_NCSI_BITFILE_HDR_OFFSET (0x600000)

Definition at line 206 of file be_hw.h.

#define FLASH_NCSI_DISABLED (0)

Definition at line 203 of file be_hw.h.

#define FLASH_NCSI_ENABLED (1)

Definition at line 204 of file be_hw.h.

#define FLASH_NCSI_IMAGE_MAX_SIZE_g3 (262144)

Definition at line 199 of file be_hw.h.

#define FLASH_NCSI_MAGIC (0x16032009)

Definition at line 202 of file be_hw.h.

#define FLASH_NCSI_START_g3 (15990784)

Definition at line 218 of file be_hw.h.

#define FLASH_PHY_FW_IMAGE_MAX_SIZE_g3 262144

Definition at line 200 of file be_hw.h.

#define FLASH_PHY_FW_START_g3 1310720

Definition at line 227 of file be_hw.h.

#define FLASH_PXE_BIOS_START_g2 (7864320)

Definition at line 214 of file be_hw.h.

#define FLASH_PXE_BIOS_START_g3 (13107200)

Definition at line 224 of file be_hw.h.

#define FLASH_REDBOOT_IMAGE_MAX_SIZE_g2 (262144) /* Max Redboot image sz */

Definition at line 195 of file be_hw.h.

#define FLASH_REDBOOT_IMAGE_MAX_SIZE_g3 (1048576) /* Max Redboot image sz */

Definition at line 198 of file be_hw.h.

#define FLASH_REDBOOT_START_g2 (0)

Definition at line 216 of file be_hw.h.

#define FLASH_REDBOOT_START_g3 (262144)

Definition at line 226 of file be_hw.h.

#define FLASHROM_OPER_FLASH 1

Definition at line 189 of file be_hw.h.

#define FLASHROM_OPER_PHY_FLASH 9

Definition at line 187 of file be_hw.h.

#define FLASHROM_OPER_PHY_SAVE 10

Definition at line 188 of file be_hw.h.

#define FLASHROM_OPER_REPORT 4

Definition at line 191 of file be_hw.h.

#define FLASHROM_OPER_SAVE 2

Definition at line 190 of file be_hw.h.

#define ILLEGAL_IOCTL_REQ 2

Definition at line 186 of file be_hw.h.

#define IMAGE_BOOT_CODE 224

Definition at line 245 of file be_hw.h.

#define IMAGE_FIRMWARE_BACKUP_COMP_FCoE 179

Definition at line 243 of file be_hw.h.

#define IMAGE_FIRMWARE_BACKUP_COMP_iSCSI 177

Definition at line 241 of file be_hw.h.

#define IMAGE_FIRMWARE_BACKUP_FCoE 178

Definition at line 242 of file be_hw.h.

#define IMAGE_FIRMWARE_BACKUP_iSCSI 176

Definition at line 240 of file be_hw.h.

#define IMAGE_FIRMWARE_COMP_FCoE 163

Definition at line 239 of file be_hw.h.

#define IMAGE_FIRMWARE_COMP_iSCSI 161

Definition at line 237 of file be_hw.h.

#define IMAGE_FIRMWARE_FCoE 162

Definition at line 238 of file be_hw.h.

#define IMAGE_FIRMWARE_iSCSI 160

Definition at line 236 of file be_hw.h.

#define IMAGE_FIRMWARE_PHY 192

Definition at line 244 of file be_hw.h.

#define IMAGE_FLASH_ISM 49

Definition at line 234 of file be_hw.h.

#define IMAGE_FLASHISM_JUMPVECTOR 48

Definition at line 233 of file be_hw.h.

#define IMAGE_JUMP_VECTOR 50

Definition at line 235 of file be_hw.h.

#define IMAGE_NCSI 16

Definition at line 229 of file be_hw.h.

#define IMAGE_OPTION_ROM_FCoE 33

Definition at line 231 of file be_hw.h.

#define IMAGE_OPTION_ROM_ISCSI 34

Definition at line 232 of file be_hw.h.

#define IMAGE_OPTION_ROM_PXE 32

Definition at line 230 of file be_hw.h.

#define IMAGE_TYPE_BOOTCODE 224

Definition at line 169 of file be_hw.h.

#define IMAGE_TYPE_FIRMWARE 160

Definition at line 168 of file be_hw.h.

#define IMAGE_TYPE_OPTIONROM 32

Definition at line 170 of file be_hw.h.

#define LANCER_A0_SLI_FAMILY 0xA

Definition at line 107 of file be_hw.h.

#define MAX_FLASH_COMP 32

Definition at line 167 of file be_hw.h.

#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */

Definition at line 70 of file be_hw.h.

#define MPU_EP_CONTROL 0

Definition at line 32 of file be_hw.h.

#define MPU_EP_SEMAPHORE_IF_TYPE2_OFFSET 0x400

Definition at line 36 of file be_hw.h.

#define MPU_EP_SEMAPHORE_OFFSET 0xac

Definition at line 35 of file be_hw.h.

#define MPU_MAILBOX_DB_HI_MASK 0x2 /* bit 1 */

Definition at line 30 of file be_hw.h.

#define MPU_MAILBOX_DB_OFFSET 0x160

Definition at line 28 of file be_hw.h.

#define MPU_MAILBOX_DB_RDY_MASK 0x1 /* bit 0 */

Definition at line 29 of file be_hw.h.

#define NUM_FLASHDIR_ENTRIES 32

Definition at line 172 of file be_hw.h.

#define OPTYPE_BIOS 2

Definition at line 176 of file be_hw.h.

#define OPTYPE_FCOE_BIOS 8

Definition at line 178 of file be_hw.h.

#define OPTYPE_FCOE_FW_ACTIVE 10

Definition at line 180 of file be_hw.h.

#define OPTYPE_FCOE_FW_BACKUP 11

Definition at line 181 of file be_hw.h.

#define OPTYPE_ISCSI_ACTIVE 0

Definition at line 174 of file be_hw.h.

#define OPTYPE_ISCSI_BACKUP 9

Definition at line 179 of file be_hw.h.

#define OPTYPE_NCSI_FW 13

Definition at line 182 of file be_hw.h.

#define OPTYPE_PHY_FW 99

Definition at line 183 of file be_hw.h.

#define OPTYPE_PXE_BIOS 3

Definition at line 177 of file be_hw.h.

#define OPTYPE_REDBOOT 1

Definition at line 175 of file be_hw.h.

#define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc

Definition at line 63 of file be_hw.h.

#define PCICFG_ONLINE0 0xB0

Definition at line 77 of file be_hw.h.

#define PCICFG_ONLINE1 0xB4

Definition at line 78 of file be_hw.h.

#define PCICFG_PM_CONTROL_MASK 0x108 /* bits 3 & 8 */

Definition at line 74 of file be_hw.h.

#define PCICFG_PM_CONTROL_OFFSET 0x44

Definition at line 73 of file be_hw.h.

#define PCICFG_UE_STATUS_HI_MASK 0xAC

Definition at line 84 of file be_hw.h.

#define PCICFG_UE_STATUS_HIGH 0xA4

Definition at line 82 of file be_hw.h.

#define PCICFG_UE_STATUS_LOW 0xA0

Definition at line 81 of file be_hw.h.

#define PCICFG_UE_STATUS_LOW_MASK 0xA8

Definition at line 83 of file be_hw.h.

#define PHYSDEV_CONTROL_FW_RESET_MASK 0x00000002

Definition at line 59 of file be_hw.h.

#define PHYSDEV_CONTROL_INP_MASK 0x40000000

Definition at line 60 of file be_hw.h.

#define PHYSDEV_CONTROL_OFFSET 0x414

Definition at line 53 of file be_hw.h.

#define POST_STAGE_ARMFW_RDY 0xc000 /* FW is done with POST */

Definition at line 45 of file be_hw.h.

#define POST_STAGE_AWAITING_HOST_RDY 0x1 /* FW awaiting goahead from host */

Definition at line 42 of file be_hw.h.

#define POST_STAGE_BE_RESET 0x3 /* Host wants to reset chip */

Definition at line 44 of file be_hw.h.

#define POST_STAGE_HOST_RDY 0x2 /* Host has given go-ahed to FW */

Definition at line 43 of file be_hw.h.

#define QUERY_FAT 1

Definition at line 164 of file be_hw.h.

#define RETRIEVE_FAT 0

Definition at line 163 of file be_hw.h.

#define SKYHAWK_SLI_FAMILY 0x2

Definition at line 108 of file be_hw.h.

#define SLI_INTF_FAMILY_MASK 0x00000F00

Definition at line 94 of file be_hw.h.

#define SLI_INTF_FAMILY_SHIFT 8

Definition at line 95 of file be_hw.h.

#define SLI_INTF_FT_MASK 0x00000001

Definition at line 100 of file be_hw.h.

#define SLI_INTF_HINT1_MASK 0x00FF0000

Definition at line 92 of file be_hw.h.

#define SLI_INTF_HINT1_SHIFT 16

Definition at line 93 of file be_hw.h.

#define SLI_INTF_HINT2_MASK 0x1F000000

Definition at line 90 of file be_hw.h.

#define SLI_INTF_HINT2_SHIFT 24

Definition at line 91 of file be_hw.h.

#define SLI_INTF_IF_TYPE_MASK 0x0000F000

Definition at line 96 of file be_hw.h.

#define SLI_INTF_IF_TYPE_SHIFT 12

Definition at line 97 of file be_hw.h.

#define SLI_INTF_REG_OFFSET 0x58

Definition at line 87 of file be_hw.h.

#define SLI_INTF_REV_MASK 0x000000F0

Definition at line 98 of file be_hw.h.

#define SLI_INTF_REV_SHIFT 4

Definition at line 99 of file be_hw.h.

#define SLI_INTF_TYPE_2 2

Definition at line 102 of file be_hw.h.

#define SLI_INTF_TYPE_3 3

Definition at line 103 of file be_hw.h.

#define SLI_INTF_VALID 0xC0000000

Definition at line 89 of file be_hw.h.

#define SLI_INTF_VALID_MASK 0xE0000000

Definition at line 88 of file be_hw.h.

#define SLI_PORT_CONTROL_IP_MASK 0x08000000

Definition at line 58 of file be_hw.h.

#define SLIPORT_CONTROL_OFFSET 0x408

Definition at line 50 of file be_hw.h.

#define SLIPORT_ERROR1_OFFSET 0x40C

Definition at line 51 of file be_hw.h.

#define SLIPORT_ERROR2_OFFSET 0x410

Definition at line 52 of file be_hw.h.

#define SLIPORT_STATUS_ERR_MASK 0x80000000

Definition at line 55 of file be_hw.h.

#define SLIPORT_STATUS_OFFSET 0x404

Definition at line 49 of file be_hw.h.

#define SLIPORT_STATUS_RDY_MASK 0x00800000

Definition at line 57 of file be_hw.h.

#define SLIPORT_STATUS_RN_MASK 0x01000000

Definition at line 56 of file be_hw.h.

#define SRIOV_VF_PCICFG_OFFSET (4096)

Definition at line 160 of file be_hw.h.

#define TN_8022 13

Definition at line 184 of file be_hw.h.

Variable Documentation

struct flash_section_info_g2 __packed

Data Structures

Macros

Variables

Macro Definition Documentation

Variable Documentation