20 #include <linux/pci.h>
23 static const char *bkm_a4t_revision =
"$Revision: 1.22.2.4 $";
30 unsigned int *po = (
unsigned int *) adr;
37 return ((
unsigned char) ret);
45 for (i = 0; i <
size; i++)
46 *data++ =
readreg(ale, adr, off);
53 unsigned int *po = (
unsigned int *) adr;
62 writefifo(
unsigned int ale,
unsigned long adr,
u_char off,
u_char *data,
int size)
66 for (i = 0; i <
size; i++)
76 return (
readreg(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, offset));
82 writereg(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, offset, value);
86 ReadISACfifo(
struct IsdnCardState *cs,
u_char *data,
int size)
88 readfifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size);
92 WriteISACfifo(
struct IsdnCardState *cs,
u_char *data,
int size)
94 writefifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size);
98 ReadJADE(
struct IsdnCardState *cs,
int jade,
u_char offset)
100 return (
readreg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, offset + (jade == -1 ? 0 : (jade ? 0xC0 : 0x80))));
106 writereg(cs->hw.ax.jade_ale, cs->hw.ax.jade_adr, offset + (jade == -1 ? 0 : (jade ? 0xC0 : 0x80)), value);
113 #define READJADE(cs, nr, reg) readreg(cs->hw.ax.jade_ale, \
114 cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)))
115 #define WRITEJADE(cs, nr, reg, data) writereg(cs->hw.ax.jade_ale, \
116 cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), data)
118 #define READJADEFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.jade_ale, \
119 cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt)
120 #define WRITEJADEFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ax.jade_ale, \
121 cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt)
126 bkm_interrupt(
int intno,
void *
dev_id)
128 struct IsdnCardState *cs =
dev_id;
145 jade_int_main(cs, val, 0);
150 jade_int_main(cs, val, 1);
159 spin_unlock_irqrestore(&cs->lock, flags);
162 spin_unlock_irqrestore(&cs->lock, flags);
168 release_io_bkm(
struct IsdnCardState *cs)
170 if (cs->hw.ax.base) {
171 iounmap((
void *) cs->hw.ax.base);
177 enable_bkm_int(
struct IsdnCardState *cs,
unsigned bEnable)
190 reset_bkm(
struct IsdnCardState *cs)
220 BKM_card_msg(
struct IsdnCardState *cs,
int mt,
void *
arg)
228 enable_bkm_int(cs, 0);
230 spin_unlock_irqrestore(&cs->lock, flags);
235 enable_bkm_int(cs, 0);
237 spin_unlock_irqrestore(&cs->lock, flags);
247 enable_bkm_int(cs, 1);
248 spin_unlock_irqrestore(&cs->lock, flags);
257 struct IsdnCardState *cs,
271 cs->irq = dev_a4t->
irq;
279 struct IsdnCardState *cs,
288 cs->hw.ax.base = (
long)
ioremap(pci_memaddr, 4096);
293 "%lx-%lx suspicious\n",
294 cs->hw.ax.base, cs->hw.ax.base + 4096);
295 iounmap((
void *) cs->hw.ax.base);
299 cs->hw.ax.isac_adr = cs->hw.ax.base +
PO_OFFSET;
300 cs->hw.ax.jade_adr = cs->hw.ax.base +
PO_OFFSET;
301 cs->hw.ax.isac_ale =
GCS_1;
302 cs->hw.ax.jade_ale =
GCS_3;
306 cs->hw.ax.base, cs->irq);
311 cs->readisacfifo = &ReadISACfifo;
312 cs->writeisacfifo = &WriteISACfifo;
313 cs->BC_Read_Reg = &ReadJADE;
314 cs->BC_Write_Reg = &WriteJADE;
315 cs->BC_Send_Data = &jade_fill_fifo;
316 cs->cardmsg = &BKM_card_msg;
317 cs->irq_func = &bkm_interrupt;
331 struct IsdnCardState *cs = card->
cs;
333 u_int pci_memaddr = 0, found = 0;
336 strcpy(tmp, bkm_a4t_revision);
345 ret = a4t_pci_probe(dev_a4t, cs, &found, &pci_memaddr);
357 "No Memory base address\n");
361 return a4t_cs_init(card, cs, pci_memaddr);