|
Linux Kernel
3.7.1
|
#include <linux/module.h>#include <linux/moduleparam.h>#include <linux/init.h>#include <linux/pci.h>#include <linux/dma-mapping.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/if_vlan.h>#include <linux/mdio.h>#include <linux/sockios.h>#include <linux/workqueue.h>#include <linux/proc_fs.h>#include <linux/rtnetlink.h>#include <linux/firmware.h>#include <linux/log2.h>#include <linux/stringify.h>#include <linux/sched.h>#include <linux/slab.h>#include <asm/uaccess.h>#include "common.h"#include "cxgb3_ioctl.h"#include "regs.h"#include "cxgb3_offload.h"#include "version.h"#include "cxgb3_ctl_defs.h"#include "t3_cpl.h"#include "firmware_exports.h"Go to the source code of this file.
Macros | |
| #define | PORT_MASK ((1 << MAX_NPORTS) - 1) |
| #define | DFLT_MSG_ENABLE |
| #define | EEPROM_MAGIC 0x38E2F10C |
| #define | CH_DEVICE(devid, idx) { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, PCI_ANY_ID, 0, 0, idx } |
| #define | CXGB3_SHOW(name, val_expr) |
| #define | CXGB3_ATTR_R(name, val_expr) |
| #define | CXGB3_ATTR_RW(name, val_expr, store_method) |
| #define | TM_ATTR(name, sched) |
| #define | FW_VERSION |
| #define | FW_FNAME "cxgb3/t3fw-" FW_VERSION ".bin" |
| #define | TPSRAM_VERSION |
| #define | TPSRAM_NAME "cxgb3/t3%c_psram-" TPSRAM_VERSION ".bin" |
| #define | AEL2005_OPT_EDC_NAME "cxgb3/ael2005_opt_edc.bin" |
| #define | AEL2005_TWX_EDC_NAME "cxgb3/ael2005_twx_edc.bin" |
| #define | AEL2020_TWX_EDC_NAME "cxgb3/ael2020_twx_edc.bin" |
| #define | T3_REGMAP_SIZE (3 * 1024) |
| #define | ADVERTISED_MASK |
| #define | TSO_FLAGS (NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN) |
| #define | VLAN_FEAT |
Enumerations | |
| enum | { MAX_TXQ_ENTRIES = 16384, MAX_CTRL_TXQ_ENTRIES = 1024, MAX_RSPQ_ENTRIES = 16384, MAX_RX_BUFFERS = 16384, MAX_RX_JUMBO_BUFFERS = 16384, MIN_TXQ_ENTRIES = 4, MIN_CTRL_TXQ_ENTRIES = 4, MIN_RSPQ_ENTRIES = 32, MIN_FL_ENTRIES = 32 } |
Variables | |
| struct workqueue_struct * | cxgb3_wq |
| #define ADVERTISED_MASK |
Definition at line 1851 of file cxgb3_main.c.
| #define AEL2005_OPT_EDC_NAME "cxgb3/ael2005_opt_edc.bin" |
Definition at line 992 of file cxgb3_main.c.
| #define AEL2005_TWX_EDC_NAME "cxgb3/ael2005_twx_edc.bin" |
Definition at line 993 of file cxgb3_main.c.
| #define AEL2020_TWX_EDC_NAME "cxgb3/ael2020_twx_edc.bin" |
Definition at line 994 of file cxgb3_main.c.
| #define CH_DEVICE | ( | devid, | |
| idx | |||
| ) | { PCI_VENDOR_ID_CHELSIO, devid, PCI_ANY_ID, PCI_ANY_ID, 0, 0, idx } |
Definition at line 82 of file cxgb3_main.c.
| #define CXGB3_ATTR_R | ( | name, | |
| val_expr | |||
| ) |
Definition at line 775 of file cxgb3_main.c.
| #define CXGB3_ATTR_RW | ( | name, | |
| val_expr, | |||
| store_method | |||
| ) |
Definition at line 779 of file cxgb3_main.c.
| #define CXGB3_SHOW | ( | name, | |
| val_expr | |||
| ) |
Definition at line 719 of file cxgb3_main.c.
| #define DFLT_MSG_ENABLE |
Definition at line 76 of file cxgb3_main.c.
| #define EEPROM_MAGIC 0x38E2F10C |
Definition at line 80 of file cxgb3_main.c.
| #define FW_FNAME "cxgb3/t3fw-" FW_VERSION ".bin" |
Definition at line 988 of file cxgb3_main.c.
| #define FW_VERSION |
Definition at line 986 of file cxgb3_main.c.
| #define PORT_MASK ((1 << MAX_NPORTS) - 1) |
Definition at line 74 of file cxgb3_main.c.
| #define T3_REGMAP_SIZE (3 * 1024) |
Definition at line 1600 of file cxgb3_main.c.
Definition at line 846 of file cxgb3_main.c.
| #define TPSRAM_NAME "cxgb3/t3%c_psram-" TPSRAM_VERSION ".bin" |
Definition at line 991 of file cxgb3_main.c.
| #define TPSRAM_VERSION |
Definition at line 989 of file cxgb3_main.c.
| #define TSO_FLAGS (NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN) |
Definition at line 3176 of file cxgb3_main.c.
| #define VLAN_FEAT |
Definition at line 3177 of file cxgb3_main.c.
| anonymous enum |
| MAX_TXQ_ENTRIES | |
| MAX_CTRL_TXQ_ENTRIES | |
| MAX_RSPQ_ENTRIES | |
| MAX_RX_BUFFERS | |
| MAX_RX_JUMBO_BUFFERS | |
| MIN_TXQ_ENTRIES | |
| MIN_CTRL_TXQ_ENTRIES | |
| MIN_RSPQ_ENTRIES | |
| MIN_FL_ENTRIES |
Definition at line 62 of file cxgb3_main.c.
| CXGB3_ATTR_R | ( | cam_size | , |
| t3_mc5_size &-> | mc5 | ||
| ) |
| CXGB3_ATTR_RW | ( | nfilters | , |
| adap->params.mc5. | nfilters, | ||
| store_nfilters | |||
| ) |
| CXGB3_ATTR_RW | ( | nservers | , |
| adap->params.mc5. | nservers, | ||
| store_nservers | |||
| ) |
| MODULE_AUTHOR | ( | "Chelsio Communications" | ) |
| MODULE_DESCRIPTION | ( | DRV_DESC | ) |
| MODULE_DEVICE_TABLE | ( | pci | , |
| cxgb3_pci_tbl | |||
| ) |
| module_exit | ( | cxgb3_cleanup_module | ) |
| MODULE_FIRMWARE | ( | FW_FNAME | ) |
| MODULE_FIRMWARE | ( | "cxgb3/t3b_psram-"TPSRAM_VERSION".bin" | ) |
| MODULE_FIRMWARE | ( | "cxgb3/t3c_psram-"TPSRAM_VERSION".bin" | ) |
| MODULE_FIRMWARE | ( | AEL2005_OPT_EDC_NAME | ) |
| MODULE_FIRMWARE | ( | AEL2005_TWX_EDC_NAME | ) |
| MODULE_FIRMWARE | ( | AEL2020_TWX_EDC_NAME | ) |
| module_init | ( | cxgb3_init_module | ) |
| MODULE_LICENSE | ( | "Dual BSD/GPL" | ) |
| module_param | ( | dflt_msg_enable | , |
| int | , | ||
| 0644 | |||
| ) |
| module_param | ( | msi | , |
| int | , | ||
| 0644 | |||
| ) |
| module_param | ( | ofld_disable | , |
| int | , | ||
| 0644 | |||
| ) |
| MODULE_VERSION | ( | DRV_VERSION | ) |
Definition at line 2961 of file cxgb3_main.c.
Definition at line 1020 of file cxgb3_main.c.
Definition at line 2837 of file cxgb3_main.c.
| void t3_os_link_changed | ( | struct adapter * | adapter, |
| int | port_id, | ||
| int | link_stat, | ||
| int | speed, | ||
| int | duplex, | ||
| int | pause | ||
| ) |
t3_os_link_changed - handle link status changes : the adapter associated with the link change : the port index whose limk status has changed : the new status of the link : the new speed setting : the new duplex setting : the new flow-control setting
This is the OS-dependent handler for link status changes. The OS neutral handler takes care of most of the processing for these events, then calls this handler for any OS-specific processing.
Definition at line 247 of file cxgb3_main.c.
Definition at line 195 of file cxgb3_main.c.
Definition at line 2855 of file cxgb3_main.c.
| TM_ATTR | ( | sched0 | , |
| 0 | |||
| ) |
| TM_ATTR | ( | sched1 | , |
| 1 | |||
| ) |
| TM_ATTR | ( | sched2 | , |
| 2 | |||
| ) |
| TM_ATTR | ( | sched3 | , |
| 3 | |||
| ) |
| TM_ATTR | ( | sched4 | , |
| 4 | |||
| ) |
| TM_ATTR | ( | sched5 | , |
| 5 | |||
| ) |
| TM_ATTR | ( | sched6 | , |
| 6 | |||
| ) |
| TM_ATTR | ( | sched7 | , |
| 7 | |||
| ) |
| struct workqueue_struct* cxgb3_wq |
Definition at line 145 of file cxgb3_main.c.
1.8.2