desc.c File Reference

#include "ath5k.h"
#include "reg.h"
#include "debug.h"

Go to the source code of this file.

Macros
#define	pr_fmt(fmt)   KBUILD_MODNAME ": " fmt
#define	_TX_FLAGS(_c, _flag)
#define	_TX_FLAGS_5211(_c, _flag)
#define	_TX_FLAGS(_c, _flag)
#define	_XTX_TRIES(_n)

Functions
int	ath5k_hw_setup_mrr_tx_desc (struct ath5k_hw *ah, struct ath5k_desc *desc, u_int tx_rate1, u_int tx_tries1, u_int tx_rate2, u_int tx_tries2, u_int tx_rate3, u_int tx_tries3)
int	ath5k_hw_setup_rx_desc (struct ath5k_hw *ah, struct ath5k_desc *desc, u32 size, unsigned int flags)
int	ath5k_hw_init_desc_functions (struct ath5k_hw *ah)

Macro Definition Documentation

#define _TX_FLAGS	(		_c,
			_flag
	)

Value:

if (flags & AR5K_TXDESC_##_flag) {          \
        tx_ctl->tx_control_##_c |=          \
            AR5K_2W_TX_DESC_CTL##_c##_##_flag;  \
    }

#define _TX_FLAGS	(		_c,
			_flag
	)

Value:

if (flags & AR5K_TXDESC_##_flag) {          \
        txctl##_c |= AR5K_4W_TX_DESC_CTL##_c##_##_flag; \
    }

#define _TX_FLAGS_5211	(		_c,
			_flag
	)

Value:

if (flags & AR5K_TXDESC_##_flag) {              \
        tx_ctl->tx_control_##_c |=              \
            AR5K_2W_TX_DESC_CTL##_c##_##_flag##_5211;   \
    }

#define _XTX_TRIES

(

_n

)

Value:

if (tx_tries##_n) {                     \
        tx_ctl->tx_control_2 |=                 \
            AR5K_REG_SM(tx_tries##_n,               \
            AR5K_4W_TX_DESC_CTL2_XMIT_TRIES##_n);       \
        tx_ctl->tx_control_3 |=                 \
            AR5K_REG_SM(tx_rate##_n,                \
            AR5K_4W_TX_DESC_CTL3_XMIT_RATE##_n);        \
    }

#define pr_fmt

(

fmt

)

KBUILD_MODNAME ": " fmt

Definition at line 24 of file desc.c.

Function Documentation

int ath5k_hw_init_desc_functions

(

struct ath5k_hw *

ah

)

ath5k_hw_init_desc_functions() - Init function pointers inside ah : The &struct ath5k_hw

Maps the internal descriptor functions to the function pointers on ah, used from above. This is used as an abstraction layer to handle the various chips the same way.

Definition at line 773 of file desc.c.

int ath5k_hw_setup_mrr_tx_desc	(	struct ath5k_hw *	ah,
		struct ath5k_desc *	desc,
		u_int	tx_rate1,
		u_int	tx_tries1,
		u_int	tx_rate2,
		u_int	tx_tries2,
		u_int	tx_rate3,
		u_int	tx_tries3
	)

ath5k_hw_setup_mrr_tx_desc() - Initialize an MRR tx control descriptor : The &struct ath5k_hw : The &struct ath5k_desc : HW idx for rate used on transmission series 1 : Max number of retransmissions for transmission series 1 : HW idx for rate used on transmission series 2 : Max number of retransmissions for transmission series 2 : HW idx for rate used on transmission series 3 : Max number of retransmissions for transmission series 3

Multi rate retry (MRR) tx control descriptors are available only on AR5212 MACs, they are part of the normal 4-word tx control descriptor (see above) but we handle them through a separate function for better abstraction.

Returns 0 on success or -EINVAL on invalid input

Definition at line 379 of file desc.c.

int ath5k_hw_setup_rx_desc	(	struct ath5k_hw *	ah,
		struct ath5k_desc *	desc,
		u32	size,
		unsigned int	flags
	)

ath5k_hw_setup_rx_desc() - Initialize an rx control descriptor : The &struct ath5k_hw : The &struct ath5k_desc : RX buffer length in bytes : One of AR5K_RXDESC_* flags

Definition at line 559 of file desc.c.